#include #include #include #include #include "adi_initialize.h" #include "memory.h" #include "sport.h" #include "config.h" #include "dma.h" struct sport_regs{ volatile uint32_t ctl; volatile uint32_t div; volatile uint32_t mctl; volatile uint32_t cs0; volatile uint32_t cs1; volatile uint32_t cs2; volatile uint32_t cs3; uint32_t pad2[2]; volatile uint32_t err; volatile uint32_t mstat; volatile uint32_t ctl2; uint32_t pad[6]; volatile uint32_t txpri; volatile uint32_t rxpri; volatile uint32_t txsec; volatile uint32_t rxsec; }; #define TDM_SLOT SLOTS #define SLEN 31 #define PACK 0 #define ICLK 0 //Internal Clock. #define OPMODE 0 //0-tdm ,1 - IIS mode #define CKRE 1 //0-Clock falling edge,1-Clock rising edge #define FSR 1 //0-No frame sync required, 1- Frame sync required #define IFS 0 //0-External frame sync,1 - Internal frame sync #define LFS 1 //0-active high Frame sync ,1- Active-Low Frame Sync #define MFD 1 //Multichannel Frame Delay. #define SPENSEC 1 //Serial Port Enable (Secondary) struct DMA_Desc{ struct DMA_Desc *next; void * buffer; }; unsigned int SAMPLE_NUM = 32; u16 mCodecNum = 0; struct AudioCodec mAudioCodec[16]; static struct DMA_Desc sp_desc[32];//0a_ping,0a_pong,0b_ping,0b_pong,... static volatile SportRegsDef* gSports[16] = { SPORT0a,SPORT0b,SPORT1a,SPORT1b,SPORT2a,SPORT2b,SPORT3a,SPORT3b, SPORT4a,SPORT4b,SPORT5a,SPORT5b,SPORT6a,SPORT6b,SPORT7a,SPORT7b }; volatile SportRegsDef* get_sport_regs(uint32_t sportid) { if(sportid < 16) { return gSports[sportid]; } return 0; } void sport_config(volatile SportRegsDef* regs , struct SportDef * config) { u32 i; volatile DMARegsDef* dma = get_dma_regs(config->spid); struct DMA_Desc* desca_0 = &sp_desc[config->spid*2 + 0]; struct DMA_Desc* desca_1 = &sp_desc[config->spid*2 + 1]; u32 dmaBufferLen = config->slots*SAMPLE_NUM; s32* dmaBuffer_ping, *dmaBuffer_pong; if(config->enable_sec) { dmaBufferLen *= 2; } dmaBuffer_ping = sram_malloc(SRAM_L1 , mem_any ,dmaBufferLen*2*sizeof(s32));//for ping-pong. if(dmaBuffer_ping == NULL) { printf("dmaBuffer malloc fail.\n"); } dmaBuffer_pong = dmaBuffer_ping + dmaBufferLen; mAudioCodec[mCodecNum].dataPtr[0] = dmaBuffer_ping; mAudioCodec[mCodecNum].dataPtr[1] = dmaBuffer_pong; mAudioCodec[mCodecNum].slot_num = config->slots; mAudioCodec[mCodecNum].channel_num = config->vld; mAudioCodec[mCodecNum].rx = config->rx; mAudioCodec[mCodecNum].enable_sec = config->enable_sec; mCodecNum++; desca_0->next = (uint32_t)desca_1|MP_OFFSET; desca_0->buffer = (uint32_t)dmaBuffer_ping|MP_OFFSET; desca_1->next = (uint32_t)desca_0|MP_OFFSET; desca_1->buffer = (uint32_t)dmaBuffer_pong|MP_OFFSET; //dma config. dma_config((DMARegsDef *)dma, (uint32_t)desca_0|MP_OFFSET, dmaBufferLen, config->rx); regs->div = 0;//(511<<16)|0 ; regs->ctl = (SLEN<<4) | (PACK<<9) | (ICLK<<10) | (config->opmode<<11) | (config->clke << 12) | (FSR<<13) | (IFS<<14) | (config->lfs<<16) ; if(config->rx ) { regs->ctl |= (0<<25); } else { regs->ctl |= (1<<25); } if(! config->opmode ) { //tdm. regs->cs0 = 0; for(i=0 ;i < config->slots ;i ++ ){ regs->cs0 |= (1<mctl = 1 | (config->mfd<<4) | ((config->slots-1)<<8) ; } } void sport_enable(volatile SportRegsDef* regs, ubool enable_sec) { regs->ctl |= 1 |(enable_sec<<24); }