From fd0b5f94939d30fe65a98f9111aee2987d12e41f Mon Sep 17 00:00:00 2001
From: qipp <2969964114@qq.com>
Date: 星期三, 18 三月 2026 17:46:42 +0800
Subject: [PATCH] 碧云祥定制代码提交
---
DSP180x_core/drv/sport.c | 84 ++++++++++++++++++++++++++++++++++++++++++
1 files changed, 84 insertions(+), 0 deletions(-)
diff --git a/DSP180x_core/drv/sport.c b/DSP180x_core/drv/sport.c
index 5a0fbc2..777842c 100644
--- a/DSP180x_core/drv/sport.c
+++ b/DSP180x_core/drv/sport.c
@@ -344,6 +344,90 @@
}
}
+void sportB_config(struct SportDef * config)
+{
+ u32 i;
+ volatile u32 *pSPCTLn[8] = {pSPCTL0,pSPCTL1,pSPCTL2,pSPCTL3,pSPCTL4,pSPCTL5,pSPCTL6,pSPCTL7};
+ volatile u32 *pSPnCS0[8] = {pSP0CS0,pSP1CS0,pSP2CS0,pSP3CS0,pSP4CS0,pSP5CS0,pSP6CS0,pSP7CS0};
+ volatile u32 *pSPMCTLn[8] = {pSPMCTL0,pSPMCTL1,pSPMCTL2,pSPMCTL3,pSPMCTL4,pSPMCTL5,pSPMCTL6,pSPMCTL7};
+ volatile u32 *pCPSPnAB[16] = {pCPSP0A,pCPSP0B,pCPSP1A,pCPSP1B,pCPSP2A,pCPSP2B,pCPSP3A,pCPSP3B
+ ,pCPSP4A,pCPSP4B,pCPSP5A,pCPSP5B,pCPSP6A,pCPSP6B,pCPSP7A,pCPSP7B};
+
+ struct DMA_Desc* desca_0 = &sp_desc[config->spid*4 + 0];
+ struct DMA_Desc* desca_1 = &sp_desc[config->spid*4 + 1];
+
+ u32 dmaBufferLen = config->slots*SAMPLE_NUM;
+ u32 bufLen = dmaBufferLen;
+ s32* dmaBuffer_ping, *dmaBuffer_pong;
+
+ if(config->interrupt ) {
+ u32 iid[] = {ADI_CID_SP0I,ADI_CID_SP1I,ADI_CID_SP2I,ADI_CID_SP3I
+ ,ADI_CID_SP4I,ADI_CID_SP5I,ADI_CID_SP6I,ADI_CID_SP7I};
+
+ adi_int_InstallHandler(iid[config->spid], DMACallBack, 0, true);
+ }
+
+ dmaBuffer_ping = (s32*)SRAMMalloc(bufLen* 2*sizeof(s32));//for ping-pong.
+ if(dmaBuffer_ping == NULL) {
+ printf("dmaBuffer malloc fail.\n");
+ }
+ memset(dmaBuffer_ping, 0 , bufLen* 2 *sizeof(s32));
+ dmaBuffer_pong = dmaBuffer_ping + dmaBufferLen;
+ mAudioCodec[mCodecNum].dataPtr[0] = dmaBuffer_ping;
+ mAudioCodec[mCodecNum].dataPtr[1] = dmaBuffer_pong;
+ mAudioCodec[mCodecNum].slot_num = config->slots;
+ mAudioCodec[mCodecNum].channel_num = config->vld_b;
+ mAudioCodec[mCodecNum].rx = config->rx;
+ mCodecNum++;
+
+ desca_0->next = ((u32)desca_1 + 3)&0x7ffff | (1<<19);
+ desca_0->buffer = (u32)dmaBuffer_ping;
+ desca_0->asize = sizeof(s32);
+ desca_0->bsize = config->slots*SAMPLE_NUM;
+
+ desca_1->next = ((uint32_t)desca_0 + 3)&0x7ffff | (1<<19);
+ desca_1->buffer = (u32)dmaBuffer_pong;
+ desca_1->asize = sizeof(s32);
+ desca_1->bsize = config->slots*SAMPLE_NUM;
+
+ *pCPSPnAB[config->spid*2+1] = desca_1->next;
+
+ if(config->opmode) { //iis
+ u32 reg = SLEN32 | OPMODE | SPEN_B | SCHEN_B |SDEN_B |(config->lfs?(LFS):0) | (config->clke?CKRE:0);
+ // *pSPCTL6 = SPTRAN | SLEN32 | OPMODE | SPEN_A | SCHEN_A |SDEN_A | SPEN_B | SCHEN_B |SDEN_B;// 输出
+ // *pSPCTL7 = SLEN32 | OPMODE | SPEN_A | SCHEN_A |SDEN_A | SPEN_B | SCHEN_B |SDEN_B; //输入
+// if(config->enable_sec) {
+// reg |= SPEN_B | SCHEN_B |SDEN_B ;
+// }
+
+ if(config->rx == ufalse) {
+ reg |= SPTRAN;
+ }
+
+ *pSPCTLn[config->spid] = reg;
+ }
+ else { //tdm
+ u32 reg = SLEN32 | SCHEN_B |SDEN_B | FSR | (config->clke?CKRE:0) | (config->lfs?LFS:0);
+// if(config->enable_sec) {
+// reg |= SCHEN_B |SDEN_B;
+// }
+
+ if(config->rx == ufalse) {
+ reg |= SPTRAN;
+ }
+
+ *pSPCTLn[config->spid] = reg;
+
+ reg = 0;
+ for(i=0 ;i < config->slots ;i ++ ){
+ reg |= (1<<i);
+ }
+ *pSPnCS0[config->spid] = reg;
+
+ *pSPMCTLn[config->spid] = ((config->slots-1)<<5) | (config->mfd << 1) | MCEA| (config->enable_sec?MCEB:0);
+ }
+}
+
uvoid sport_enable(struct SportDef * config)
{
u32 reg = SDEN_A;
--
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