From fd0b5f94939d30fe65a98f9111aee2987d12e41f Mon Sep 17 00:00:00 2001
From: qipp <2969964114@qq.com>
Date: 星期三, 18 三月 2026 17:46:42 +0800
Subject: [PATCH] 碧云祥定制代码提交
---
DSP180x_core/drv/board.c | 144 ++++++++++++++++++++++++++++++++++++++++++++++++
1 files changed, 144 insertions(+), 0 deletions(-)
diff --git a/DSP180x_core/drv/board.c b/DSP180x_core/drv/board.c
index 1221e65..3a64edd 100644
--- a/DSP180x_core/drv/board.c
+++ b/DSP180x_core/drv/board.c
@@ -44,6 +44,7 @@
void InitSRC(void);
void SportsConfig(void);
+#if 0
void Audio_Config(void)
{
SRU(DAI_PB02_O, SPORT0_CLK_I);
@@ -133,8 +134,91 @@
InitSRC();
SportsConfig();
}
+#else
+void Audio_Config(void)
+{
+ SRU(DAI_PB02_O, SPORT0_CLK_I);
+ SRU(DAI_PB02_O, SPORT2_CLK_I);
+ SRU(DAI_PB08_O, SPORT3_CLK_I); //iis
+ SRU(DAI_PB01_O, SPORT0_FS_I);
+ SRU(DAI_PB01_O, SPORT2_FS_I);
+
+ SRU(DAI_PB09_O, SPORT3_FS_I); //iis
+
+ //analog input
+ SRU(DAI_PB17_O, SPORT2_DA_I);
+ SRU(DAI_PB14_O, SPORT2_DB_I);
+
+ //analog output
+ SRU(HIGH, PBEN18_I); //OUT0
+ SRU(SPORT0_DA_O, DAI_PB18_I);
+ SRU(HIGH, PBEN04_I); //OUT1
+ SRU(SPORT0_DB_O, DAI_PB04_I);
+
+ //hdmi input
+ SRU(DAI_PB05_O, SPORT3_DA_I);
+
+///////////////////USB///////////////////////
+ // SRC 外围时钟
+ SRU(DAI_PB03_O, SRC0_CLK_IP_I);
+ SRU(DAI_PB13_O, SRC0_FS_IP_I);
+ SRU(DAI_PB03_O, SRC1_CLK_OP_I);
+ SRU(DAI_PB13_O, SRC1_FS_OP_I);
+
+ // SRC 内部时钟
+ SRU(DAI_PB08_O, SPORT4_CLK_I);
+ SRU(DAI_PB08_O, SPORT5_CLK_I);
+ SRU(DAI_PB09_O, SPORT4_FS_I);
+ SRU(DAI_PB09_O, SPORT5_FS_I);
+
+ SRU(DAI_PB08_O, SRC0_CLK_OP_I);
+ SRU(DAI_PB09_O, SRC0_FS_OP_I);
+ SRU(DAI_PB08_O, SRC1_CLK_IP_I);
+ SRU(DAI_PB09_O, SRC1_FS_IP_I);
+
+ // DATA输入ASRC
+ SRU(DAI_PB07_O, SRC0_DAT_IP_I);
+ SRU(SRC0_DAT_OP_O, SPORT5_DA_I);
+
+ // ASRC输出DATA
+ SRU(SPORT4_DA_O, SRC1_DAT_IP_I);
+
+ SRU(HIGH, PBEN19_I);
+ SRU(SRC1_DAT_OP_O, DAI_PB19_I);
+//////////////////////////////////////////////
+
+ //SPDIF MCLK
+ SRU(HIGH, PBEN10_I);
+ SRU(DAI_PB06_O,DAI_PB10_I); //MCLK
+
+ //TDM CLOCK
+ SRU(DAI_PB06_O,PCG_EXTA_I);
+
+ SRU(PCG_CLKA_O,PCG_EXTB_I);
+
+ SRU(HIGH, PBEN02_I); //clk
+ SRU(PCG_FSB_O,DAI_PB02_I);
+
+ SRU(HIGH, PBEN01_I); //fs
+ SRU(PCG_FSA_O,DAI_PB01_I);
+
+ //IIS CLOCK
+ SRU(HIGH, PBEN08_I); //clk
+ SRU(PCG_CLKC_O,DAI_PB08_I);
+ SRU(HIGH, PBEN09_I); //fs
+ SRU(PCG_FSC_O,DAI_PB09_I);
+
+ SRU(DAI_PB10_O,PCG_EXTC_I);
+
+ InitPCG();
+ InitSRC();
+ SportsConfig();
+}
+#endif
+
+#if 0
void SportsConfig(void)
{
#if 1
@@ -176,7 +260,67 @@
InitSPORT(0,0);
#endif
}
+#else
+void SportsConfig(void)
+{
+ int i ;
+ struct SportDef sports[8];
+ memset(sports , 0, sizeof(struct SportDef)*8);
+
+ for (i = 0 ;i < 6;i ++){
+ sports[i].clke = 0;
+ sports[i].enable = 1;
+ sports[i].enable_sec = 1;
+ sports[i].lfs = 0;
+ sports[i].mfd = 0;
+ sports[i].opmode = 1;
+ sports[i].slots = 2;
+ sports[i].spid = i;
+ sports[i].vld_a = 2;
+ sports[i].vld_b = 2;
+ sports[i].rx = 1;
+ sports[i].interrupt =0 ;
+ }
+
+ sports[0].rx = 0;
+ sports[0].opmode = 0;
+ sports[0].slots = 8;
+ sports[0].clke = 1;
+ sports[0].mfd = 1;
+ sports[0].vld_a = 8;
+ sports[0].vld_b = 3;
+
+ sports[1].enable = 0;
+
+ sports[2].opmode = 0;
+ sports[2].slots = 8;
+ sports[2].clke = 1;
+ sports[2].mfd = 1;
+ sports[2].vld_a = 8;
+ sports[2].vld_b = 2;
+ sports[2].interrupt = 1;
+
+ sports[3].enable_sec = 0;
+ sports[3].vld_a = 1;
+
+ //sports[5].interrupt = 1; //sport 5 interrupt.
+ sports[4].rx = 0;
+ sports[4].enable_sec = 0;
+ sports[4].clke = 0;
+ sports[4].lfs = 0;
+ sports[5].enable_sec = 0;
+ sports[5].clke = 0;
+ sports[5].lfs = 0;
+
+
+ for(i = 0; i < 8 ; i++) {
+ if(sports[i].enable && sports[i].spid < 8) {
+ sport_config(&sports[i]);
+ }
+ }
+}
+#endif
void InitPCG(void)
{
--
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