获取电平函数新增一长度参数; 及第二轮测试少量bug修复.
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| | |
| | | /// </summary> |
| | | /// <param name="level">模块电平指针</param> |
| | | /// <returns>模块电平数量</returns> |
| | | virtual u32 GetLevel(s16* level) = 0; |
| | | virtual u32 GetLevel(s16* level, u32 level_len) = 0; |
| | | |
| | | /// <summary> |
| | | /// 获取模块执行时间 |
| | |
| | | //#ifndef CORE_CONFIG_H_ |
| | | //#define CORE_CONFIG_H_ |
| | | |
| | | //#pragma once |
| | | #pragma once |
| | | |
| | | #include "../drv/board.h" |
| | | |
| | |
| | | #define LEVEL_REPORT_TIME(x) \ |
| | | (x*SAMPLE_RATE/(1000*SAMPLE_NUM)) |
| | | |
| | | //#define DEBUG |
| | | #ifdef DEBUG |
| | | #define dbg_printf printf |
| | | #else |
| | | #define dbg_printf |
| | | #endif |
| | | |
| | | //#endif |
| | | |
| | |
| | | Frame* Frames::GetFrame(int channel ) |
| | | { |
| | | if (channel >= dataFrame.size()) { |
| | | std::cout<<"GetChannelPcmPtr channel over range.\n"; |
| | | dbg_printf("GetChannelPcmPtr channel over range.\n"); |
| | | return NULL; |
| | | } |
| | | |
| | |
| | | Frame* pcm = new Frame(SAMPLE_NUM); |
| | | |
| | | if (pcm == NULL) { |
| | | std::cout << "alloc frame fail.\n"; |
| | | dbg_printf("alloc frame fail.\n"); |
| | | return NULL; |
| | | } |
| | | pcm->Clear(); |
| | |
| | | } |
| | | if(tob == NULL) return ; |
| | | |
| | | if (iid == 53) |
| | | int ii = 0; |
| | | |
| | | if(var.TopoLoading){ |
| | | MuteOutput(); |
| | | } |
| | |
| | | spiMsg->DspStatusPush(DSP_EMULATE_DEBUG, 0, 0); |
| | | spiMsg->ReportDspStatus(&msg); |
| | | |
| | | printf("free sram %d, L2 %d\n", sram_free_space(SRAM_DDR, mem_any), sram_free_space(SRAM_L2, mem_any)); |
| | | // dbg_printf("free sram %d, L2 %d\n", sram_free_space(SRAM_DDR, mem_any), sram_free_space(SRAM_L2, mem_any)); |
| | | |
| | | while(1) { |
| | | asyn_proc_secs = ModulesAsynProcess(); |
| | |
| | | } |
| | | loop_cnt =0; |
| | | clock_check_count = DMACount[var.master_intr]; |
| | | // printf("clk1 ok\n"); |
| | | // dbg_printf("clk1 ok\n"); |
| | | } |
| | | |
| | | if(!var.clock_ok && var.dsp_status == DSPStatus::dsp_running_ok && var.HandShakeSuccesful) { |
| | |
| | | request_topo_count = DMACount[var.master_intr] ; |
| | | var.clock_ok = utrue; |
| | | spiMsg->ReportDspStatus(&msg); |
| | | printf("clk2 ok\n"); |
| | | // dbg_printf("clk2 ok\n"); |
| | | } |
| | | |
| | | |
| | |
| | | int data_len; |
| | | |
| | | ToB* tob = ToB::GetInstance(); |
| | | u16 LevelCnt = tob->GetLevels(Levels); //918 levels |
| | | u16 LevelCnt = tob->GetLevels(Levels, levels_max_len); //1688 levels |
| | | u32 msgLen = LevelCnt * sizeof(*Levels); |
| | | int Packegs = (msgLen+MSG_DATA_LEN-1)/MSG_DATA_LEN; |
| | | |
| | |
| | | |
| | | data_num = (data_num - sizeof(struct ParamCtrl))/sizeof(s16); |
| | | // ptr->mid = var.pscene->get_module_id(ptr->mid, type, ptr->cmd) ; |
| | | // printf("mID:%d pID:%d val[0]:%d val[1]:%d\n",ptr->mid, ptr->cmd, data[0], data[1]); |
| | | // dbg_printf("mID:%d pID:%d val[0]:%d val[1]:%d\n",ptr->mid, ptr->cmd, data[0], data[1]); |
| | | tob->toCtrl(ptr->mid, ptr->cmd, data, data_num); |
| | | } |
| | | |
| | |
| | | bin = (u8*)sram_malloc(SRAM_DDR, mem_any, pmsg->totalPkts*MSG_DATA_LEN); |
| | | } |
| | | if(bin == NULL) return -1; |
| | | // printf("No:%d len %d\n", pmsg->pktNo,pmsg->dataLen); |
| | | // dbg_printf("No:%d len %d\n", pmsg->pktNo,pmsg->dataLen); |
| | | var.TopoLoading = utrue; |
| | | memcpy(bin+pmsg->pktNo*MSG_DATA_LEN, pmsg->data , pmsg->dataLen); |
| | | |
| | |
| | | var.g_level_report_interval = LEVEL_REPORT_TIME(dspconfig.mLevelReportInt); |
| | | |
| | | ModuleLeveldBUSetting(dspconfig.mConvertUnit); |
| | | //Config(conf); |
| | | RouteConfig(dspconfig.routes, dspconfig.mRouteNum); |
| | | SRCsConfig(0 , &dspconfig.srcs[0]); |
| | | SRCsConfig(1 , &dspconfig.srcs[1]); |
| | |
| | | } |
| | | |
| | | Send(MsgType::MSG_ACK_REQ, 0 , 0); |
| | | printf("HandShake OK\n"); |
| | | // dbg_printf("HandShake OK\n"); |
| | | return 0; |
| | | } |
| | | |
| | |
| | | { |
| | | extern ubool systemMute; |
| | | if(pmsg->magic != 0x5aa5) { |
| | | //printf("magic error.\n"); |
| | | //dbg_printf("magic error.\n"); |
| | | return -1; |
| | | } |
| | | |
| | |
| | | #include "dsp_report.h" |
| | | #include "../drv/memory.h" |
| | | |
| | | #define LEVELS_MAX_LEN 1688 |
| | | class Message{ |
| | | private: |
| | | Queue<MSG>* txQueue; |
| | | |
| | | ReportStatus dsp_status_q; |
| | | s16* Levels; |
| | | u32 levels_max_len; |
| | | |
| | | s32 PresetProcess(MSG* pmsg); |
| | | |
| | |
| | | public: |
| | | Message(u32 num) |
| | | { |
| | | levels_max_len = LEVELS_MAX_LEN; |
| | | txQueue = new Queue<MSG>(num); |
| | | Levels = new s16[1688]; |
| | | Levels = new s16[levels_max_len]; |
| | | } |
| | | ~Message() |
| | | { |
| | | delete []Levels; |
| | | delete []txQueue; |
| | | } |
| | | |
| | |
| | | if (!bin) return 0; |
| | | |
| | | struct Module *m = (struct Module *)(bin + size); |
| | | printf("proc list size %d\n", proc_list.size()); |
| | | dbg_printf("proc list size %d\n", proc_list.size()); |
| | | |
| | | for (i=0; i< proc_list.size(); i++) { |
| | | Module *m = (struct Module *)(bin + size); |
| | |
| | | for(j = 0 ; j< ninports ;j ++, phy_id++) { |
| | | phy_id->mIntType = 0; |
| | | phy_id->mPhyID = hw_adapter->get_physical_channel(1, rxBufID[j]-1); |
| | | // printf("PhyID:%d\n", phy_id->mPhyID); |
| | | // dbg_printf("PhyID:%d\n", phy_id->mPhyID); |
| | | } |
| | | size += ninports*sizeof(PhyPort); |
| | | } |
| | |
| | | MUTE, |
| | | SENSI, |
| | | PHANTOM, |
| | | |
| | | TYPE, |
| | | |
| | | FREQ, |
| | | LEVEL, |
| | | NAME, |
| | |
| | | for(i=0 ;i < pmixer->output_num ;i ++) { |
| | | for(j =0 ;j < pmixer->input_num ;j++) { |
| | | val[0] = j; val[1] = i; val[2] = (pmixer->input_mask[i][j/16]>>(j&15))&0x1; m->Ctrl(MIXER_SWITCH, val, 3); |
| | | // printf("oich %d %d= %x %x %x\n", i,j, val[0],val[1],val[2]); |
| | | // dbg_printf("oich %d %d= %x %x %x\n", i,j, val[0],val[1],val[2]); |
| | | val[0] = j; val[1] = i; val[2] = RESSIGNBIT(pmixer->input_gain[i][j]); m->Ctrl(MIXER_GAIN, val, 3); |
| | | } |
| | | } |
| | |
| | | printf("tag_sysctl:%d, %d\n", sizeof(tag_sysctl), L[17]=sizeof(tag_sysctl)+L[16]); |
| | | printf("tag_group:%d, %d\n", sizeof(tag_group), L[18]=sizeof(tag_group)+L[17]);*/ |
| | | |
| | | printf("Len parameters:%d, Len recv:%d\n", L[19]=sizeof(tag_parameters), size); |
| | | dbg_printf("Len parameters:%d, Len recv:%d\n", L[19]=sizeof(tag_parameters), size); |
| | | return -1; |
| | | } |
| | | memcpy(¶meters, param, sizeof(tag_parameters)); |
| | |
| | | MUTE, |
| | | SENSI, |
| | | PHANTOM, |
| | | |
| | | TYPE, |
| | | |
| | | FREQ, |
| | | LEVEL, |
| | | NAME, |
| | | PHASE, |
| | | STEP, |
| | | |
| | | LINK, |
| | | CHANNEL_LEVEL, |
| | | |
| | | INPUT_MIN, |
| | | INPUT_MAX, |
| | | }; |
| | |
| | | val[1] = RESSIGNBIT(val_c[1]); |
| | | |
| | | m->Ctrl(pID, val, 2); |
| | | // printf("pID:%d v[0]:%d v[1]:%d\n", pID, val[0], val[1]); |
| | | // dbg_printf("pID:%d v[0]:%d v[1]:%d\n", pID, val[0], val[1]); |
| | | |
| | | return 0; |
| | | } |
| | |
| | | |
| | | |
| | | |
| | | //#define DEBUG |
| | | #ifdef DEBUG |
| | | #define dbg_printf printf |
| | | #else |
| | | #define dbg_printf |
| | | #endif |
| | | |
| | | |
| | | //static ToB* tob = NULL; |
| | | |
| | |
| | | |
| | | if (pmod->mDsp != dsp_index) continue; |
| | | |
| | | #ifdef DEBUG |
| | | #if DEBUG |
| | | dbg_printf("Module ID %d type %d rxnum %d txnum %d. \n",pmod->mID ,pmod->mType, pmod->mRxNum,pmod->mTxNum); |
| | | #endif |
| | | // if(pmod->mID == 394) { |
| | | // int ddr = sram_free_space(SRAM_DDR); |
| | | // int ccm = sram_free_space(SRAM_CCM); |
| | | // int l1 = sram_free_space(SRAM_L1); |
| | | // printf("ddr %d ccm %d l1 %d.\n",ddr, ccm ,l1); |
| | | // dbg_printf("ddr %d ccm %d l1 %d.\n",ddr, ccm ,l1); |
| | | // } |
| | | IModule* m = CreateBaseModule(pmod->mType,pmod->mTag, pmod->mRxNum,pmod->mTxNum); |
| | | if(!m) { |
| | |
| | | |
| | | return ErrStatus::SUCCESS; |
| | | } |
| | | #define DEBUG 0 |
| | | #if DEBUG |
| | | |
| | | #ifdef DEBUG |
| | | const s8* type_string[ModuleType::PROC_COUNT] = { |
| | | "none" |
| | | ,"input" |
| | |
| | | |
| | | if (pmod->mDsp != dsp_index) continue; |
| | | |
| | | #if DEBUG |
| | | // if (1+320 == pmod->mID) |
| | | // if (PROC_FEEDBACK == pmod->mType) |
| | | printf("Module ID %d type %d %s rxnum %d txnum %d tag %d. \n",pmod->mID ,pmod->mType, type_string[pmod->mType], pmod->mRxNum,pmod->mTxNum,pmod->mTag); |
| | | #ifdef DEBUG |
| | | // if (300 == pmod->mID) |
| | | if (PROC_FEEDBACK == pmod->mType) |
| | | dbg_printf("Module ID %d type %d %s rxnum %d txnum %d tag %d. \n",pmod->mID ,pmod->mType, type_string[pmod->mType], pmod->mRxNum,pmod->mTxNum,pmod->mTag); |
| | | #endif |
| | | |
| | | IModule* m = CreateBaseModule(pmod->mType, pmod->mTag, mRxNum, mTxNum); |
| | |
| | | } |
| | | mModuleIndex[pmod->mID] = ++mModuleNum; |
| | | |
| | | // printf("Module id:%d, Tx buffer id:", pmod->mID); |
| | | // dbg_printf("Module id:%d, Tx buffer id:", pmod->mID); |
| | | for (size_t i = 0; i < mTxNum && !bOutput; i++){ |
| | | // printf("bid %d, ", mTxbufID[i]); |
| | | // dbg_printf("bid %d, ", mTxbufID[i]); |
| | | if (mTxbufID[i] > 0) { |
| | | Frame* pcm = frames->GetFrame(mTxbufID[i]-1); |
| | | m->SetOutputChannelDataPtr(i, pcm); |
| | |
| | | nPhyInput[mPhyID[i].mIntType] = mPhyID[i].mPhyID; |
| | | m->SetInputChannelDataPtr(i, pcm); |
| | | SetRxChannelPtr(static_cast<IntDataType>(mPhyID[i].mIntType), mPhyID[i].mPhyID-1, pcm->Data()); |
| | | // printf("phy_id %d\n", mPhyID[i].mPhyID); |
| | | // dbg_printf("phy_id %d\n", mPhyID[i].mPhyID); |
| | | } |
| | | } |
| | | else { |
| | | m->SetOutputChannelDataPtr(i, 0); |
| | | } |
| | | } |
| | | // printf(";Rx buffer id:"); |
| | | // dbg_printf(";Rx buffer id:"); |
| | | for (size_t i = 0; i < mRxNum && !bInput; i++) { |
| | | // printf("mID %d,bid %d\n", pmod->mID, mRxbufID[i]); |
| | | if (mRxbufID[i] > 0) { |
| | |
| | | pcm = frames->AllocFrame(); // It is not necessary to be compatible with the AXE1208 series here, because the TOP architecture is different. |
| | | m->SetOutputChannelDataPtr(i, pcm); |
| | | SetTxChannelPtr(static_cast<IntDataType>(mPhyID[i].mIntType), mPhyID[i].mPhyID-1, pcm->Data()); |
| | | // printf("mID %d,bid %d\n", pmod->mID, mPhyID[i].mPhyID-1); |
| | | // printf("phy_type %d, _id %d\n", mPhyID[i].mIntType, mPhyID[i].mPhyID); |
| | | // dbg_printf("mID %d,bid %d\n", pmod->mID, mPhyID[i].mPhyID-1); |
| | | // dbg_printf("phy_type %d, _id %d\n", mPhyID[i].mIntType, mPhyID[i].mPhyID); |
| | | } |
| | | } |
| | | else { |
| | | m->SetInputChannelDataPtr(i, 0); |
| | | } |
| | | } |
| | | // printf("\n"); |
| | | // dbg_printf("\n"); |
| | | |
| | | m->Init(); |
| | | |
| | | // 从 paramset 中获取对应的参数控制函数指针 |
| | | ParamCtrl_fn paramEntry = paramset->GetParamEntry( m->GetModuleType()); |
| | | if(paramEntry == NULL) { |
| | | printf("paramEntry is NULL!\n"); |
| | | dbg_printf("paramEntry is NULL!\n"); |
| | | } |
| | | // 调用参数控制函数 |
| | | u32 result = paramEntry(m, (uvoid*)pmod->mParamaddr, len); |
| | |
| | | // int ddr = sram_free_space(SRAM_DDR,mem_any); |
| | | // int ccm = sram_free_space(SRAM_L2,mem_any); |
| | | // int l1 = sram_free_space(SRAM_L1,mem_heap); |
| | | // printf("mListAdd:0x%x, ddr %d ccm %d l1 %d.\n", &mList, ddr, ccm ,l1); |
| | | // dbg_printf("mListAdd:0x%x, ddr %d ccm %d l1 %d.\n", &mList, ddr, ccm ,l1); |
| | | |
| | | //for (auto pl : mList) { |
| | | // delete pl; |
| | | // int l2mem = sram_free_space(SRAM_L2, mem_any); |
| | | // printf("L2mem %d\n", l2mem); |
| | | // dbg_printf("L2mem %d\n", l2mem); |
| | | //} |
| | | |
| | | if (size != nbytes) { |
| | |
| | | /*for (auto pt = mList.begin(); pt < mList.end(); pt++) { |
| | | IModule *p = *pt._Myptr; |
| | | static int i = 0; |
| | | printf("%d, id %d, type %d\n",i++, p->GetModuleID(), p->GetModuleType()); |
| | | dbg_printf("%d, id %d, type %d\n",i++, p->GetModuleID(), p->GetModuleType()); |
| | | }*/ |
| | | |
| | | return ErrStatus::SUCCESS; |
| | |
| | | head->crc = 0; |
| | | tmp_crc = CRC::crc32(bin, nbytes); |
| | | if (tmp_crc != crc) { |
| | | printf("flowchar crc check fail.\n"); |
| | | dbg_printf("flowchar crc check fail.\n"); |
| | | return ErrStatus::ERR_PARAM; |
| | | } |
| | | processed = ufalse; |
| | |
| | | ErrStatus ToB::toProc() |
| | | { |
| | | if(processed) { |
| | | for (auto iter = mList.begin(); iter < mList.end(); iter++) { |
| | | // if(((*iter)->GetModuleType() >= PROC_FEEDBACK) && ((*iter)->GetModuleType() <= PROC_FEEDBACK)) { |
| | | for (auto iter : mList) {// = mList.begin(); iter < mList.end(); iter++) { |
| | | // if(((*iter)->GetModuleType() >= PROC_COMPRESS) && ((*iter)->GetModuleType() <= PROC_COMPRESS)) { |
| | | // printf("%d ", (*iter)->GetModuleID()); |
| | | (*iter)->Proc(); |
| | | // int ii = 2; |
| | | // } |
| | | iter->Proc(); |
| | | } |
| | | // printf("\n"); |
| | | // dbg_printf("\n"); |
| | | } |
| | | else { |
| | | MuteOutput(); |
| | |
| | | /*ErrStatus ToB::toCtrl(u32 mID, u32 pID, const s16* val, u32 num) |
| | | { |
| | | if(mID >= mModuleIndex.size() || mModuleIndex[mID] == 0) { |
| | | printf("ToB::toCtrl mID Error!\n"); |
| | | dbg_printf("ToB::toCtrl mID Error!\n"); |
| | | return ErrStatus::ERR_PARAM; |
| | | } |
| | | |
| | | IModule* m = mList[mModuleIndex[mID]-1]; |
| | | if(!m) { |
| | | printf("ToB::toCtrl m Error!\n"); |
| | | dbg_printf("ToB::toCtrl m Error!\n"); |
| | | return ErrStatus::ERR_PARAM; |
| | | } |
| | | |
| | | auto entries = paramset->GetEntries(m->GetModuleType()); |
| | | if(!entries.second) { |
| | | printf("ToB::toCtrl entries Error!\n"); |
| | | dbg_printf("ToB::toCtrl entries Error!\n"); |
| | | return ErrStatus::ERR_METHOD; |
| | | } |
| | | |
| | |
| | | // m->Ctrl(pID, val, num); |
| | | paramset->GetCtrlEntry(m->GetModuleType())(m, pID, (s16*)val, num); |
| | | } |
| | | // printf("mID:%d pID:%d val[0]:%d val[1]:%d\n",mID, pID, val[0], val[1]); |
| | | // dbg_printf("mID:%d pID:%d val[0]:%d val[1]:%d\n",mID, pID, val[0], val[1]); |
| | | return ErrStatus::SUCCESS; |
| | | } |
| | | |
| | |
| | | } |
| | | |
| | | |
| | | u32 ToB::GetLevels(s16* buffer) |
| | | u32 ToB::GetLevels(s16* buffer, u32 level_max_len) |
| | | { |
| | | u32 n =0,size =0; |
| | | |
| | | u32 remain_len; |
| | | if( !processed ) { |
| | | return 0; |
| | | } |
| | | for (std::vector<IModule*>::iterator iter = mList.begin(); |
| | | iter != mList.end() ; iter++) { |
| | | size = (*iter)->GetLevel(buffer + n ); |
| | | // printf("proc %s level num:%d\n",type_string[(*iter)->GetModuleType()],size); |
| | | for (std::vector<IModule*>::iterator iter = mList.begin(); iter != mList.end(); iter++) { |
| | | remain_len = level_max_len - n; |
| | | size = (*iter)->GetLevel(buffer + n, remain_len); |
| | | // dbg_printf("proc:%s level num:%d remain:%d\n", type_string[(*iter)->GetModuleType()], size, remain_len); |
| | | n += size; |
| | | } |
| | | |
| | |
| | | ErrStatus toCtrl(u32 mID, u32 pID, const s16* val, u32 num); |
| | | ErrStatus toCtrl(const u8* bin , u32 nbytes); |
| | | ErrStatus toAnalysis(const u8* bin, u32 nbytes); |
| | | u32 GetLevels(s16* buffer); |
| | | u32 GetLevels(s16* buffer, u32 levels_len); |
| | | u16 GetModuleNum() {return mModuleNum;} |
| | | |
| | | u32 GetDSPIndex(){return dsp_index ;} |
| | |
| | | /* |
| | | <<<<<<< HEAD |
| | | ** ADSP-21569 linker description file generated on Sep 05, 2025 at 15:48:19. |
| | | ======= |
| | | ** ADSP-21569 linker description file generated on Jul 24, 2025 at 14:17:30. |
| | | >>>>>>> 0d5b7df96a2ee186b7b085dca9cf9a33f791c430 |
| | | ** ADSP-21569 linker description file generated on Oct 28, 2025 at 17:44:48. |
| | | */ |
| | | /* |
| | | ** Copyright (C) 2000-2023 Analog Devices Inc., All Rights Reserved. |
| | |
| | | ldf_stack_space = heaps_and_system_stack_in_L1; |
| | | ldf_stack_end = (ldf_stack_space + (((heaps_and_system_stack_in_L1_length * 57344) / 189440) - 8)); |
| | | ldf_stack_length = ldf_stack_end - ldf_stack_space; |
| | | L1mem_space = ldf_stack_end + 8; |
| | | L1mem_end = (L1mem_space + (((heaps_and_system_stack_in_L1_length * 132096) / 189440) - 8)); |
| | | L1mem_length = L1mem_end - L1mem_space; |
| | | L1Mem_space = ldf_stack_end + 8; |
| | | L1Mem_end = (L1Mem_space + (((heaps_and_system_stack_in_L1_length * 132096) / 189440) - 8)); |
| | | L1Mem_length = L1Mem_end - L1Mem_space; |
| | | } > mem_block0_bw |
| | | |
| | | dxe_l2_stack_and_heap_expand NO_INIT BW |
| | |
| | | /* |
| | | <<<<<<< HEAD |
| | | ** ADSP-21569 user heap source file generated on Sep 05, 2025 at 15:48:19. |
| | | ======= |
| | | ** ADSP-21569 user heap source file generated on Jul 24, 2025 at 14:17:30. |
| | | >>>>>>> 0d5b7df96a2ee186b7b085dca9cf9a33f791c430 |
| | | ** ADSP-21569 user heap source file generated on Oct 28, 2025 at 17:44:48. |
| | | */ |
| | | /* |
| | | ** Copyright (C) 2000-2023 Analog Devices Inc., All Rights Reserved. |
| | |
| | | |
| | | extern "asm" unsigned long ldf_heap_space; |
| | | extern "asm" unsigned long ldf_heap_length; |
| | | extern "asm" int L1mem_space; |
| | | extern "asm" int L1mem_length; |
| | | extern "asm" int L1Mem_space; |
| | | extern "asm" int L1Mem_length; |
| | | extern "asm" int DDRHeap_space; |
| | | extern "asm" int DDRHeap_length; |
| | | |
| | |
| | | { |
| | | |
| | | { &ldf_heap_space, (unsigned long) &ldf_heap_length, 0 }, |
| | | { &L1mem_space, (unsigned long) &L1mem_length, 1 }, |
| | | { &L1Mem_space, (unsigned long) &L1Mem_length, 1 }, |
| | | { &DDRHeap_space, (unsigned long) &DDRHeap_length, 2 }, |
| | | |
| | | { (void *)0, (size_t)0, 0 } /* This terminates the table. */ |
| | |
| | | /* |
| | | <<<<<<< HEAD |
| | | ** ADSP-21569 startup code generated on Sep 05, 2025 at 15:48:19. |
| | | ======= |
| | | ** ADSP-21569 startup code generated on Jul 24, 2025 at 14:17:29. |
| | | >>>>>>> 0d5b7df96a2ee186b7b085dca9cf9a33f791c430 |
| | | ** ADSP-21569 startup code generated on Oct 28, 2025 at 17:44:48. |
| | | */ |
| | | /* |
| | | ** Copyright (C) 2000-2023 Analog Devices Inc., All Rights Reserved. |