/*
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* FIR_acc.c
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*
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* Created on: 2022Äê5ÔÂ13ÈÕ
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* Author: graydon
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*/
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//#include <def21489.h>
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//#include <cdef21489.h>
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#include <services/int/adi_int.h>
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#include <string.h>
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#include "FIR_acc.h"
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#include "memory.h"
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enum acc_status{
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acc_idle,
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acc_processing,
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acc_completely,
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};
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/* Declaring the external buffers needed for FIR Accelerator*/
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struct FIR_tcb {
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u16 id;
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u8 cp_update;
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ubool remove;
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u32 mtap;
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const ufloat* ip_buff; //ÊäÈëÊý¾ÝBUFFER. TAPS+WINDOW_SIZE-1
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const ufloat* op_buff; //Êä³öÊý¾ÝBUFFER.WINDOW_SIZE
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const ufloat* cf_buff; //ϵÊýBUFFER. TAPS,×î´ó1024.
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const ufloat* cf_temp; //ϵÊýÁÙʱBUFFER. TAPS,×î´ó1024.
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s32 tcb[13]; //DMA tcb.
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struct FIR_tcb* next;
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uvoid* content;
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acc_completely_handler callback;
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};
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struct FIR_tcb_head {
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u8 status;
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ubool stop;
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u16 num ;
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u32 count;
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struct FIR_tcb* next;
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};
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static volatile struct FIR_tcb_head firHead;
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void fir_acc_isr(s32 sig, uvoidptr arg)
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{
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// if(*pFIRDMASTAT & FIR_DMAACDONE){ //All Channels Done
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firHead.status = acc_completely;
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firHead.count++;
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if(!firHead.stop)
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fir_acc_startup();
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// }
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}
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uvoid fir_acc_init()
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{
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s32 temp;
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u32 _sig = 0xD;
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s32 index = _sig*5/30;
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s32 offset = (_sig-index*6)*5 ;
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//Mapping the FFT DMA interrupt
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// temp=* (pPICR0+index);
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// temp&=~(0x1f<<offset);
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// temp|= (0x1b<<offset);
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// *(pPICR0+index)=temp;
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//
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// //Selecting the FIR Accelerator
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// temp = *pPMCTL1;
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// temp &= ~(BIT_17|BIT_18);
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// temp |= FIRACCSEL; //FIRÓëFFT ¶þÑ¡Ò».
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// *pPMCTL1 = temp;
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//
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// //PMCTL1 effect latency
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// asm("nop;nop;nop;nop;");
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//
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// //Now Enabling the FIR Acceleratord
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// *pFIRCTL1= 0; //FIR_EN|FIR_DMAEN|FIR_CH8;
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//
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// adi_int_InstallHandler(ADI_CID_P13I, fir_acc_isr, 0, true);
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memset((uvoid*)&firHead, 0 , sizeof(firHead));
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}
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uvoid fir_acc_delete()
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{
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struct FIR_tcb* fir = firHead.next;
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firHead.stop = utrue;
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while(firHead.status == acc_processing) ;
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//delete tcb.
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while(fir != NULL) {
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struct FIR_tcb* q = fir;
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fir = fir->next;
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sram_free(SRAM_L2, q);
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firHead.num --;
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}
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firHead.next = NULL;
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firHead.stop = ufalse;
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firHead.count =0;
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firHead.status = 0;
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}
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uvoid fir_acc_startup()
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{
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if(firHead.status == acc_completely) {
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struct FIR_tcb* fir = firHead.next;
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while(fir != NULL) {
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if(fir->callback) fir->callback(fir->content);
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if(fir->cp_update) {
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memcpy((uvoid*)fir->cf_buff, fir->cf_temp , fir->mtap*sizeof(ufloat));
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fir->cp_update = ufalse;
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}
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fir = fir->next;
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}
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firHead.status = acc_idle;
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}
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if(firHead.status == acc_idle && firHead.num > 0) {
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//Initializing the chain pointer register
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// *pCPFIR=(s32)firHead.next->tcb+12-0x80000;
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//
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// *pFIRCTL1 = 0;
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// //Now Enabling the FIR Acceleratord
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// *pFIRCTL1=FIR_EN|FIR_DMAEN|((firHead.num-1)<<1); //|FIR_CAI|FIR_CCINTR;
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firHead.status = acc_processing;
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}
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}
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u16 fir_acc_add(u16 ID
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, const ufloat* input_buffer
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, const ufloat* output_buffer
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,const ufloat* coeffs_buffer
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, u16 win_size
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,u16 tap
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,uvoid* content
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, acc_completely_handler cb)
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{
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struct FIR_tcb* fir = NULL;
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if(firHead.num >= 8) {
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return ufalse;
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}
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//check is exsit
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fir = firHead.next;
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while(fir != NULL) {
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if(fir->id == ID) {
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return ufalse;
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}
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fir = fir->next;
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}
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fir = (struct FIR_tcb*)sram_malloc(SRAM_L2, 0, sizeof(struct FIR_tcb));
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if(fir == NULL) {
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return ufalse;
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}
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if(firHead.num >=4 && tap > 512) {
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tap = 512;
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}
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fir->id = ID;
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fir->callback = cb;
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fir->ip_buff = input_buffer;
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fir->op_buff = output_buffer;
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fir->cf_buff = coeffs_buffer;
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fir->cf_temp = 0;
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fir->content = content;
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fir->cp_update = ufalse;
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fir->mtap = tap;
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fir->tcb[0] = 0; //CPFIR
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fir->tcb[1] = tap; //CCFIR
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fir->tcb[2] = 1; //CMFIR
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fir->tcb[3] = (s32)coeffs_buffer;//+tap-1; //CIFIR
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fir->tcb[4] = (s32)output_buffer; //OBFIR
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fir->tcb[5] = win_size; //OCFIR
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fir->tcb[6] = 1; //OMFIR
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fir->tcb[7] = (s32)output_buffer; //OIFIR
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fir->tcb[8] = (s32)input_buffer; //IBFIR
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fir->tcb[9] = tap+win_size-1; //ICFIR
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fir->tcb[10] = 1; //IMFIR
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fir->tcb[11] = (s32)input_buffer; //IIFIR
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fir->tcb[12] = tap-1|((win_size-1)<<14); //FIRCTL2
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fir->next = NULL;
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if(firHead.next == NULL) {
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firHead.next = fir;
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}
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else {
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struct FIR_tcb* tmp = firHead.next;
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while(tmp->next != NULL) tmp = tmp->next;
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tmp->next = fir;
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tmp->tcb[0] = (s32)fir->tcb+12;
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}
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fir->tcb[0] = (s32)firHead.next->tcb+12;
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firHead.num ++;
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return tap;
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}
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uvoid fir_acc_update_coeffs(u16 ID, const ufloat* cp)
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{
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struct FIR_tcb* fir = firHead.next;
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while(fir != NULL) {
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if(fir->id == ID) {
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fir->cf_temp = cp;
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fir->cp_update = 1;
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break;
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}
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fir = fir->next;
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}
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}
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uvoid fir_acc_remove(u16 ID)
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{
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struct FIR_tcb* fir = firHead.next;
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//delete tcb.
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while(fir != NULL) {
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if(fir->id == ID) {
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fir->remove = utrue;
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}
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fir = fir->next;
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}
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}
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//
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//ubool fir_acc_remove(u16 ID)
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//{
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// struct FIR_tcb* fir = firHead.next;
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//
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// if(fir->id == ID) {
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// firHead.next = fir->next;
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// sram_free(SRAM_PM, fir);
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// firHead.num --;
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// return utrue;
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// }
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//
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// while(fir->next != NULL) {
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// if(fir->next->id == ID) {
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// //remove fir next.
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// struct FIR_tcb* p = fir->next;
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// fir->next = fir->next->next;
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// sram_free(SRAM_PM, fir->next);
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// firHead.num --;
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// }
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// fir = fir->next;
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// }
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// return utrue;
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//}
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