ELF
4 ( .strtab .symtab .attributes seg_swco .epctext _Z11cpu_utilityv. .LN_Z11cpu_utilityv. .LN0 asyn_proc_secs. proc_secs. SAMPLE_NUM. __lib_fdiv. .LN1 .LN._Z11cpu_utilityv..end ._Z11cpu_utilityv..end AudioProcCallBack. .LNAudioProcCallBack. .LN2 _ZN3ToB11GetInstanceEv. .LCJ0 .__constant .__operator .LN3 .LN4 .P47L2 .LN5 .P47L4 .LN6 TopoLoading. .P47L12 .LN7 MuteOutput. .LCJ1 .LN8 .P47L8 .LN9 .LN10 .LN11 .LN12 .LN13 .LN14 .LN15 DMACount. .LN16 UpdateInput. .LCJ2 .LN17 .LN18 _ZN3ToB6toProcEv. .LCJ3 .LN19 .LN20 UpdateOutput. .LCJ4 .LN21 .LN22 .LN23 .LN24 .LN25 .LN26 .LN27 __Processor_cycles_per_sec .P47L10 .P47L11 .LN28 _Z22ModulesAsynSetIntervalf. .LCJ5 .LN29 .LN30 .LN.AudioProcCallBack..end .AudioProcCallBack..end _ZN5QueueI3MSGEC1Ej. .LN_ZN5QueueI3MSGEC1Ej. .LN31 _Znam. .LCJ6 .LN32 .LN33 .LN34 .LN35 .LN._ZN5QueueI3MSGEC1Ej..end ._ZN5QueueI3MSGEC1Ej..end _ZN7MessageC1Ej. .LN_ZN7MessageC1Ej. .LN36 _Znwm. .LCJ7 .P56L2 .LCJ8 .P56L3 .LN37 .LN._ZN7MessageC1Ej..end ._ZN7MessageC1Ej..end main. .LNmain. .LN38 .LN39 .LN40 .LN41 adi_initComponents. .LCJ9 .LN42 spu_config. .LCJ10 .LN43 pinmux_config. .LCJ11 .LN44 sram_init. .LCJ12 .LN45 DAI_config. .LCJ13 .LN46 .LCJ14 .P58L2 .LCJ15 .P58L3 .LN47 _ZN7Message4SendE7MsgTypePvj. .LCJ16 .LN48 SPI2_Init. .LCJ17 .P58L4 .LN49 _Z18ModulesAsynProcessv. .LCJ18 .LN50 .LN51 .LN52 _ZN7Message4ProcEv. .LCJ19 .LN53 __divrem_u32. .LCJ20 .P58L8 .LN54 .LCJ21 .LN55 .LN56 .LN57 GPIO_SetOutPut. .LCJ22 .LN58 .LN59 .LCJ23 .LN60 .LN61 .LN62 .LN63 _ZN7Message16DSPStatusProcessEP3MSG. .LCJ24 .LN64 .P58L11 .LN65 .LN66 _ZN3ToB12GetModuleCPUEP7MessageP3MSG. .LCJ25 .P58L12 .LN67 .P58L9 .LN68 g_level_report_interval. .P58L14 .LN69 .LCJ26 .LN70 .LN71 .P58L17 .LN72 .LN73 _ZN3ToB9GetLevelsEP7MessageP3MSG. .LCJ27 .LN74 .P58L18 .LN75 .P58L20 .LN76 .LN77 .LCJ28 .LN78 .LN79 .LCJ29 .LN80 .LN81 .P58L21 .LN82 .LN83 .P58L15 .LN.main..end .main..end _ZN7MessageC2Ej. .LN_ZN7MessageC2Ej. .LCJ30 .LN._ZN7MessageC2Ej..end ._ZN7MessageC2Ej..end _ZN5QueueI3MSGEC2Ej. .LN_ZN5QueueI3MSGEC2Ej. .LCJ31 .LN._ZN5QueueI3MSGEC2Ej..end ._ZN5QueueI3MSGEC2Ej..end __sti___8_main_cpp_64a17ba0. .LN__sti___8_main_cpp_64a17ba0. .LN84 _ZN29_INTERNAL_8_main_cpp_64a17ba0St9_Ios_initE. _ZNSt8ios_base4InitC1Ev. .LCJ32 .LN85 __dso_handle. _ZNSt8ios_base4InitD1Ev. __cxa_atexit. .LCJ33 .LN86 .LCJ34 .LN.__sti___8_main_cpp_64a17ba0..end .__sti___8_main_cpp_64a17ba0..end .epctext.end seg_dmda .epcdata .epc.cplus.compiled .epcbss .epcbss.end seg_ctdm .epcinit .epcinit.end .debug_abbrev .epcabbrev .epcabbrev.end .debug_info .epcdebug .epcline mDspIndex. HandShakeSuccesful. TopoRequest. .epcdebug.end .debug_line .epcline.end .debug_pubnames .epcpubnames .epcpubnames.end .debug_aranges .epcaranges .epcaranges.end ..\src\main.cpp .rela.seg_swco .align.seg_swco .align.seg_dmda .rela.seg_ctdm .align.seg_ctdm .rela..debug_info .rela..debug_line .rela..debug_pubnames .rela..debug_aranges .commandLine .adi.attributes
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I I ! 7"/ 2 @ ( 5 I 2 < $ 2 @ & I 2 I8 L 3I 2 I< ? 2 < 2 @ .2 ' I? 4 2 I ,? .2 ' ? I 4 ' 2 I, 4K ..\src\main.cpp D:\project\plugscard\dsp21569\DSP-21569\Debug C/C++ Compiler : SHARC version 8.15.0.0 (Apr 20 2022 18:13:48)
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[ce7a0e45923b14815a072ad54a672fd5bfe93d2a]
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Copyright (c) 1997-2022 Analog Devices, Inc.
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Copyright (c) 1998-2014 Edison Design Group, Inc.
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Copyright (c) 1997-1999 Edinburgh Portable Compilers, Ltd.
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bool wchar_t char signed char unsigned char short signed short unsigned short int signed int unsigned int long signed long unsigned long long long signed long long unsigned long long short _Fract áÿÿÿ_Fract áÿÿÿlong _Fract áÿÿÿunsigned short _Fract àÿÿÿunsigned _Fract àÿÿÿunsigned long _Fract àÿÿÿfloat double long double void * _Ptrdifft _Sizet _Int32t æ _Uint32t õ _Longlong 1 _ULonglong T _Wchart y _Wintt y
va_list ¨ _Va_list ® þ _Mbstatet _Wchar # _State
# _Mbstatet Ë _Sysch_t
size_t ptrdiff_t Þ } __heap_desc base ' # length #userid Þ # __heap_desc_t : » div_t quot Þ # rem Þ # div_t ò ldiv_t quot # rem # ldiv_t Ç + lldiv_t quot 1 # rem 1 # lldiv_t ÿ B _t_atexit_fp 9 n Þ
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'
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' _t_compare_fp U Þ
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'
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' _t_cpp_compare_fp errno_t Þ ç
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msg ²6
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ptr '
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error ³ Á constraint_handler_t ç ; _mbstatet _wchar Þ # _state
# _mbstatet y fpos_t _off # _state ; # fpos_t K z FILE 4_Mode õ # fileID Þ # _Next ² #_Rend ² # _Wend ² #bufadr ² #_Bend ² #_Buf ² # rsave ² # nback Þ #$onechar #( O pad A #) j õ _Back \ #, FILE int8_t int16_t ° int32_t O uint8_t uint16_t Ë uint32_t ] int_least8_t int_least16_t ° uint_least8_t uint_least16_t Ë int_least32_t O uint_least32_t ] int_fast8_t int_fast16_t ° uint_fast8_t uint_fast16_t Ë int_fast32_t O uint_fast32_t ] uintptr_t õ intptr_t Þ int64_t l uint64_t | int_least64_t l uint_least64_t | int_fast64_t l uint_fast64_t | intmax_t l uintmax_t | é ADI_CORE_ENABLE_STATUS ADI_CORE_ENABLE_SUCCESS ADI_CORE_ENABLE_INVALID_CORE ADI_CORE_ENABLE_CURRENT_CORE ADI_CORE_ENABLE_STATUS q -
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ADI_CORE_ID ADI_CORE_SHARC0 ADI_CORE_ID
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³
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_adiCacheStatus adi_cache_success adi_cache_unsuitable_rr adi_cache_anom_rr_fail adi_cache_failure adiCacheStatus ?
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f _adiRangeReg adi_cache_rr0 adi_cache_rr1 adi_cache_rr2 adi_cache_rr3 adi_cache_rr4 adi_cache_rr5
adi_cache_rr6 adi_cache_rr7 adiRangeReg È
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_adiRangeSetting adi_cache_disable_range adi_cache_noncacheable_range adi_cache_flush_range adi_cache_lock_range adi_cache_wt_range adiRangeSetting x = __builtin_quad acc80 % _cycle_t I Ú cycle_stats_t _cycles N # _max_cycles N #_min_cycles N #_total_cycles N # _num_calls # cycle_stats_t ] clock_t time_t ¬ tm $tm_sec Þ # tm_min Þ #tm_hour Þ #tm_mday Þ # tm_mon Þ #tm_year Þ #tm_wday Þ #tm_yday Þ # tm_isdst Þ # adi_rtl_mutex Ö â ADI_RTL_INVALID_MUTEX þ ADI_RTL_TLS_LEN 5 _LOCK_STREAM _LOCK_MALLOC _LOCK_LOCALE gpio_regs 5 GPIO_TypeDef B GPIO_Pin_Mode MODE_0 MODE_1 MODE_2 MODE_3 GPIO_Pin_Mode Z Ö GPIO_Direction GPIO_IN GPIO_OUT GPIO_Direction © GPIO_Level GPIO_LOW GPIO_HIGH GPIO_Level ë a SPIStatus SPI_BUSY SPI_TX SPI_RX SPI_TRX SPIStatus ' s8
s16 ° s32 Þ u8 u16 Ë u32 õ u64 T ufloat ubool udouble void uvoid Ü uvoidptr ' name_t ý v SourceSignal DAI0_PB01_O DAI0_PB02_O DAI0_PB03_O DAI0_PB04_O DAI0_PB05_O DAI0_PB06_O DAI0_PB07_O DAI0_PB08_O DAI0_PB09_O DAI0_PB10_O DAI0_PB11_O
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DAI0_PB12_O DAI0_PB19_O DAI0_PB20_O DAI1_PB01_O DAI1_PB02_O DAI1_PB03_O DAI1_PB04_O DAI1_PB05_O DAI1_PB06_O DAI1_PB07_O DAI1_PB08_O DAI1_PB09_O DAI1_PB10_O DAI1_PB11_O DAI1_PB12_O DAI1_PB19_O DAI1_PB20_O SPT0_AD0_O SPT0_AD1_O SPT0_BD0_O SPT0_BD1_O SPT1_AD0_O SPT1_AD1_O !SPT1_BD0_O "SPT1_BD1_O #SPT2_AD0_O $SPT2_AD1_O %SPT2_BD0_O &SPT2_BD1_O 'SPT3_AD0_O (SPT3_AD1_O )SPT3_BD0_O *SPT3_BD1_O +SPT4_AD0_O ,SPT4_AD1_O -SPT4_BD0_O .SPT4_BD1_O /SPT5_AD0_O 0SPT5_AD1_O 1SPT5_BD0_O 2SPT5_BD1_O 3SPT6_AD0_O 4SPT6_AD1_O 5SPT6_BD0_O 6SPT6_BD1_O 7SPT7_AD0_O 8SPT7_AD1_O 9SPT7_BD0_O :SPT7_BD1_O ;PCG_CLKA_O <PCG_CLKB_O =PCG_CLKC_O >PCG_CLKD_O ?PCG_FSA_O À PCG_FSB_O Á PCG_FSC_O Â PCG_FSD_O Ã SRC0_DAT_OP_O Ä SRC0_TDM_IP_O Å SRC1_DAT_OP_O Æ SRC1_TDM_IP_O Ç SRC2_DAT_OP_O È SRC2_TDM_IP_O É SRC3_DAT_OP_O Ê SRC3_TDM_IP_O Ë LOGIC_LOW Ì LOGIC_HIGH Í SourceSignalCount Î SourceSignal H DestSignal DAI0_PB01_I DAI0_PB02_I DAI0_PB03_I DAI0_PB04_I DAI0_PB05_I DAI0_PB06_I DAI0_PB07_I DAI0_PB08_I DAI0_PB09_I DAI0_PB10_I DAI0_PB11_I
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DAI0_PB12_I DAI0_PB19_I DAI0_PB20_I DAI1_PB01_I DAI1_PB02_I DAI1_PB03_I DAI1_PB04_I DAI1_PB05_I DAI1_PB06_I DAI1_PB07_I DAI1_PB08_I DAI1_PB09_I DAI1_PB10_I DAI1_PB11_I DAI1_PB12_I DAI1_PB19_I DAI1_PB20_I DAI0_PBEN01_I DAI0_PBEN02_I DAI0_PBEN03_I DAI0_PBEN04_I DAI0_PBEN05_I DAI0_PBEN06_I !DAI0_PBEN07_I "DAI0_PBEN08_I #DAI0_PBEN09_I $DAI0_PBEN10_I %DAI0_PBEN11_I &DAI0_PBEN12_I 'DAI0_PBEN19_I (DAI0_PBEN20_I )DAI1_PBEN01_I *DAI1_PBEN02_I +DAI1_PBEN03_I ,DAI1_PBEN04_I -DAI1_PBEN05_I .DAI1_PBEN06_I /DAI1_PBEN07_I 0DAI1_PBEN08_I 1DAI1_PBEN09_I 2DAI1_PBEN10_I 3DAI1_PBEN11_I 4DAI1_PBEN12_I 5DAI1_PBEN19_I 6DAI1_PBEN20_I 7SPT0_ACLK_I 8SPT0_BCLK_I 9SPT0_AFS_I :SPT0_BFS_I ;SPT0_AD0_I <SPT0_AD1_I =SPT0_BD0_I >SPT0_BD1_I ?SPT1_ACLK_I À SPT1_BCLK_I Á SPT1_AFS_I Â SPT1_BFS_I Ã SPT1_AD0_I Ä SPT1_AD1_I Å SPT1_BD0_I Æ SPT1_BD1_I Ç SPT2_ACLK_I È SPT2_BCLK_I É SPT2_AFS_I Ê SPT2_BFS_I Ë SPT2_AD0_I Ì SPT2_AD1_I Í SPT2_BD0_I Î SPT2_BD1_I Ï SPT3_ACLK_I Ð SPT3_BCLK_I Ñ SPT3_AFS_I Ò SPT3_BFS_I Ó SPT3_AD0_I Ô SPT3_AD1_I Õ SPT3_BD0_I Ö SPT3_BD1_I × SPT4_ACLK_I Ø SPT4_BCLK_I Ù SPT4_AFS_I Ú SPT4_BFS_I Û SPT4_AD0_I Ü SPT4_AD1_I Ý SPT4_BD0_I Þ SPT4_BD1_I ß SPT5_ACLK_I à SPT5_BCLK_I á SPT5_AFS_I â SPT5_BFS_I ã SPT5_AD0_I ä SPT5_AD1_I å SPT5_BD0_I æ SPT5_BD1_I ç SPT6_ACLK_I è SPT6_BCLK_I é SPT6_AFS_I ê SPT6_BFS_I ë SPT6_AD0_I ì SPT6_AD1_I í SPT6_BD0_I î SPT6_BD1_I ï SPT7_ACLK_I ð SPT7_BCLK_I ñ SPT7_AFS_I ò SPT7_BFS_I ó SPT7_AD0_I ô SPT7_AD1_I õ SPT7_BD0_I ö SPT7_BD1_I ÷ PCG_EXTA_I ø PCG_EXTB_I ù PCG_EXTC_I ú PCG_EXTD_I û SRC0_CLK_IP_I ü SRC0_FS_IP_I ý SRC0_DAT_IP_I þ SRC0_CLK_OP_I ÿ SRC0_FS_OP_I SRC0_TDM_OP_I SRC1_CLK_IP_I SRC1_FS_IP_I SRC1_DAT_IP_I SRC1_CLK_OP_I
SRC1_FS_OP_I SRC1_TDM_OP_I SRC2_CLK_IP_I SRC2_FS_IP_I SRC2_DAT_IP_I SRC2_CLK_OP_I SRC2_FS_OP_I SRC2_TDM_OP_I SRC3_CLK_IP_I SRC3_FS_IP_I SRC3_DAT_IP_I SRC3_CLK_OP_I SRC3_FS_OP_I SRC3_TDM_OP_I DestSignalCount DestSignal SportDef spid ° # enable ° #enable_sec ° #interrupt ° #rx ° #opmode ° #
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clke ° # lfs ° #mfd ° #slots ° #vld ° #vld_b ° # PCGDef enable ° # opmode ° #invert ° #width ° #sclk_div ° #fs_div ° #
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à SRCDef enable ° # format ° #wordLen ° #ratio ° # RouteDef source Ë # dest Ë #
DSPConfig mDualDsp Ë # mDspIndex Ë #mLevelReportInt Ë #mLocalTxNum Ë #mDanteRxNum Ë #mDanteTxNum Ë #
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mConvertUnit Ë # Ä Ë pad ¶ #mRouteNum Ë #mSampleNum Ë #mSampleRate õ # Y sports # 9 pcgs + # V à ` _ routes H #Ð u srcs g #Ð DMARegs DMARegsDef
sport_regs SportRegsDef ¡ B! AudioCodec é Õ dataPtr Û # slot_num ® #channel_num ® # rx ® #
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enable_sec ® # ! MemoryType SRAM_L2 SRAM_L1 SRAM_DDR SRAM_AUTO MemoryType B! Ü! meml1_sub_type mem_pm mem_dm1 mem_dm2 mem_heap mem_any meml1_sub_type ! rsize_t ß" ADI_STRING_S_ERR_OK ADI_STRING_S_ERR_NULL ADI_STRING_S_ERR_BOUNDS ADI_STRING_S_ERR_OVERLAP ADI_STRING_S_ERR_INVALID ADI_STRING_S_ERR_ADDRESSING ADI_STRING_S_ERR_RSIZE_MAX ADI_STRING_S_NUM_ERR_CODES *$ MsgType MSG_HANDSHAKE_REQ MSG_HANDSHAKE_RES MSG_REHANDSHAKE_REQ MSG_REHANDSHAKE_RES MSG_TOPO_REQ MSG_TOPO_RES MSG_PRESET_REQ MSG_PRESET_RES MSG_PARMA_CTRL_REQ MSG_PARAM_CTRL_RES MSG_LEVEL_GET_REQ MSG_LEVEL_GET_RES MSG_DSP_STATUS_REQ MSG_DSP_STATUS_RES MSG_MODULE_CPU_REQ MSG_MODULE_CPU_RES ë$ MSG magic Ë # dataLen Ë #totalPkts Ë #pktNo Ë #msgType #checksum # result #
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subType # msgID õ # Ü$
ð ï data Ì$ # /% ModuleInterfaceType SOFT_MODULE PHY_INPUT PHY_OUTPUT ¬% FlowChartHead crc Þ # module_num Ë #compress #pad # % Ë dsp_buffer_num
% # (& Module mID õ # mType Ë #mTag Ë #mRxNum #mTxNum # mDsp #
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mPhyModule # & Param mID õ # mType #slotID #cpu Ë #pID #dspID # num Ë #
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Â& Level mID Ë # num Ë # J' DSPStatus mCpu õ # mInternalUnUsedMem õ #mExternalUnUsedMem õ #mDDRPassed # <' pad .' # û( lconv 0decimal_point ¨ # thousands_sep ¨ #grouping ¨ #int_curr_symbol ¨ # currency_symbol ¨ #mon_decimal_point ¨ #mon_thousands_sep ¨ #mon_grouping ¨ # positive_sign ¨ # negative_sign ¨ #$int_frac_digits
#(frac_digits
#)p_cs_precedes
#*p_sep_by_space
#+n_cs_precedes
#,n_sep_by_space
#-p_sign_posn
#.n_sign_posn
#/ _Filet z ) Message w) Queue size ¡ # *$ dataPtr 4) #wpos ¡ #rpos ¡ # count ¡ # ) txQueue w) # Þ) ErrStatus SUCCESS ERR_PARAM ERR_METHOD ERR_PATH ERR_NULLPTR * PTYPE pint pfloat pstring pbool e* Frame mMute  # mExtBuffer  #mSize # µ mData O* # G+ IModule $mID ¡ #mTag #mType #
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mInputPortNum # mOutputPortNum #* Î* Ó* mDataIn Ù* # * ð* mDataOut ö* #mSampleRate ¡ #mSampleNum ¡ # mSecs µ # §+ ø0
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n ¡
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linkEnable Â
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sampleRate ¡
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sampleNum ¡
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inputNum
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outputNum G+ Create §+ ç+ allocator ªD # rebind ., _Vector_val ¦A # other º+ _Alty , _Alval , # Ë, vector ç+ # value_type ð* value_type G, X, pointer i, _Tptr o, pointer }, _Myfirst , #_Mylast , #_Myend , # î, Frames dataFrame ., # Ï. ModuleType AnaInput DanteInput ARMInput USBInput AECInput DummyInput AnaOutput DanteOutput ARMOutput USBOutput AECOutput DummyOutput Meter Expander !Compress "Limiter #Mixer $Delay %Gain &GainSharingAM 'GatingAM (ContinuitySPL )GapSPL *Ducker +AGC ,Route -SignalGenerator .NoiseGate /EQ à GEQ á CrossOver â NHS ã AEC ä ANS å FIR æ AFC ç HighPass è LowPass é HighShelf ê LowShelf ë AllPass ì Reverb Echo Pitch 2/ ModuleEntry module_type # link_enable  #pad  #module_create + # _/ allocator -E # rebind ¦/ _Vector_val ¦A # other 2/ _Alty }/ _Alval / # C0 vector _/ # value_type Ï. value_type ¿/ Ð/ pointer á/ _Tptr ç/ pointer õ/ _Myfirst 0 #_Mylast 0 #_Myend 0 # k0 ExportModules modules ¦/ # 0 allocator °E # rebind ß0 _Vector_val ¦A # other k0 _Alty ¶0 _Alval Â0 # 1 vector 0 # e* value_type ø0 value_type þ0 1 pointer 1 _Tptr &1 pointer 41 _Myfirst @1 #_Mylast @1 #_Myend @1 # ¯1 allocator 3F # rebind ö1 _Vector_val ¦A # other 1 _Alty Í1 _Alval Ù1 # 2 vector ¯1 # value_type value_type 2 2 pointer 12 _Tptr 72 pointer E2 _Myfirst Q2 #_Mylast Q2 #_Myend Q2 # @3 ToB 0mList ß0 # mModuleIndex ö1 # Ë, frames Ä2 # dsp_index ¡ #$dual_dsp  #(processed  #)mModuleNum #*mLevelPacketNum #, ä3 .mList ß0 # mModuleIndex ö1 #frames Ä2 # dsp_index ¡ #$dual_dsp  #(processed  #)mModuleNum #*mLevelPacketNum #, _Elem
4 char_traits _Traits ð3 ¤4 ostream 4á@ # e4 _Sentry_base _Myt 4 B4 _Myostr M4 # 4 sentry -4 # _Ok p # _Ok p # _Myos 4 _Elem
_Traits ð3 _Myos 4 _Elem
_Traits ð3 ¤5 istream 8á@ # B5 _Sentry_base _Myt ð4 5 _Myistr *5 # i5 sentry
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5 # _Ok p # 5 _Ok p # streamsize Þ _Chcount 5 #4 _Myis ð4 ¿5 ctype _Ctype °5 _Elem
_Traits ð3 _Myis ð4 _Elem
_Traits ð3 _Myis ð4 _Ctype °5 _Bool p B6 _Lockit V6 _Mutex x6 _Uninitialized _Noinit 6
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G x6 _Prhand 6 Ç6 exception
6 _Ptr ²6 # è6 bad_exception 6 # ñ6 è6 terminate_handler ñ6 7 7 unexpected_handler 7 T7 bad_alloc 6 # |7 bad_array_new_length 77 #
7 |7 new_handler
7 °7 nothrow_t streamoff 8 fpos _Stz ù7 _Myoff °7 # _Fpos y #_Statetype þ _Mystate ù7 # streampos À7 stringbuf istringstream ostringstream filebuf ifstream ofstream 8 _String_base 8 char_allocator à8 _String_val 8 # _Alval 8 # : string ±8 # npos G A9 reverse_iterator iter_type ¨ current 9 # 9 const_reverse_iterator iter_type ²6 current `9 # Í9 _Bxty _Elem
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