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è3 4 ( .strtab .symtab .attributes seg_swco .epctext adi_pwr_cfg0_init. .LNadi_pwr_cfg0_init. .LN0 .LN1 .LN2 .LN3 .LN4 .LN5 .LN6 .LN7 .LN8 .LN9 .LN10 .LN11 .LN12 .LN13 .LN14 .LN15 .LN16 .LN17 .LN18 .LN19 .LN20 .LN21 .LN22 .LN23 .LN24 .LN25 .LN26 .LN27 adi_dmc_lane_reset. .LCJ0 .__constant .__operator .P33L1 .LN28 .P33L2 .LN29 adi_pwr_ClockInit. .LCJ1 .LN30 .P33L5 .LN31 .P33L7 .LN32 .LCJ2 .LN33 .P33L9 .LN34 .P33L10 .LN35 .LN36 .LN.adi_pwr_cfg0_init..end .adi_pwr_cfg0_init..end .epctext.end .debug_abbrev .epcabbrev .epcabbrev.end .debug_info .epcdebug .epcline .epcdebug.end .debug_line .epcline.end .debug_pubnames .epcpubnames .epcpubnames.end .debug_aranges .epcaranges .epcaranges.end ..\drv\pwr.c .rela.seg_swco .align.seg_swco .rela..debug_info .rela..debug_line .rela..debug_pubnames .rela..debug_aranges .commandLine .adi.attributes ¯ ñÿ
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2 ' 2 ' I I 2 < & I I ! 7"/ 2 I8 2 @ 5 I .2 ' I? 4 2 I ,? z ..\drv\pwr.c D:\project\plugscard\dsp21569\DSP-21569\Debug C/C++ Compiler : SHARC version 8.15.0.0 (Apr 20 2022 18:13:48)
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[ce7a0e45923b14815a072ad54a672fd5bfe93d2a]
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Copyright (c) 1997-2022 Analog Devices, Inc.
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Copyright (c) 1998-2014 Edison Design Group, Inc.
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Copyright (c) 1997-1999 Edinburgh Portable Compilers, Ltd.
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bool wchar_t char signed char unsigned char short signed short unsigned short int signed int unsigned int long signed long unsigned long long long signed long long unsigned long long short _Fract áÿÿÿ_Fract áÿÿÿlong _Fract áÿÿÿunsigned short _Fract àÿÿÿunsigned _Fract àÿÿÿunsigned long _Fract àÿÿÿfloat double long double _Complex float _Complex double _Complex long double void * _Ptrdifft _Sizet _Int32t ã _Uint32t ò _Longlong . _ULonglong Q _Wintt Û _Wchart Û va_list å _Va_list ë ; _Mbstatet _Wchar × # _State # _Mbstatet _Sysch_t int8_t int16_t int32_t uint8_t uint16_t È uint32_t int_least8_t int_least16_t uint_least8_t uint_least16_t È int_least32_t uint_least32_t int_fast8_t int_fast16_t uint_fast8_t uint_fast16_t È int_fast32_t uint_fast32_t uintptr_t ò intptr_t Û int64_t © uint64_t ¹ int_least64_t © uint_least64_t ¹ int_fast64_t © uint_fast64_t ¹ intmax_t © uintmax_t ¹ ¨ ADI_CORE_ENABLE_SUCCESS ADI_CORE_ENABLE_INVALID_CORE ADI_CORE_ENABLE_CURRENT_CORE ADI_CORE_ENABLE_STATUS F á ADI_CORE_SHARC0 ADI_CORE_ID Å g _adiCacheStatus adi_cache_success adi_cache_unsuitable_rr adi_cache_anom_rr_fail adi_cache_failure adiCacheStatus ó _adiRangeReg adi_cache_rr0 adi_cache_rr1 adi_cache_rr2 adi_cache_rr3 adi_cache_rr4 adi_cache_rr5
adi_cache_rr6 adi_cache_rr7 adiRangeReg | Ã _adiRangeSetting adi_cache_disable_range adi_cache_noncacheable_range adi_cache_flush_range adi_cache_lock_range adi_cache_wt_range adiRangeSetting , ñ __builtin_quad acc80 Ù size_t ptrdiff_t Û wchar_t Û k __heap_desc base d # length ý #userid Û # __heap_desc_t ( ¤ quot Û # rem Û # div_t Õ quot # rem # ldiv_t °
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quot . # rem . # lldiv_t â
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_t_atexit_fp
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J
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Û d d _t_compare_fp 1
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errno_t Û
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msg ç ptr d error ^
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l
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constraint_handler_t
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m sysreg_I6 sysreg_I7 sysreg_B6 sysreg_B7 sysreg_ASTAT sysreg_ASTATX sysreg_ASTATY sysreg_USTAT1 sysreg_USTAT3 sysreg_USTAT2 sysreg_USTAT4
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sysreg_MODE1 sysreg_MODE2 sysreg_MODE1STK sysreg_IRPTL sysreg_IMASK sysreg_IMASKP __unsupported_sysreg_2 sysreg_MMASK sysreg_FLAGS sysreg_PCSTKP sysreg_PCSTK sysreg_CURLCNTR sysreg_LADDR sysreg_STKY sysreg_STKYX sysreg_STKYY __num_SysRegs adi_dispatched_callback_t d
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¨ u m adi_dispatched_handler_t ¨ û ADI_INT_SUCCESS ADI_INT_FAILURE ADI_INT_STATUS Í
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2 iid handlerArg d ADI_INT_HANDLER_PTR 2
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~ pCBParam d Event pArg d R ADI_CALLBACK ~ char_t float32_t ÿ float64_t _ADI_Thread_Handle Ä ADI_OSAL_THREAD_HANDLE Ú _ADI_Sem_Handle ý ADI_OSAL_SEM_HANDLE _ADI_Mutex_Handle 0 ADI_OSAL_MUTEX_HANDLE E _ADI_Queue_Handle g ADI_OSAL_QUEUE_HANDLE | _ADI_Event_Handle ADI_OSAL_EVENT_HANDLE ³ + ADI_OSAL_SUCCESS ADI_OSAL_FAILED ADI_OSAL_BAD_COUNT ADI_OSAL_BAD_EVENT ADI_OSAL_BAD_HANDLE ADI_OSAL_BAD_HEAP ADI_OSAL_BAD_IVG_LEVEL ADI_OSAL_BAD_MEMORY ADI_OSAL_BAD_OPTION ADI_OSAL_BAD_PRIO_INHERIT ADI_OSAL_BAD_PRIORITY
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ADI_OSAL_BAD_SLOT_KEY ADI_OSAL_BAD_STACK_ADDR ADI_OSAL_BAD_STACK_SIZE ADI_OSAL_BAD_THREAD_FUNC ADI_OSAL_BAD_THREAD_NAME ADI_OSAL_BAD_TIME ADI_OSAL_BAD_TIMER_PERIOD ADI_OSAL_CALLBACK_FAILED ADI_OSAL_CALLER_ERROR ADI_OSAL_COUNT_OVERFLOW ADI_OSAL_DESTROY_SELF ADI_OSAL_IVG_LEVEL_IN_USE ADI_OSAL_MEM_ALLOC_FAILED ADI_OSAL_NOT_MUTEX_OWNER ADI_OSAL_OS_ERROR ADI_OSAL_PRIORITY_IN_USE ADI_OSAL_QUEUE_EMPTY ADI_OSAL_QUEUE_FULL ADI_OSAL_START_FAILED ADI_OSAL_THREAD_PENDING ADI_OSAL_TIMEOUT ADI_OSAL_SLOT_NOT_ALLOCATED ADI_OSAL_MEM_TOO_SMALL ! ADI_OSAL_INVALID_ARGS " ADI_OSAL_STATUS Õ
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J A ADI_OSAL_ISR_PTR J
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v d g ADI_OSAL_THREAD_PTR v © + d ADI_OSAL_CALLBACK_PTR © ADI_OSAL_SLOT_VALUE d
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þ Slot_value Ë å ADI_OSAL_TLS_CALLBACK_PTR þ ADI_OSAL_TLS_SLOT_KEY ADI_OSAL_PRIORITY ADI_OSAL_TICKS ADI_OSAL_EVENT_FLAGS Æ ADI_OSAL_EVENT_FLAG_ANY ADI_OSAL_EVENT_FLAG_ALL ADI_OSAL_EVENT_FLAG_OPTION O ADI_OSAL_PRIO_INHERIT_ENABLED ADI_OSAL_PRIO_INHERIT_DISABLED ADI_OSAL_PRIO_INHERIT_AUTO ADI_OSAL_PRIO_INHERIT_OPTION ç __AdiOsalConfig eEnablePrioInherit O # nNumTLSSlots #nSysTimerPeriodInUsec #pHeap d # nHeapSizeBytes # ADI_OSAL_CONFIG r r ADI_OSAL_CONFIG_PTR __AdiOsalCallbackAttr pCallbackFunc ¯ # pCallBackParam d # ADI_OSAL_CALLBACK_ATTR 9 9 ADI_OSAL_CALLBACK_ATTR_PTR ¤ o __AdiOsalTaskAttr pThreadFunc | # nPriority #pStackBase d #nStackSize # pTaskAttrParam d # M szThreadName R # ADI_OSAL_THREAD_ATTR Ë Ë ADI_OSAL_THREAD_ATTR_PTR __AdiOsalVersion nMajor # nMinor #nPatch #nBuild # ADI_OSAL_VERSION ¯ ¯ ADI_OSAL_VERSION_PTR
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c iid handlerArg d A ADI_OSAL_HANDLER_PTR c Ë _AdiOsalHandlerEntry pfOSALHandler i # pOSALArg d # ADI_OSAL_HANDLER_ENTRY fpos_t å 4_Mode ò # fileID Û # _Next #_Rend # _Wend #bufadr #_Bend #_Buf # rsave # nback Û #$onechar #(º pad ¬ #)Õ ò _Back Ç #, FILE õ # ar_qos # reserved4 # H ð # VALUE32 # u _ADI_SCB0_sp0a_read_qos_t # # ADI_SCB0_sp0a_read_qos_t H Ç aw_qos # reserved4 # ì # VALUE32 # _ADI_SCB0_sp0a_write_qos_t Ç # ADI_SCB0_sp0a_write_qos_t ì m ar_qos # reserved4 # : # VALUE32 # ¿ _ADI_SCB0_sp0b_read_qos_t m # ADI_SCB0_sp0b_read_qos_t aw_qos # reserved4 # 6 Þ # VALUE32 # d _ADI_SCB0_sp0b_write_qos_t # ADI_SCB0_sp0b_write_qos_t 6 · ar_qos # reserved4 # Ü # VALUE32 # _ADI_SCB0_sp1a_read_qos_t · # ADI_SCB0_sp1a_read_qos_t Ü [ aw_qos # reserved4 # ( # VALUE32 # ® _ADI_SCB0_sp1a_write_qos_t [ # ADI_SCB0_sp1a_write_qos_t ar_qos # reserved4 # & Î # VALUE32 # S _ADI_SCB0_sp1b_read_qos_t # ADI_SCB0_sp1b_read_qos_t & ¥ aw_qos # reserved4 # Ê r # VALUE32 # ø _ADI_SCB0_sp1b_write_qos_t ¥ # ADI_SCB0_sp1b_write_qos_t Ê K ar_qos # reserved4 # p # VALUE32 # _ADI_SCB0_sp2a_read_qos_t K # ADI_SCB0_sp2a_read_qos_t p ï aw_qos # reserved4 # ¼ # VALUE32 # B _ADI_SCB0_sp2a_write_qos_t ï # ADI_SCB0_sp2a_write_qos_t ar_qos # reserved4 # º b # VALUE32 # ç _ADI_SCB0_sp2b_read_qos_t # ADI_SCB0_sp2b_read_qos_t º 9 aw_qos # reserved4 # ^ # VALUE32 # _ADI_SCB0_sp2b_write_qos_t 9 # ADI_SCB0_sp2b_write_qos_t ^ ß ar_qos # reserved4 # ! ¬ # VALUE32 # 1! _ADI_SCB0_sp3a_read_qos_t ß # ADI_SCB0_sp3a_read_qos_t ! ! aw_qos # reserved4 # ¨! P! # VALUE32 # Ö! _ADI_SCB0_sp3a_write_qos_t ! # ADI_SCB0_sp3a_write_qos_t ¨! )" ar_qos # reserved4 # N" ö! # VALUE32 # {" _ADI_SCB0_sp3b_read_qos_t )" # ADI_SCB0_sp3b_read_qos_t N" Í" aw_qos # reserved4 # ò" " # VALUE32 # # _ADI_SCB0_sp3b_write_qos_t Í" # ADI_SCB0_sp3b_write_qos_t ò" s# ar_qos # reserved4 # # @# # VALUE32 # É# _ADI_SCB0_crc0_ch0_read_qos_t s# # ADI_SCB0_crc0_ch0_read_qos_t # $ aw_qos # reserved4 # D$ ì# # VALUE32 # v$ _ADI_SCB0_crc0_ch0_write_qos_t $ # ADI_SCB0_crc0_ch0_write_qos_t D$ Í$ ar_qos # reserved4 # ò$ $ # VALUE32 # #% _ADI_SCB0_crc0_ch1_read_qos_t Í$ # ADI_SCB0_crc0_ch1_read_qos_t ò$ y% aw_qos # reserved4 # % F% # VALUE32 # Ð% _ADI_SCB0_crc0_ch1_write_qos_t y% # ADI_SCB0_crc0_ch1_write_qos_t % '& ar_qos # reserved4 # L& ô% # VALUE32 # }& _ADI_SCB0_crc1_ch0_read_qos_t '& # ADI_SCB0_crc1_ch0_read_qos_t L& Ó& aw_qos # reserved4 # ø& & # VALUE32 # *' _ADI_SCB0_crc1_ch0_write_qos_t Ó& # ADI_SCB0_crc1_ch0_write_qos_t ø& ' ar_qos # reserved4 # ¦' N' # VALUE32 # ×' _ADI_SCB0_crc1_ch1_read_qos_t ' # ADI_SCB0_crc1_ch1_read_qos_t ¦' -( aw_qos # reserved4 # R( ú' # VALUE32 # ( _ADI_SCB0_crc1_ch1_write_qos_t -( # ADI_SCB0_crc1_ch1_write_qos_t R( Û( ar_qos # reserved4 # ) ¨( # VALUE32 # 1) _ADI_SCB0_uart2_rx_read_qos_t Û( # ADI_SCB0_uart2_rx_read_qos_t ) ) aw_qos # reserved4 # ¬) T) # VALUE32 # Þ) _ADI_SCB0_uart2_rx_write_qos_t ) # ADI_SCB0_uart2_rx_write_qos_t ¬) 5* ar_qos # reserved4 # Z* * # VALUE32 # * _ADI_SCB0_sh0_dport_read_qos_t 5* # ADI_SCB0_sh0_dport_read_qos_t Z* ã* aw_qos # reserved4 # + °* # VALUE32 # ;+ _ADI_SCB0_sh0_dport_write_qos_t ã* # ADI_SCB0_sh0_dport_write_qos_t + + ar_qos # reserved4 # ¸+ `+ # VALUE32 # ê+ _ADI_SCB0_sh0_iport_read_qos_t + # ADI_SCB0_sh0_iport_read_qos_t ¸+ A, aw_qos # reserved4 # f, , # VALUE32 # , _ADI_SCB0_sh0_iport_write_qos_t A, # ADI_SCB0_sh0_iport_write_qos_t f, ñ, ar_qos # reserved4 # - ¾, # VALUE32 # C- _ADI_SCB0_sp4a_read_qos_t ñ, # ADI_SCB0_sp4a_read_qos_t - - aw_qos # reserved4 # º- b- # VALUE32 # è- _ADI_SCB0_sp4a_write_qos_t - # ADI_SCB0_sp4a_write_qos_t º- ;. ar_qos # reserved4 # `. . # VALUE32 # . _ADI_SCB0_sp4b_read_qos_t ;. # ADI_SCB0_sp4b_read_qos_t `. ß. aw_qos # reserved4 # / ¬. # VALUE32 # 2/ _ADI_SCB0_sp4b_write_qos_t ß. # ADI_SCB0_sp4b_write_qos_t /
/ ar_qos # reserved4 # ª/ R/ # VALUE32 # Ý/ _ADI_SCB0_hsmdma_ch0_read_qos_t
/ # ADI_SCB0_hsmdma_ch0_read_qos_t ª/ 50 aw_qos # reserved4 # Z0 0 # VALUE32 # 0 _ADI_SCB0_hsmdma_ch0_write_qos_t 50 # ADI_SCB0_hsmdma_ch0_write_qos_t Z0 ç0 ar_qos # reserved4 # 1 ´0 # VALUE32 # 91 _ADI_SCB0_sp5a_read_qos_t ç0 # ADI_SCB0_sp5a_read_qos_t 1 1 aw_qos # reserved4 # °1 X1 # VALUE32 # Þ1 _ADI_SCB0_sp5a_write_qos_t 1 # ADI_SCB0_sp5a_write_qos_t °1 12 ar_qos # reserved4 # V2 þ1 # VALUE32 # 2 _ADI_SCB0_mlb_read_qos_t 12 # ADI_SCB0_mlb_read_qos_t V2 Ó2 aw_qos # reserved4 # ø2 2 # VALUE32 # %3 _ADI_SCB0_mlb_write_qos_t Ó2 # ADI_SCB0_mlb_write_qos_t ø2 w3 ar_qos # reserved4 # 3 D3 # VALUE32 # Í3 _ADI_SCB0_uart0_tx_read_qos_t w3 # ADI_SCB0_uart0_tx_read_qos_t 3 #4 aw_qos # reserved4 # H4 ð3 # VALUE32 # z4 _ADI_SCB0_uart0_tx_write_qos_t #4 # ADI_SCB0_uart0_tx_write_qos_t H4 Ñ4 ar_qos # reserved4 # ö4 4 # VALUE32 # '5 _ADI_SCB0_uart0_rx_read_qos_t Ñ4 # ADI_SCB0_uart0_rx_read_qos_t ö4 }5 aw_qos # reserved4 # ¢5 J5 # VALUE32 # Ô5 _ADI_SCB0_uart0_rx_write_qos_t }5 # ADI_SCB0_uart0_rx_write_qos_t ¢5 +6 ar_qos # reserved4 # P6 ø5 # VALUE32 # }6 _ADI_SCB0_sp5b_read_qos_t +6 # ADI_SCB0_sp5b_read_qos_t P6 Ï6 aw_qos # reserved4 # ô6 6 # VALUE32 # "7 _ADI_SCB0_sp5b_write_qos_t Ï6 # ADI_SCB0_sp5b_write_qos_t ô6 u7 ar_qos # reserved4 # 7 B7 # VALUE32 # Í7 _ADI_SCB0_hsmdma_ch1_read_qos_t u7 # ADI_SCB0_hsmdma_ch1_read_qos_t 7 %8 aw_qos # reserved4 # J8 ò7 # VALUE32 # ~8 _ADI_SCB0_hsmdma_ch1_write_qos_t %8 # ADI_SCB0_hsmdma_ch1_write_qos_t J8 ×8 ar_qos # reserved4 # ü8 ¤8 # VALUE32 # -9 _ADI_SCB0_uart2_tx_read_qos_t ×8 # ADI_SCB0_uart2_tx_read_qos_t ü8 9 aw_qos # reserved4 # ¨9 P9 # VALUE32 # Ú9 _ADI_SCB0_uart2_tx_write_qos_t 9 # ADI_SCB0_uart2_tx_write_qos_t ¨9 1: ar_qos # reserved4 # V: þ9 # VALUE32 #
: _ADI_SCB0_spi0tx_read_qos_t 1: # ADI_SCB0_spi0tx_read_qos_t V: Ù: aw_qos # reserved4 # þ: ¦: # VALUE32 # .; _ADI_SCB0_spi0tx_write_qos_t Ù: # ADI_SCB0_spi0tx_write_qos_t þ: ; ar_qos # reserved4 # ¨; P; # VALUE32 # ×; _ADI_SCB0_spi0rx_read_qos_t ; # ADI_SCB0_spi0rx_read_qos_t ¨; +< aw_qos # reserved4 # P< ø; # VALUE32 # < _ADI_SCB0_spi0rx_write_qos_t +< # ADI_SCB0_spi0rx_write_qos_t P< Õ< ar_qos # reserved4 # ú< ¢< # VALUE32 # )= _ADI_SCB0_spi1tx_read_qos_t Õ< # ADI_SCB0_spi1tx_read_qos_t ú< }= aw_qos # reserved4 # ¢= J= # VALUE32 # Ò= _ADI_SCB0_spi1tx_write_qos_t }= # ADI_SCB0_spi1tx_write_qos_t ¢= '> ar_qos # reserved4 # L> ô= # VALUE32 # {> _ADI_SCB0_spi1rx_read_qos_t '> # ADI_SCB0_spi1rx_read_qos_t L> Ï> aw_qos # reserved4 # ô> > # VALUE32 # $? _ADI_SCB0_spi1rx_write_qos_t Ï> # ADI_SCB0_spi1rx_write_qos_t ô> y? ar_qos # reserved4 # ? F? # VALUE32 # Í? _ADI_SCB0_spi2tx_read_qos_t y? # ADI_SCB0_spi2tx_read_qos_t ? !@ aw_qos # reserved4 # F@ î? # VALUE32 # v@ _ADI_SCB0_spi2tx_write_qos_t !@ # ADI_SCB0_spi2tx_write_qos_t F@ Ë@ ar_qos # reserved4 # ð@ @ # VALUE32 # A _ADI_SCB0_spi2rx_read_qos_t Ë@ # ADI_SCB0_spi2rx_read_qos_t ð@ sA aw_qos # reserved4 # A @A # VALUE32 # ÈA _ADI_SCB0_spi2rx_write_qos_t sA # ADI_SCB0_spi2rx_write_qos_t A B ar_qos # reserved4 # BB êA # VALUE32 # oB _ADI_SCB0_sp6a_read_qos_t B # ADI_SCB0_sp6a_read_qos_t BB ÁB aw_qos # reserved4 # æB B # VALUE32 # C _ADI_SCB0_sp6a_write_qos_t ÁB # ADI_SCB0_sp6a_write_qos_t æB gC ar_qos # reserved4 # C 4C # VALUE32 # ¹C _ADI_SCB0_sp6b_read_qos_t gC # ADI_SCB0_sp6b_read_qos_t C D aw_qos # reserved4 # 0D ØC # VALUE32 # ^D _ADI_SCB0_sp6b_write_qos_t D # ADI_SCB0_sp6b_write_qos_t 0D ±D ar_qos # reserved4 # ÖD ~D # VALUE32 # E _ADI_SCB0_lp0_read_qos_t ±D # ADI_SCB0_lp0_read_qos_t ÖD SE aw_qos # reserved4 # xE E # VALUE32 # ¥E _ADI_SCB0_lp0_write_qos_t SE # ADI_SCB0_lp0_write_qos_t xE ÷E ar_qos # reserved4 # F ÄE # VALUE32 # IF _ADI_SCB0_sp7a_read_qos_t ÷E # ADI_SCB0_sp7a_read_qos_t F F aw_qos # reserved4 # ÀF hF # VALUE32 # îF _ADI_SCB0_sp7a_write_qos_t F # ADI_SCB0_sp7a_write_qos_t ÀF AG ar_qos # reserved4 # fG G # VALUE32 # G _ADI_SCB0_sp7b_read_qos_t AG # ADI_SCB0_sp7b_read_qos_t fG åG aw_qos # reserved4 #
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H ²G # VALUE32 # 8H _ADI_SCB0_sp7b_write_qos_t åG # ADI_SCB0_sp7b_write_qos_t
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H H ar_qos # reserved4 # °H XH # VALUE32 # ãH _ADI_SCB0_sh0_mmr_ib_read_qos_t H # ADI_SCB0_sh0_mmr_ib_read_qos_t °H ;I aw_qos # reserved4 # `I I # VALUE32 # I _ADI_SCB0_sh0_mmr_ib_write_qos_t ;I # ADI_SCB0_sh0_mmr_ib_write_qos_t `I íI ar_qos # reserved4 # J ºI # VALUE32 # CJ _ADI_SCB0_uart1_tx_read_qos_t íI # ADI_SCB0_uart1_tx_read_qos_t J J aw_qos # reserved4 # ¾J fJ # VALUE32 # ðJ _ADI_SCB0_uart1_tx_write_qos_t J # ADI_SCB0_uart1_tx_write_qos_t ¾J GK ar_qos # reserved4 # lK K # VALUE32 # K _ADI_SCB0_uart1_rx_read_qos_t GK # ADI_SCB0_uart1_rx_read_qos_t lK óK aw_qos # reserved4 # L ÀK # VALUE32 # JL _ADI_SCB0_uart1_rx_write_qos_t óK # ADI_SCB0_uart1_rx_write_qos_t L ¡L ar_qos # reserved4 # ÆL nL # VALUE32 # òL _ADI_SCB0_lp1_read_qos_t ¡L # ADI_SCB0_lp1_read_qos_t ÆL CM aw_qos # reserved4 # hM M # VALUE32 # M _ADI_SCB0_lp1_write_qos_t CM # ADI_SCB0_lp1_write_qos_t hM çM ar_qos # reserved4 # N ´M # VALUE32 # ;N _ADI_SCB0_crypto_read_qos_t çM # ADI_SCB0_crypto_read_qos_t N N aw_qos # reserved4 # ´N \N # VALUE32 # äN _ADI_SCB0_crypto_write_qos_t N # ADI_SCB0_crypto_write_qos_t ´N 9O ar_qos # reserved4 # ^O O # VALUE32 # O _ADI_SCB0_acc_ch0_read_qos_t 9O # ADI_SCB0_acc_ch0_read_qos_t ^O ãO aw_qos # reserved4 # P °O # VALUE32 # 9P _ADI_SCB0_acc_ch0_write_qos_t ãO # ADI_SCB0_acc_ch0_write_qos_t P P ar_qos # reserved4 # ´P \P # VALUE32 # äP _ADI_SCB0_acc_ch1_read_qos_t P # ADI_SCB0_acc_ch1_read_qos_t ´P 9Q aw_qos # reserved4 # ^Q Q # VALUE32 # Q _ADI_SCB0_acc_ch1_write_qos_t 9Q # ADI_SCB0_acc_ch1_write_qos_t ^Q åQ ar_qos # reserved4 #
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R ²Q # VALUE32 # =R _ADI_SCB0_dldma0_ch0_read_qos_t åQ # ADI_SCB0_dldma0_ch0_read_qos_t
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R R aw_qos # reserved4 # ºR bR # VALUE32 # îR _ADI_SCB0_dldma0_ch0_write_qos_t R # ADI_SCB0_dldma0_ch0_write_qos_t ºR GS ar_qos # reserved4 # lS S # VALUE32 # S _ADI_SCB0_dldma0_ch1_read_qos_t GS # ADI_SCB0_dldma0_ch1_read_qos_t lS ÷S aw_qos # reserved4 # T ÄS # VALUE32 # PT _ADI_SCB0_dldma0_ch1_write_qos_t ÷S # ADI_SCB0_dldma0_ch1_write_qos_t T ©T ar_qos # reserved4 # ÎT vT # VALUE32 # U _ADI_SCB0_dldma1_ch0_read_qos_t ©T # ADI_SCB0_dldma1_ch0_read_qos_t ÎT YU aw_qos # reserved4 # ~U &U # VALUE32 # ²U _ADI_SCB0_dldma1_ch0_write_qos_t YU # ADI_SCB0_dldma1_ch0_write_qos_t ~U V ar_qos # reserved4 # 0V ØU # VALUE32 # cV _ADI_SCB0_dldma1_ch1_read_qos_t V # ADI_SCB0_dldma1_ch1_read_qos_t 0V »V aw_qos # reserved4 # àV V # VALUE32 # W _ADI_SCB0_dldma1_ch1_write_qos_t »V # ADI_SCB0_dldma1_ch1_write_qos_t àV mW ar_qos # reserved4 # W :W # VALUE32 # ÅW _ADI_SCB0_msmdma_ch0_read_qos_t mW # ADI_SCB0_msmdma_ch0_read_qos_t W X aw_qos # reserved4 # BX êW # VALUE32 # vX _ADI_SCB0_msmdma_ch0_write_qos_t X # ADI_SCB0_msmdma_ch0_write_qos_t BX ÏX ar_qos # reserved4 # ôX X # VALUE32 # 'Y _ADI_SCB0_msmdma_ch1_read_qos_t ÏX # ADI_SCB0_msmdma_ch1_read_qos_t ôX Y aw_qos # reserved4 # ¤Y LY # VALUE32 # ØY _ADI_SCB0_msmdma_ch1_write_qos_t Y # ADI_SCB0_msmdma_ch1_write_qos_t ¤Y 1Z ar_qos # reserved4 # VZ þY # VALUE32 # Z _ADI_SCB0_dbg_read_qos_t 1Z # ADI_SCB0_dbg_read_qos_t VZ ÓZ aw_qos # reserved4 # øZ Z # VALUE32 # %[ _ADI_SCB0_dbg_write_qos_t ÓZ # ADI_SCB0_dbg_write_qos_t øZ w[ ar_qos # reserved4 # [ D[ # VALUE32 # È[ _ADI_SCB0_etr_read_qos_t w[ # ADI_SCB0_etr_read_qos_t [ \ aw_qos # reserved4 # >\ æ[ # VALUE32 # k\ _ADI_SCB0_etr_write_qos_t \ # ADI_SCB0_etr_write_qos_t >\ Ì] SCB3_APB_DCLK_0_IB_SYNC_MODE_ENUM000 SCB3_APB_DCLK_0_IB_SYNC_MODE_ENUM001 SCB3_APB_DCLK_0_IB_SYNC_MODE_ENUM002 SCB3_APB_DCLK_0_IB_SYNC_MODE_ENUM003 SCB3_APB_DCLK_0_IB_SYNC_MODE_ENUM004 SCB3_APB_DCLK_0_IB_SYNC_MODE_ENUM005 SCB3_APB_DCLK_0_IB_SYNC_MODE_ENUM006 SCB3_APB_DCLK_0_IB_SYNC_MODE_ENUM007 ADI_SCB3_apb_dclk_0_ib_sync_mode_sync_mode \ 3^ sync_mode # reserved3 # X^ ý] # VALUE32 # ^ _ADI_SCB3_apb_dclk_0_ib_sync_mode_t 3^ # ADI_SCB3_apb_dclk_0_ib_sync_mode_t X^ Â_ SCB1_MST_IB_SYNC_MODE_ENUM000 SCB1_MST_IB_SYNC_MODE_ENUM001 SCB1_MST_IB_SYNC_MODE_ENUM002 SCB1_MST_IB_SYNC_MODE_ENUM003 SCB1_MST_IB_SYNC_MODE_ENUM004 SCB1_MST_IB_SYNC_MODE_ENUM005 SCB1_MST_IB_SYNC_MODE_ENUM006 SCB1_MST_IB_SYNC_MODE_ENUM007 ADI_SCB1_mst_ib_sync_mode_sync_mode ¸^ "` sync_mode # reserved3 # G` ì_ # VALUE32 # w` _ADI_SCB1_mst_ib_sync_mode_t "` # ADI_SCB1_mst_ib_sync_mode_t G` Ñ` periph_id_4 # reserved8 # ö` ` # VALUE32 # !a _ADI_SCB4_periph_id_4_t Ñ` # ADI_SCB4_periph_id_4_t ö` va periph_id_5 # reserved8 # a >a # VALUE32 # Æa _ADI_SCB4_periph_id_5_t va # ADI_SCB4_periph_id_5_t a b periph_id_6 # reserved8 # @b ãa # VALUE32 # kb _ADI_SCB4_periph_id_6_t b # ADI_SCB4_periph_id_6_t @b Àb periph_id_7 # reserved8 # åb b # VALUE32 # c _ADI_SCB4_periph_id_7_t Àb # ADI_SCB4_periph_id_7_t åb ec periph_id_0 # reserved8 # c -c # VALUE32 # µc _ADI_SCB4_periph_id_0_t ec # ADI_SCB4_periph_id_0_t c
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d periph_id_1 # reserved8 # /d Òc # VALUE32 # Zd _ADI_SCB4_periph_id_1_t
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d # ADI_SCB4_periph_id_1_t /d ¯d periph_id_2 # reserved8 # Ôd wd # VALUE32 # ÿd _ADI_SCB4_periph_id_2_t ¯d # ADI_SCB4_periph_id_2_t Ôd ie cust_mod_num # rev_and # reserved8 # e e # VALUE32 # ¹e _ADI_SCB4_periph_id_3_t ie # ADI_SCB4_periph_id_3_t e f comp_id_0 # reserved8 # 1f Öe # VALUE32 # Zf _ADI_SCB4_comp_id_0_t f # ADI_SCB4_comp_id_0_t 1f «f comp_id_1 # reserved8 # Ðf uf # VALUE32 # ùf _ADI_SCB4_comp_id_1_t «f # ADI_SCB4_comp_id_1_t Ðf Jg comp_id_2 # reserved8 # og g # VALUE32 # g _ADI_SCB4_comp_id_2_t Jg # ADI_SCB4_comp_id_2_t og ég comp_id_3 # reserved8 # h ³g # VALUE32 # 7h _ADI_SCB4_comp_id_3_t ég # ADI_SCB4_comp_id_3_t h
h ar_qos # reserved4 # ªh Rh # VALUE32 # Þh _ADI_SCB4_sharc_dport_read_qos_t
h # ADI_SCB4_sharc_dport_read_qos_t ªh 7i aw_qos # reserved4 # \i i # VALUE32 # i _ADI_SCB4_sharc_dport_write_qos_t 7i # ADI_SCB4_sharc_dport_write_qos_t \i ëi fn_mod # reserved2 # j ¸i # VALUE32 # Bj _ADI_SCB4_sharc_dport_fn_mod_t ëi # ADI_SCB4_sharc_dport_fn_mod_t j j ar_qos # reserved4 # ¾j fj # VALUE32 # ÷j _ADI_SCB4_fabric_s2port_ib_read_qos_t j # ADI_SCB4_fabric_s2port_ib_read_qos_t ¾j Uk aw_qos # reserved4 # zk "k # VALUE32 # ´k _ADI_SCB4_fabric_s2port_ib_write_qos_t Uk # ADI_SCB4_fabric_s2port_ib_write_qos_t zk l fn_mod # reserved2 # 8l àk # VALUE32 # ol _ADI_SCB4_fabric_s2port_ib_fn_mod_t l # ADI_SCB4_fabric_s2port_ib_fn_mod_t 8l Ñl bypass_merge # reserved1 # öl l # VALUE32 # (m _ADI_SCB4_fir_ch0_ib_fn_mod2_t Ñl # ADI_SCB4_fir_ch0_ib_fn_mod2_t öl m ar_qos # reserved4 # ¤m Lm # VALUE32 # ×m _ADI_SCB4_fir_ch0_ib_read_qos_t m # ADI_SCB4_fir_ch0_ib_read_qos_t ¤m /n aw_qos # reserved4 # Tn üm # VALUE32 # n _ADI_SCB4_fir_ch0_ib_write_qos_t /n # ADI_SCB4_fir_ch0_ib_write_qos_t Tn án fn_mod # reserved2 # o ®n # VALUE32 # 7o _ADI_SCB4_fir_ch0_ib_fn_mod_t án # ADI_SCB4_fir_ch0_ib_fn_mod_t o o bypass_merge # reserved1 # ¸o Zo # VALUE32 # êo _ADI_SCB4_fir_ch1_ib_fn_mod2_t o # ADI_SCB4_fir_ch1_ib_fn_mod2_t ¸o Ap ar_qos # reserved4 # fp p # VALUE32 # p _ADI_SCB4_fir_ch1_ib_read_qos_t Ap # ADI_SCB4_fir_ch1_ib_read_qos_t fp ñp aw_qos # reserved4 # q ¾p # VALUE32 # Jq _ADI_SCB4_fir_ch1_ib_write_qos_t ñp # ADI_SCB4_fir_ch1_ib_write_qos_t q £q fn_mod # reserved2 # Èq pq # VALUE32 # ùq _ADI_SCB4_fir_ch1_ib_fn_mod_t £q # ADI_SCB4_fir_ch1_ib_fn_mod_t Èq Ur bypass_merge # reserved1 # zr r # VALUE32 # ¬r _ADI_SCB4_iir_ch0_ib_fn_mod2_t Ur # ADI_SCB4_iir_ch0_ib_fn_mod2_t zr s ar_qos # reserved4 # (s Ðr # VALUE32 # [s _ADI_SCB4_iir_ch0_ib_read_qos_t s # ADI_SCB4_iir_ch0_ib_read_qos_t (s ³s aw_qos # reserved4 # Øs s # VALUE32 # t _ADI_SCB4_iir_ch0_ib_write_qos_t ³s # ADI_SCB4_iir_ch0_ib_write_qos_t Øs et fn_mod # reserved2 # t 2t # VALUE32 # »t _ADI_SCB4_iir_ch0_ib_fn_mod_t et # ADI_SCB4_iir_ch0_ib_fn_mod_t t u bypass_merge # reserved1 # <u Þt # VALUE32 # nu _ADI_SCB4_iir_ch1_ib_fn_mod2_t u # ADI_SCB4_iir_ch1_ib_fn_mod2_t <u Åu ar_qos # reserved4 # êu u # VALUE32 # v _ADI_SCB4_iir_ch1_ib_read_qos_t Åu # ADI_SCB4_iir_ch1_ib_read_qos_t êu uv aw_qos # reserved4 # v Bv # VALUE32 # Îv _ADI_SCB4_iir_ch1_ib_write_qos_t uv # ADI_SCB4_iir_ch1_ib_write_qos_t v 'w fn_mod # reserved2 # Lw ôv # VALUE32 # }w _ADI_SCB4_iir_ch1_ib_fn_mod_t 'w # ADI_SCB4_iir_ch1_ib_fn_mod_t Lw Òw remap # reserved1 # ÷w w # VALUE32 # x _ADI_SCB5_remap_t Òw # ADI_SCB5_remap_t ÷w kx periph_id_4 # reserved8 # x 3x # VALUE32 # »x _ADI_SCB5_periph_id_4_t kx # ADI_SCB5_periph_id_4_t x y periph_id_5 # reserved8 # 5y Øx # VALUE32 # `y _ADI_SCB5_periph_id_5_t y # ADI_SCB5_periph_id_5_t 5y µy periph_id_6 # reserved8 # Úy }y # VALUE32 # z _ADI_SCB5_periph_id_6_t µy # ADI_SCB5_periph_id_6_t Úy Zz periph_id_7 # reserved8 # z "z # VALUE32 # ªz _ADI_SCB5_periph_id_7_t Zz # ADI_SCB5_periph_id_7_t z ÿz periph_id_0 # reserved8 # ${ Çz # VALUE32 # O{ _ADI_SCB5_periph_id_0_t ÿz # ADI_SCB5_periph_id_0_t ${ ¤{ periph_id_1 # reserved8 # É{ l{ # VALUE32 # ô{ _ADI_SCB5_periph_id_1_t ¤{ # ADI_SCB5_periph_id_1_t É{ I| periph_id_2 # reserved8 # n| | # VALUE32 # | _ADI_SCB5_periph_id_2_t I| # ADI_SCB5_periph_id_2_t n| ÿ| cust_mod_num # rev # reserved8 # $} ¶| # VALUE32 # O} _ADI_SCB5_periph_id_3_t ÿ| # ADI_SCB5_periph_id_3_t $} ¢} comp_id_0 # reserved8 # Ç} l} # VALUE32 # ð} _ADI_SCB5_comp_id_0_t ¢} # ADI_SCB5_comp_id_0_t Ç} A~ comp_id_1 # reserved8 # f~ ~ # VALUE32 # ~ _ADI_SCB5_comp_id_1_t A~ # ADI_SCB5_comp_id_1_t f~ à~ comp_id_2 # reserved8 # ª~ # VALUE32 # . _ADI_SCB5_comp_id_2_t à~ # ADI_SCB5_comp_id_2_t comp_id_3 # reserved8 # ¤ I # VALUE32 # Í _ADI_SCB5_comp_id_3_t # ADI_SCB5_comp_id_3_t ¤ " fn_mod_iss_bm # reserved2 # G è # VALUE32 # ~ _ADI_SCB5_spi2_s_ib_fn_mod_iss_bm_t " # ADI_SCB5_spi2_s_ib_fn_mod_iss_bm_t G Ú fn_mod # reserved2 # ÿ § # VALUE32 # / _ADI_SCB5_spi2_s_ib_fn_mod_t Ú # ADI_SCB5_spi2_s_ib_fn_mod_t ÿ fn_mod # reserved2 # © Q # VALUE32 # Ö _ADI_SCB5_spif_m_fn_mod_t # ADI_SCB5_spif_m_fn_mod_t © LP_CTL_DIS LP_CTL_EN ADI_LP_CTL_EN õ N LP_CTL_RX LP_CTL_TX ADI_LP_CTL_TRAN , LP_CTL_TRQ_DIS LP_CTL_TRQ_EN ADI_LP_CTL_TRQMSK d Ò LP_CTL_RRQ_DIS LP_CTL_RRQ_EN ADI_LP_CTL_RRQMSK § LP_CTL_RX_OVF_DIS LP_CTL_RX_OVF_EN ADI_LP_CTL_ROVFMSK ê ò EN # reserved1 # TRAN # reserved4 # TRQMSK # RRQMSK # reserved10 # ROVFMSK # reserved12 # 4 # VALUE32 # 8 _ADI_LP_CTL_t ò # ADI_LP_CTL_t à LP_STAT_RX0_TX0 LP_STAT_RX1_TXR LP_STAT_RX2_TXR LP_STAT_RX3_TXR LP_STAT_RX4_TX1 LP_STAT_RXR2_TXR2 ADI_LP_STAT_FFST K
LP_STAT_PACK_DONE LP_STAT_PACK_PROG ADI_LP_STAT_LPACK Ú L
LP_STAT_IDLE LP_STAT_BUSY ADI_LP_STAT_LPBS $
LTRQ # LRRQ # reserved2 # ROVF # FFST # LPACK # LPBS # reserved9 # % c
# VALUE32 # G _ADI_LP_STAT_t # ADI_LP_STAT_t % VALUE # reserved8 # ² [ # VALUE32 # Ó _ADI_LP_DIV_t # ADI_LP_DIV_t ² DATA # & æ # VALUE32 # F _ADI_LP_TX_t # ADI_LP_TX_t & s DATA # X # VALUE32 # ¸ _ADI_LP_RX_t s # ADI_LP_RX_t å DATA #
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Ê # VALUE32 # 1 _ADI_LP_TXIN_SHDW_t å # ADI_LP_TXIN_SHDW_t
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e DATA # J # VALUE32 # ² _ADI_LP_TXOUT_SHDW_t e # ADI_LP_TXOUT_SHDW_t è VALUE # Ì # VALUE32 # ; _ADI_DMA_CFG0_DSCPTR_NXT_t è # ADI_DMA_CFG0_DSCPTR_NXT_t w VALUE # [ # VALUE32 # É _ADI_DMA_CFG0_ADDRSTART_t w # ADI_DMA_CFG0_ADDRSTART_t DMA_CFG_DIS DMA_CFG_EN ADI_DMA_CFG0_CFG_EN è P DMA_CFG_READ DMA_CFG_WRITE ADI_DMA_CFG0_CFG_WNR ' DMA_CFG_NO_SYNC DMA_CFG_SYNC ADI_DMA_CFG0_CFG_SYNC k è DMA_CFG_LD_STARTADDR DMA_CFG_LD_CURADDR ADI_DMA_CFG0_CFG_CADDR ² W DMA_CFG_PSIZE01 DMA_CFG_PSIZE02 DMA_CFG_PSIZE04 DMA_CFG_PSIZE08 ADI_DMA_CFG0_CFG_PSIZE ê DMA_CFG_MSIZE01 DMA_CFG_MSIZE02 DMA_CFG_MSIZE04 DMA_CFG_MSIZE08 DMA_CFG_MSIZE16 DMA_CFG_MSIZE32 ADI_DMA_CFG0_CFG_MSIZE t y DMA_CFG_STOP DMA_CFG_AUTO DMA_CFG_DSCLIST DMA_CFG_DSCARRAY DMA_CFG_DODLIST DMA_CFG_DODARRAY ADI_DMA_CFG0_CFG_FLOW Æ DMA_CFG_NO_TRGWAIT DMA_CFG_TRGWAIT ADI_DMA_CFG0_CFG_TWAIT k DMA_CFG_FETCH01 DMA_CFG_FETCH02 DMA_CFG_FETCH03 DMA_CFG_FETCH04 DMA_CFG_FETCH05 DMA_CFG_FETCH06 DMA_CFG_FETCH07 ADI_DMA_CFG0_CFG_NDSIZE ã ß DMA_CFG_NO_INT DMA_CFG_XCNT_INT DMA_CFG_YCNT_INT DMA_CFG_PERIPH_INT ADI_DMA_CFG0_CFG_INT > DMA_CFG_NO_TRIG DMA_CFG_XCNT_TRIG DMA_CFG_YCNT_TRIG ADI_DMA_CFG0_CFG_TRIG ú DMA_CFG_TOV_DIS DMA_CFG_TOV_EN ADI_DMA_CFG0_CFG_TOVEN Z Ï DMA_CFG_NO_COPY DMA_CFG_COPY ADI_DMA_CFG0_CFG_DESCIDCPY ¤ DMA_CFG_ADDR1D DMA_CFG_ADDR2D ADI_DMA_CFG0_CFG_TWOD ð k DMA_CFG_PDAT_NOTFWD DMA_CFG_PDAT_FWD ADI_DMA_CFG0_CFG_PDRF 8
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EN # WNR # SYNC # CADDR # PSIZE # reserved7 # MSIZE # reserved11 # FLOW # TWAIT # NDSIZE # reserved19 # INT #
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TRIG # TOVEN # DESCIDCPY # TWOD # reserved27 # PDRF # reserved29 # / # VALUE32 # V _ADI_DMA_CFG0_CFG_t
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# ADI_DMA_CFG0_CFG_t / VALUE # ° o # VALUE32 # Ø _ADI_DMA_CFG0_XCNT_t # ADI_DMA_CFG0_XCNT_t ° VALUE u # 3 ò # VALUE32 u # [ _ADI_DMA_CFG0_XMOD_t # ADI_DMA_CFG0_XMOD_t 3 VALUE # ¶ u # VALUE32 # Þ _ADI_DMA_CFG0_YCNT_t # ADI_DMA_CFG0_YCNT_t ¶ VALUE u # 9 ø # VALUE32 u # a _ADI_DMA_CFG0_YMOD_t # ADI_DMA_CFG0_YMOD_t 9 VALUE # ¼ { # VALUE32 # ê _ADI_DMA_CFG0_DSCPTR_CUR_t # ADI_DMA_CFG0_DSCPTR_CUR_t ¼ Q PDPO # reserved1 # DESCPPREV # v
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# VALUE32 # ¤ _ADI_DMA_CFG0_DSCPTR_PRV_t Q # ADI_DMA_CFG0_DSCPTR_PRV_t v à VALUE # Ä # VALUE32 # 1 _ADI_DMA_CFG0_ADDR_CUR_t à # ADI_DMA_CFG0_ADDR_CUR_t ~ DMA_STAT_NO_IRQ DMA_STAT_IRQDONE ADI_DMA_CFG0_STAT_IRQDONE O Ï DMA_STAT_NO_IRQERR DMA_STAT_IRQERR ADI_DMA_CFG0_STAT_IRQERR DMA_STAT_NO_PIRQ DMA_STAT_PIRQ ADI_DMA_CFG0_STAT_PIRQ î µ DMA_STAT_CFGERR DMA_STAT_ILLWRERR DMA_STAT_ALGNERR DMA_STAT_MEMERR DMA_STAT_TRGOVERR DMA_STAT_BWMONERR ADI_DMA_CFG0_STAT_ERRC 8 = DMA_STAT_STOPPED DMA_STAT_DSCFETCH DMA_STAT_DATAXFER DMA_STAT_TRGWAIT DMA_STAT_ACKWAIT ADI_DMA_CFG0_STAT_RUN Ò « DMA_STAT_PBUS01 DMA_STAT_PBUS02 DMA_STAT_PBUS04 DMA_STAT_PBUS08 ADI_DMA_CFG0_STAT_PBWID Y DMA_STAT_MBUS02 DMA_STAT_MBUS04 DMA_STAT_MBUS08 DMA_STAT_MBUS16 ADI_DMA_CFG0_STAT_MBWID É º DMA_STAT_FIFOEMPTY DMA_STAT_FIFO25 DMA_STAT_FIFO50 DMA_STAT_FIFO75 DMA_STAT_FIFONEARFULL DMA_STAT_FIFOFULL ADI_DMA_CFG0_STAT_FIFOFILL 9 DMA_STAT_NOTRIGRX DMA_STAT_TRIGRX ADI_DMA_CFG0_STAT_TWAIT Û H IRQDONE # IRQERR # PIRQ # reserved3 # ERRC # reserved7 # RUN # reserved11 # PBWID # MBWID # FIFOFILL # reserved19 # TWAIT # reserved21 # m ) # VALUE32 # _ADI_DMA_CFG0_STAT_t H # ADI_DMA_CFG0_STAT_t m Ë VALUE # ð ¯ # VALUE32 # _ADI_DMA_CFG0_XCNT_CUR_t Ë # ADI_DMA_CFG0_XCNT_CUR_t ð V VALUE # { : # VALUE32 # § _ADI_DMA_CFG0_YCNT_CUR_t V # ADI_DMA_CFG0_YCNT_CUR_t { ø VALUE # reserved16 # Å # VALUE32 # G _ADI_DMA_CFG0_BWLCNT_t ø # ADI_DMA_CFG0_BWLCNT_t VALUE # reserved16 # » c # VALUE32 # é _ADI_DMA_CFG0_BWLCNT_CUR_t # ADI_DMA_CFG0_BWLCNT_CUR_t » % VALUE # J # VALUE32 # t _ADI_DMA_CFG0_BWMCNT_t % # ADI_DMA_CFG0_BWMCNT_t J ¬ VALUE # Ñ # VALUE32 # ÿ _ADI_DMA_CFG0_BWMCNT_CUR_t ¬ # ADI_DMA_CFG0_BWMCNT_CUR_t Ñ M CLKLO # CLKHI # r # VALUE16 # _ADI_TWI_CLKDIV_t M # ADI_TWI_CLKDIV_t r Ó TWI_CTL_DIS TWI_CTL_EN ADI_TWI_CTL_EN ® TWI_CTL_SCCB_DIS TWI_CTL_SCCB_EN ADI_TWI_CTL_SCCB è PRESCALE # EN # reserved8 # SCCB # reserved10 # ¿ . # VALUE16 # á _ADI_TWI_CTL_t # ADI_TWI_CTL_t ¿ TWI_SLVCTL_DIS TWI_SLVCTL_EN ADI_TWI_SLVCTL_EN õ j TWI_SLVCTL_INVALID TWI_SLVCTL_VALID ADI_TWI_SLVCTL_TDVAL 8 · TWI_SLVCTL_ACKGEN TWI_SLVCTL_NAKGEN ADI_TWI_SLVCTL_NAK
ý TWI_SLVCTL_GDIS TWI_SLVCTL_GEN ADI_TWI_SLVCTL_GEN Ð ¡ EN # reserved1 # TDVAL # NAK # GEN # reserved5 # ²¡ ¡ # VALUE16 # ס _ADI_TWI_SLVCTL_t ¡ # ADI_TWI_SLVCTL_t ²¡ ¢ TWI_SLVSTAT_RX TWI_SLVSTAT_TX ADI_TWI_SLVSTAT_DIR î¡ a¢ TWI_SLVSTAT_NO TWI_SLVSTAT_YES ADI_TWI_SLVSTAT_GCALL 4¢ ¿¢ DIR # GCALL # reserved2 # ä¢ }¢ # VALUE16 #
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£ _ADI_TWI_SLVSTAT_t ¿¢ # ADI_TWI_SLVSTAT_t ä¢ S£ ADDR # reserved7 # x£ "£ # VALUE16 # £ _ADI_TWI_SLVADDR_t S£ # ADI_TWI_SLVADDR_t x£ 㣠TWI_MSTRCTL_DIS TWI_MSTRCTL_EN ADI_TWI_MSTRCTL_EN ¶£ (¤ TWI_MSTRCTL_TX TWI_MSTRCTL_RX ADI_TWI_MSTRCTL_DIR ü£ s¤ TWI_MSTRCTL_SMODE TWI_MSTRCTL_FAST ADI_TWI_MSTRCTL_FAST B¤ ¾¤ TWI_MSTRCTL_NORM TWI_MSTRCTL_STOP ADI_TWI_MSTRCTL_STOP ¤ ¥ TWI_MSTRCTL_END TWI_MSTRCTL_RPT ADI_TWI_MSTRCTL_RSTART Ù¤ Z¥ TWI_MSTRCTL_SDANORM TWI_MSTRCTL_SDAOVER ADI_TWI_MSTRCTL_SDAOVR $¥ ¥ TWI_MSTRCTL_SCLNORM TWI_MSTRCTL_SCLOVER ADI_TWI_MSTRCTL_SCLOVR w¥ u¦ EN # reserved1 # DIR # FAST # STOP # RSTART #
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DCNT # SDAOVR # SCLOVR # ¦ Ê¥ # VALUE16 # À¦ _ADI_TWI_MSTRCTL_t u¦ # ADI_TWI_MSTRCTL_t ¦ § TWI_MSTRSTAT_MPROG_NO TWI_MSTRSTAT_MPROG_YES ADI_TWI_MSTRSTAT_MPROG ئ o§ TWI_MSTRSTAT_LOSTARB_NO TWI_MSTRSTAT_LOSTARB_YES ADI_TWI_MSTRSTAT_LOSTARB 0§ ǧ TWI_MSTRSTAT_ANAK_NO TWI_MSTRSTAT_ANAK_YES ADI_TWI_MSTRSTAT_ANAK § ¨ TWI_MSTRSTAT_DNAK_NO TWI_MSTRSTAT_DNAK_YES ADI_TWI_MSTRSTAT_DNAK 㧠y¨ TWI_MSTRSTAT_BUFRDERR_NO TWI_MSTRSTAT_BUFRDERR_YES ADI_TWI_MSTRSTAT_BUFRDERR 8¨ Ú¨ TWI_MSTRSTAT_BUFWRERR_NO TWI_MSTRSTAT_BUFWRERR_YES ADI_TWI_MSTRSTAT_BUFWRERR ¨ 7© TWI_MSTRSTAT_SDASEN_NO TWI_MSTRSTAT_SDASEN_YES ADI_TWI_MSTRSTAT_SDASEN ú¨ © TWI_MSTRSTAT_SCLSEN_NO TWI_MSTRSTAT_SCLSEN_YES ADI_TWI_MSTRSTAT_SCLSEN U© â© TWI_MSTRSTAT_FREE TWI_MSTRSTAT_BUSY ADI_TWI_MSTRSTAT_BUSBUSY °© ͪ MPROG # LOSTARB # ANAK # DNAK # BUFRDERR # BUFWRERR #
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SDASEN # SCLSEN # BUSBUSY # reserved9 # òª ª # VALUE16 # « _ADI_TWI_MSTRSTAT_t ͪ # ADI_TWI_MSTRSTAT_t òª c« ADDR # reserved7 # « 2« # VALUE16 # ¯« _ADI_TWI_MSTRADDR_t c« # ADI_TWI_MSTRADDR_t « ý« TWI_ISTAT_SINIT_NO TWI_ISTAT_SINIT_YES ADI_TWI_ISTAT_SINIT È« L¬ TWI_ISTAT_SCOMP_NO TWI_ISTAT_SCOMP_YES ADI_TWI_ISTAT_SCOMP ¬ ¬ TWI_ISTAT_SERR_NO TWI_ISTAT_SERR_YES ADI_TWI_ISTAT_SERR f¬ å¬ TWI_ISTAT_SOVF_NO TWI_ISTAT_SOVF_YES ADI_TWI_ISTAT_SOVF ²¬ 3 TWI_ISTAT_MCOMP_NO TWI_ISTAT_MCOMP_YES ADI_TWI_ISTAT_MCOMP þ¬ TWI_ISTAT_MERR_NO TWI_ISTAT_MERR_YES ADI_TWI_ISTAT_MERR M Ð TWI_ISTAT_TXSERV_NO TWI_ISTAT_TXSERV_YES ADI_TWI_ISTAT_TXSERV "® TWI_ISTAT_RXSERV_NO TWI_ISTAT_RXSERV_YES ADI_TWI_ISTAT_RXSERV ë p® TWI_ISTAT_SDAI_NO TWI_ISTAT_SDAI_YES ADI_TWI_ISTAT_SDAI =® ¼® TWI_ISTAT_SCLI_NO TWI_ISTAT_SCLI_YES ADI_TWI_ISTAT_SCLI ® ¦¯ SINIT # SCOMP # SERR # SOVF # MCOMP # MERR #
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TXSERV # RXSERV # reserved8 # SDAI # SCLI # ˯ Õ® # VALUE16 # ï¯ _ADI_TWI_ISTAT_t ¦¯ # ADI_TWI_ISTAT_t ˯ :° TWI_IMSK_SINIT_MSK TWI_IMSK_SINIT_UMSK ADI_TWI_IMSK_SINIT ° ° TWI_IMSK_SCOMP_MSK TWI_IMSK_SCOMP_UMSK ADI_TWI_IMSK_SCOMP S° Ô° TWI_IMSK_SERR_MSK TWI_IMSK_SERR_UMSK ADI_TWI_IMSK_SERR ¡° ± TWI_IMSK_SOVF_MSK TWI_IMSK_SOVF_UMSK ADI_TWI_IMSK_SOVF ì° l± TWI_IMSK_MCOMP_MSK TWI_IMSK_MCOMP_UMSK ADI_TWI_IMSK_MCOMP 7± ¸± TWI_IMSK_MERR_MSK TWI_IMSK_MERR_UMSK ADI_TWI_IMSK_MERR
± ² TWI_IMSK_TXSERV_MSK TWI_IMSK_TXSERV_UMSK ADI_TWI_IMSK_TXSERV б X² TWI_IMSK_RXSERV_MSK TWI_IMSK_RXSERV_UMSK ADI_TWI_IMSK_RXSERV !² ¥² TWI_IMSK_SDAI_MSK TWI_IMSK_SDAI_UMSK ADI_TWI_IMSK_SDAI r² ð² TWI_IMSK_SCLI_MSK TWI_IMSK_SCLI_UMSK ADI_TWI_IMSK_SCLI ½² Ù³ SINIT # SCOMP # SERR # SOVF # MCOMP # MERR #
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TXSERV # RXSERV # reserved8 # SDAI # SCLI # þ³ ³ # VALUE16 # !´ _ADI_TWI_IMSK_t Ù³ # ADI_TWI_IMSK_t þ³ k´ TWI_FIFOCTL_TXNORM TWI_FIFOCTL_TXFLUSH ADI_TWI_FIFOCTL_TXFLUSH 6´ ¾´ TWI_FIFOCTL_RXNORM TWI_FIFOCTL_RXFLUSH ADI_TWI_FIFOCTL_RXFLUSH ´ µ TWI_FIFOCTL_TXONEBYTE TWI_FIFOCTL_TXTWOBYTE ADI_TWI_FIFOCTL_TXILEN Ü´ mµ TWI_FIFOCTL_RXONEBYTE TWI_FIFOCTL_RXTWOBYTE ADI_TWI_FIFOCTL_RXILEN 3µ øµ TXFLUSH # RXFLUSH # TXILEN # RXILEN # reserved4 # ¶ µ # VALUE16 # C¶ _ADI_TWI_FIFOCTL_t øµ # ADI_TWI_FIFOCTL_t ¶ ¡¶ TXSTAT # RXSTAT # reserved4 # ƶ [¶ # VALUE16 # í¶ _ADI_TWI_FIFOSTAT_t ¡¶ # ADI_TWI_FIFOSTAT_t ƶ 8· VALUE # reserved8 # ]· · # VALUE16 # · _ADI_TWI_TXDATA8_t 8· # ADI_TWI_TXDATA8_t ]· ·· VALUE # Ü· · # VALUE16 # ¸ _ADI_TWI_TXDATA16_t ·· # ADI_TWI_TXDATA16_t Ü· N¸ VALUE # reserved8 # s¸ ¸ # VALUE16 # ¸ _ADI_TWI_RXDATA8_t N¸ # ADI_TWI_RXDATA8_t s¸ ͸ VALUE # ò¸ ±¸ # VALUE16 # ¹ _ADI_TWI_RXDATA16_t ͸ # ADI_TWI_RXDATA16_t ò¸ g¹ SPORT_CTL_A_CTL_DIS SPORT_CTL_A_CTL_EN ADI_SPORT_CTL_A_SPENPRI 2¹ º SPORT_CTL_A_CTL_RJUSTIFY_ZFILL SPORT_CTL_A_CTL_RJUSTIFY_SFILL SPORT_CTL_A_CTL_USE_U_LAW SPORT_CTL_A_CTL_USE_A_LAW ADI_SPORT_CTL_A_DTYPE
¹ gº SPORT_CTL_A_CTL_MSB_FIRST SPORT_CTL_A_CTL_LSB_FIRST ADI_SPORT_CTL_A_LSBF %º Áº SPORT_CTL_A_CTL_PACK_DIS SPORT_CTL_A_CTL_PACK_EN ADI_SPORT_CTL_A_PACK º $» SPORT_CTL_A_CTL_EXTERNAL_CLK SPORT_CTL_A_CTL_INTERNAL_CLK ADI_SPORT_CTL_A_ICLK ܺ
» SPORT_CTL_A_CTL_SERIAL_MC_MODE SPORT_CTL_A_CTL_I2S_MODE ADI_SPORT_CTL_A_OPMODE ?» ì» SPORT_CTL_A_CTL_CLK_FALL_EDGE SPORT_CTL_A_CTL_CLK_RISE_EDGE ADI_SPORT_CTL_A_CKRE ¢» G¼ SPORT_CTL_A_CTL_FS_NOT_REQ SPORT_CTL_A_CTL_FS_REQ ADI_SPORT_CTL_A_FSR ¼ §¼ SPORT_CTL_A_CTL_EXTERNAL_FS SPORT_CTL_A_CTL_INTERNAL_FS ADI_SPORT_CTL_A_IFS a¼ ½ SPORT_CTL_A_CTL_DATA_DEP_FS SPORT_CTL_A_CTL_DATA_INDP_FS ADI_SPORT_CTL_A_DIFS Á¼ ]½ SPORT_CTL_A_CTL_FS_LO SPORT_CTL_A_CTL_FS_HI ADI_SPORT_CTL_A_LFS #½ ¶½ SPORT_CTL_A_CTL_EARLY_FS SPORT_CTL_A_CTL_LATE_FS ADI_SPORT_CTL_A_LAFS w½ ¾ SPORT_CTL_A_CTL_RJUST_DIS SPORT_CTL_A_CTL_RJUST_EN ADI_SPORT_CTL_A_RJUST ѽ m¾ SPORT_CTL_A_CTL_LEVEL_FS SPORT_CTL_A_CTL_EDGE_FS ADI_SPORT_CTL_A_FSED .¾ ɾ SPORT_CTL_A_CTL_TXFIN_DIS SPORT_CTL_A_CTL_TXFIN_EN ADI_SPORT_CTL_A_TFIEN ¾ $¿ SPORT_CTL_A_CTL_GCLK_DIS SPORT_CTL_A_CTL_GCLK_EN ADI_SPORT_CTL_A_GCLKEN å¾ ¿ SPORT_CTL_A_CTL_SECONDARY_DIS SPORT_CTL_A_CTL_SECONDARY_EN ADI_SPORT_CTL_A_SPENSEC A¿ Ü¿ SPORT_CTL_A_CTL_RX SPORT_CTL_A_CTL_TX ADI_SPORT_CTL_A_SPTRAN ¨¿ :À SPORT_CTL_A_CTL_SEC_NO_ERR SPORT_CTL_A_CTL_SEC_ERR ADI_SPORT_CTL_A_DERRSEC ù¿ ¹À SPORT_CTL_A_CTL_SEC_EMPTY SPORT_CTL_A_CTL_SEC_PART_FULL SPORT_CTL_A_CTL_SEC_FULL ADI_SPORT_CTL_A_DXSSEC XÀ Á SPORT_CTL_A_CTL_PRM_NO_ERR SPORT_CTL_A_CTL_PRM_ERR ADI_SPORT_CTL_A_DERRPRI ÖÀ Á SPORT_CTL_A_CTL_PRM_EMPTY SPORT_CTL_A_CTL_PRM_PART_FULL SPORT_CTL_A_CTL_PRM_FULL ADI_SPORT_CTL_A_DXSPRI 5Á qà SPENPRI # DTYPE # LSBF # SLEN # PACK # ICLK # OPMODE # CKRE # FSR # IFS # DIFS # LFS # LAFS # RJUST # FSED # TFIEN # GCLKEN #
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reserved22 # SPENSEC # SPTRAN # DERRSEC # DXSSEC # DERRPRI # DXSPRI # à ³Á # VALUE32 # ¼Ã _ADI_SPORT_CTL_A_t qà # ADI_SPORT_CTL_A_t Ã Ä CLKDIV # FSDIV # (Ä Ôà # VALUE32 # NÄ _ADI_SPORT_DIV_A_t Ä # ADI_SPORT_DIV_A_t (Ä Ä SPORT_MCTL_A_MCTL_DIS SPORT_MCTL_A_MCTL_EN ADI_SPORT_MCTL_A_MCE fÄ ýÄ SPORT_MCTL_A_MCTL_MCPD_DIS SPORT_MCTL_A_MCTL_MCPD_EN ADI_SPORT_MCTL_A_MCPDE ºÄ ÖÅ MCE # reserved1 # MCPDE # reserved3 # MFD # WSIZE # reserved15 # WOFFSET #
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reserved26 # ûÅ Å # VALUE32 # "Æ _ADI_SPORT_MCTL_A_t ÖÅ # ADI_SPORT_MCTL_A_t ûÅ WÆ VALUE # |Æ ;Æ # VALUE32 # ¢Æ _ADI_SPORT_CS0_A_t WÆ # ADI_SPORT_CS0_A_t |Æ ÖÆ VALUE # ûÆ ºÆ # VALUE32 # !Ç _ADI_SPORT_CS1_A_t ÖÆ # ADI_SPORT_CS1_A_t ûÆ UÇ VALUE # zÇ 9Ç # VALUE32 # Ç _ADI_SPORT_CS2_A_t UÇ # ADI_SPORT_CS2_A_t zÇ ÔÇ VALUE # ùÇ ¸Ç # VALUE32 # È _ADI_SPORT_CS3_A_t ÔÇ # ADI_SPORT_CS3_A_t ùÇ îÈ DERRPMSK # DERRSMSK # FSERRMSK # reserved3 # DERRPSTAT # DERRSSTAT # FSERRSTAT # reserved7 # É 7È # VALUE32 # 9É _ADI_SPORT_ERR_A_t îÈ # ADI_SPORT_ERR_A_t É É CURCHAN #
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reserved10 # «É QÉ # VALUE32 # ÓÉ _ADI_SPORT_MSTAT_A_t É # ADI_SPORT_MSTAT_A_t «É 4Ê SPORT_CTL2_A_CTL2_FS_MUX_DIS SPORT_CTL2_A_CTL2_FS_MUX_EN ADI_SPORT_CTL2_A_FSMUXSEL íÉ Ê SPORT_CTL2_A_CTL2_CLK_MUX_DIS SPORT_CTL2_A_CTL2_CLK_MUX_EN ADI_SPORT_CTL2_A_CKMUXSEL TÊ Ë FSMUXSEL # CKMUXSEL # reserved2 # ,Ë ½Ê # VALUE32 # SË _ADI_SPORT_CTL2_A_t Ë # ADI_SPORT_CTL2_A_t ,Ë Ë VALUE # Ë lË # VALUE32 # ÕË _ADI_SPORT_TXPRI_A_t Ë # ADI_SPORT_TXPRI_A_t Ë Ì VALUE # 0Ì ïË # VALUE32 # XÌ _ADI_SPORT_RXPRI_A_t Ì # ADI_SPORT_RXPRI_A_t 0Ì Ì VALUE # ³Ì rÌ # VALUE32 # ÛÌ _ADI_SPORT_TXSEC_A_t Ì # ADI_SPORT_TXSEC_A_t ³Ì Í VALUE # 6Í õÌ # VALUE32 # ^Í _ADI_SPORT_RXSEC_A_t Í # ADI_SPORT_RXSEC_A_t 6Í 6Ï SPENPRI # DTYPE # LSBF # SLEN # PACK # ICLK # OPMODE # CKRE # FSR # IFS # DIFS # LFS # LAFS # RJUST # FSED # TFIEN # GCLKEN #
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reserved22 # SPENSEC # SPTRAN # DERRSEC # DXSSEC # DERRPRI # DXSPRI # [Ï xÍ # VALUE32 # Ï _ADI_SPORT_CTL_B_t 6Ï # ADI_SPORT_CTL_B_t [Ï ÈÏ CLKDIV # FSDIV # íÏ Ï # VALUE32 # Ð _ADI_SPORT_DIV_B_t ÈÏ # ADI_SPORT_DIV_B_t íÏ çÐ MCE # reserved1 # MCPDE # reserved3 # MFD # WSIZE # reserved15 # WOFFSET #
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reserved26 # Ñ +Ð # VALUE32 # 3Ñ _ADI_SPORT_MCTL_B_t çÐ # ADI_SPORT_MCTL_B_t Ñ hÑ VALUE # Ñ LÑ # VALUE32 # ³Ñ _ADI_SPORT_CS0_B_t hÑ # ADI_SPORT_CS0_B_t Ñ çÑ VALUE # Ò ËÑ # VALUE32 # 2Ò _ADI_SPORT_CS1_B_t çÑ # ADI_SPORT_CS1_B_t Ò fÒ VALUE # Ò JÒ # VALUE32 # ±Ò _ADI_SPORT_CS2_B_t fÒ # ADI_SPORT_CS2_B_t Ò åÒ VALUE #
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Ó ÉÒ # VALUE32 # 0Ó _ADI_SPORT_CS3_B_t åÒ # ADI_SPORT_CS3_B_t
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Ó ÿÓ DERRPMSK # DERRSMSK # FSERRMSK # reserved3 # DERRPSTAT # DERRSSTAT # FSERRSTAT # reserved7 # $Ô HÓ # VALUE32 # JÔ _ADI_SPORT_ERR_B_t ÿÓ # ADI_SPORT_ERR_B_t $Ô Ô CURCHAN #
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reserved10 # ¼Ô bÔ # VALUE32 # äÔ _ADI_SPORT_MSTAT_B_t Ô # ADI_SPORT_MSTAT_B_t ¼Ô HÕ FSMUXSEL # CKMUXSEL # reserved2 # mÕ þÔ # VALUE32 # Õ _ADI_SPORT_CTL2_B_t HÕ # ADI_SPORT_CTL2_B_t mÕ ÉÕ VALUE # îÕ Õ # VALUE32 # Ö _ADI_SPORT_TXPRI_B_t ÉÕ # ADI_SPORT_TXPRI_B_t îÕ LÖ VALUE # qÖ 0Ö # VALUE32 # Ö _ADI_SPORT_RXPRI_B_t LÖ # ADI_SPORT_RXPRI_B_t qÖ ÏÖ VALUE # ôÖ ³Ö # VALUE32 # × _ADI_SPORT_TXSEC_B_t ÏÖ # ADI_SPORT_TXSEC_B_t ôÖ R× VALUE # w× 6× # VALUE32 # × _ADI_SPORT_RXSEC_B_t R× # ADI_SPORT_RXSEC_B_t w× è× UART_CTL_CLK_DIS UART_CTL_CLK_EN ADI_UART_CTL_EN ¹× /Ø UART_CTL_LOOP_DIS UART_CTL_LOOP_EN ADI_UART_CTL_LOOP_EN þ× Ø UART_CTL_UART_MODE UART_CTL_MDB_MODE UART_CTL_IRDA_MODE ADI_UART_CTL_MOD JØ ÿØ UART_CTL_WL5BITS UART_CTL_WL6BITS UART_CTL_WL7BITS UART_CTL_WL8BITS ADI_UART_CTL_WLS ©Ø QÙ UART_CTL_NO_EXTRA_STB UART_CTL_ONE_EXTRA_STB ADI_UART_CTL_STB Ù ¥Ù UART_CTL_NO_EXTRA_STBH UART_CTL_ONE_EXTRA_STBH ADI_UART_CTL_STBH hÙ òÙ UART_CTL_PARITY_DIS UART_CTL_PARITY_EN ADI_UART_CTL_PEN ½Ù @Ú UART_CTL_ODD_PARITY UART_CTL_EVEN_PARITY ADI_UART_CTL_EPS Ú Ú UART_CTL_NORM_PARITY UART_CTL_STICKY_PARITY ADI_UART_CTL_STP WÚ éÚ UART_CTL_NORM_PARITY_ERR UART_CTL_FORCE_PARITY_ERR ADI_UART_CTL_FPE ¨Ú ;Û UART_CTL_NORM_FRM_ERR UART_CTL_FORCE_FRM_ERR ADI_UART_CTL_FFE Û Û UART_CTL_NORM_BREAK UART_CTL_FORCE_BREAK ADI_UART_CTL_SB RÛ ÑÛ UART_CTL_FCPOL_LO UART_CTL_FCPOL_HI ADI_UART_CTL_FCPOL Û Ü UART_CTL_RPOLC_LO UART_CTL_RPOLC_HI ADI_UART_CTL_RPOLC êÛ gÜ UART_CTL_TPOLC_LO UART_CTL_TPOLC_HI ADI_UART_CTL_TPOLC 5Ü ¸Ü UART_CTL_RTS_DEASSERT UART_CTL_RTS_ASSERT ADI_UART_CTL_MRTS Ü ýÜ UART_CTL_TX_ON UART_CTL_TX_OFF ADI_UART_CTL_XOFF ÐÜ FÝ UART_CTL_RTS_MAN UART_CTL_RTS_AUTO ADI_UART_CTL_ARTS Ý Ý UART_CTL_CTS_MAN UART_CTL_CTS_AUTO ADI_UART_CTL_ACTS ^Ý ÝÝ UART_CTL_RX_IRQ_TH4 UART_CTL_RX_IRQ_TH7 ADI_UART_CTL_RFIT §Ý +Þ UART_CTL_RX_RTS_TH4 UART_CTL_RX_RTS_TH7 ADI_UART_CTL_RFRT õÝ à EN # LOOP_EN # reserved2 # MOD # reserved6 # WLS # reserved10 # STB # STBH # PEN # EPS # STP # FPE # FFE # SB # reserved20 #
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FCPOL # RPOLC # TPOLC # MRTS # XOFF # ARTS # ACTS # RFIT # RFRT # reserved31 # Bà CÞ # VALUE32 # eà _ADI_UART_CTL_t à # ADI_UART_CTL_t Bà à UART_STAT_NO_DATA UART_STAT_NEW_DATA ADI_UART_STAT_DR zà ùà UART_STAT_NO_OVR_ERR UART_STAT_OVR_ERR ADI_UART_STAT_OE Äà Ká UART_STAT_NO_PARITY_ERR UART_STAT_PARITY_ERR ADI_UART_STAT_PE á á UART_STAT_NO_FRAMING_ERR UART_STAT_FRAMING_ERR ADI_UART_STAT_FE bá ïá UART_STAT_NO_BREAK_INT UART_STAT_BREAK_INT ADI_UART_STAT_BI ¶á @â UART_STAT_THR_NOT_EMPTY UART_STAT_THR_EMPTY ADI_UART_STAT_THRE â â UART_STAT_TX_NOT_EMPTY UART_STAT_TX_EMPTY ADI_UART_STAT_TEMT Yâ àâ UART_STAT_TX_NOT_DONE UART_STAT_TX_DONE ADI_UART_STAT_TFI ªâ 4ã UART_STAT_ADDR_LO_STKY UART_STAT_ADDR_HI_STKY ADI_UART_STAT_ASTKY øâ ã UART_STAT_ADDR_LO UART_STAT_ADDR_HI ADI_UART_STAT_ADDR Nã Öã UART_STAT_NO_RX_PROGRESS UART_STAT_RX_PROGRESS ADI_UART_STAT_RO ã 'ä UART_STAT_CTS_LO_STKY UART_STAT_CTS_HI_STKY ADI_UART_STAT_SCTS íã pä UART_STAT_CTS_LO UART_STAT_CTS_HI ADI_UART_STAT_CTS @ä ºä UART_STAT_RFCS_LO UART_STAT_RFCS_HI ADI_UART_STAT_RFCS ä æ DR # OE # PE # FE # BI # THRE # reserved6 # TEMT # TFI # ASTKY # ADDR # RO # SCTS # reserved13 # CTS # RFCS # reserved18 # 'æ Óä # VALUE32 # Kæ _ADI_UART_STAT_t æ # ADI_UART_STAT_t 'æ æ VALUE # reserved8 # ¸æ aæ # VALUE32 # Ûæ _ADI_UART_SCR_t æ # ADI_UART_SCR_t ¸æ -ç UART_CLK_DIS_DIV_BY_ONE UART_CLK_EN_DIV_BY_ONE ADI_UART_CLK_EDBO ðæ ç DIV # reserved16 # EDBO # ¬ç Eç # VALUE32 # Ïç _ADI_UART_CLK_t ç # ADI_UART_CLK_t ¬ç è UART_IMSK_ERBFI_LO UART_IMSK_ERBFI_HI ADI_UART_IMSK_ERBFI äç fè UART_IMSK_ETBEI_LO UART_IMSK_ETBEI_HI ADI_UART_IMSK_ETBEI 2è ²è UART_IMSK_ELSI_LO UART_IMSK_ELSI_HI ADI_UART_IMSK_ELSI è ÿè UART_IMSK_EDSSI_LO UART_IMSK_EDSSI_HI ADI_UART_IMSK_EDSSI Ëè Oé UART_IMSK_EDTPTI_LO UART_IMSK_EDTPTI_HI ADI_UART_IMSK_EDTPTI é é UART_IMSK_ETFI_LO UART_IMSK_ETFI_HI ADI_UART_IMSK_ETFI jé éé UART_IMSK_ERFCI_LO UART_IMSK_ERFCI_HI ADI_UART_IMSK_ERFCI µé 5ê UART_IMSK_EAWI_LO UART_IMSK_EAWI_HI ADI_UART_IMSK_EAWI ê ê UART_IMSK_ERXS_LO UART_IMSK_ERXS_HI ADI_UART_IMSK_ERXS Nê Ëê UART_IMSK_ETXS_LO UART_IMSK_ETXS_HI ADI_UART_IMSK_ETXS ê µë ERBFI # ETBEI # ELSI # EDSSI # EDTPTI # ETFI # ERFCI # EAWI # ERXS # ETXS # reserved10 # Úë äê # VALUE32 # þë _ADI_UART_IMSK_t µë # ADI_UART_IMSK_t Úë åì ERBFI # ETBEI # ELSI # EDSSI # EDTPTI # ETFI # ERFCI # EAWI # ERXS # ETXS # reserved10 #
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í ì # VALUE32 # 2í _ADI_UART_IMSK_SET_t åì # ADI_UART_IMSK_SET_t
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í î ERBFI # ETBEI # ELSI # EDSSI # EDTPTI # ETFI # ERFCI # EAWI # ERXS # ETXS # reserved10 # Bî Lí # VALUE32 # jî _ADI_UART_IMSK_CLR_t î # ADI_UART_IMSK_CLR_t Bî ¶î VALUE # reserved8 # Ûî î # VALUE32 # þî _ADI_UART_RBR_t ¶î # ADI_UART_RBR_t Ûî Eï VALUE # reserved8 # jï ï # VALUE32 # ï _ADI_UART_THR_t Eï # ADI_UART_THR_t jï Ôï VALUE # reserved8 # ùï ¢ï # VALUE32 # ð _ADI_UART_TAIP_t Ôï # ADI_UART_TAIP_t ùï fð VALUE # reserved11 # ð 3ð # VALUE32 # ®ð _ADI_UART_TSR_t fð # ADI_UART_TSR_t ð öð VALUE #
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reserved10 # ñ Ãð # VALUE32 # >ñ _ADI_UART_RSR_t öð # ADI_UART_RSR_t ñ ñ VALUE # reserved16 # «ñ Sñ # VALUE32 # Ðñ _ADI_UART_TXCNT_t ñ # ADI_UART_TXCNT_t «ñ ò VALUE # reserved16 # ?ò çñ # VALUE32 # dò _ADI_UART_RXCNT_t ò # ADI_UART_RXCNT_t ?ò ¢ó PX0 # PX1 # PX2 # PX3 # PX4 # PX5 # PX6 # PX7 # PX8 # PX9 # PX10 # PX11 # PX12 # PX13 # PX14 # PX15 # reserved16 # Çó {ò # VALUE32 # êó _ADI_PORT_FER_t ¢ó # ADI_PORT_FER_t Çó &õ PX0 # PX1 # PX2 # PX3 # PX4 # PX5 # PX6 # PX7 # PX8 # PX9 # PX10 # PX11 # PX12 # PX13 # PX14 # PX15 # reserved16 # Kõ ÿó # VALUE32 # rõ _ADI_PORT_FER_SET_t &õ # ADI_PORT_FER_SET_t Kõ ²ö PX0 # PX1 # PX2 # PX3 # PX4 # PX5 # PX6 # PX7 # PX8 # PX9 # PX10 # PX11 # PX12 # PX13 # PX14 # PX15 # reserved16 # ×ö õ # VALUE32 # þö _ADI_PORT_FER_CLR_t ²ö # ADI_PORT_FER_CLR_t ×ö >ø PX0 # PX1 # PX2 # PX3 # PX4 # PX5 # PX6 # PX7 # PX8 # PX9 # PX10 # PX11 # PX12 # PX13 # PX14 # PX15 # reserved16 # cø ÷ # VALUE32 # ø _ADI_PORT_DATA_t >ø # ADI_PORT_DATA_t cø Äù PX0 # PX1 # PX2 # PX3 # PX4 # PX5 # PX6 # PX7 # PX8 # PX9 # PX10 # PX11 # PX12 # PX13 # PX14 # PX15 # reserved16 # éù ø # VALUE32 # ú _ADI_PORT_DATA_SET_t Äù # ADI_PORT_DATA_SET_t éù Rû PX0 # PX1 # PX2 # PX3 # PX4 # PX5 # PX6 # PX7 # PX8 # PX9 # PX10 # PX11 # PX12 # PX13 # PX14 # PX15 # reserved16 # wû +ú # VALUE32 # û _ADI_PORT_DATA_CLR_t Rû # ADI_PORT_DATA_CLR_t wû àü PX0 # PX1 # PX2 # PX3 # PX4 # PX5 # PX6 # PX7 # PX8 # PX9 # PX10 # PX11 # PX12 # PX13 # PX14 # PX15 # reserved16 # ý ¹û # VALUE32 # (ý _ADI_PORT_DIR_t àü # ADI_PORT_DIR_t ý dþ PX0 # PX1 # PX2 # PX3 # PX4 # PX5 # PX6 # PX7 # PX8 # PX9 # PX10 # PX11 # PX12 # PX13 # PX14 # PX15 # reserved16 # þ =ý # VALUE32 # °þ _ADI_PORT_DIR_SET_t dþ # ADI_PORT_DIR_SET_t þ ðÿ PX0 # PX1 # PX2 # PX3 # PX4 # PX5 # PX6 # PX7 # PX8 # PX9 # PX10 # PX11 # PX12 # PX13 # PX14 # PX15 # reserved16 # Éþ # VALUE32 # < _ADI_PORT_DIR_CLR_t ðÿ # ADI_PORT_DIR_CLR_t | PX0 # PX1 # PX2 # PX3 # PX4 # PX5 # PX6 # PX7 # PX8 # PX9 # PX10 # PX11 # PX12 # PX13 # PX14 # PX15 # reserved16 # ¡ U # VALUE32 # Å _ADI_PORT_INEN_t | # ADI_PORT_INEN_t ¡ PX0 # PX1 # PX2 # PX3 # PX4 # PX5 # PX6 # PX7 # PX8 # PX9 # PX10 # PX11 # PX12 # PX13 # PX14 # PX15 # reserved16 # ' Û # VALUE32 # O _ADI_PORT_INEN_SET_t # ADI_PORT_INEN_SET_t ' PX0 # PX1 # PX2 # PX3 # PX4 # PX5 # PX6 # PX7 # PX8 # PX9 # PX10 # PX11 # PX12 # PX13 # PX14 # PX15 # reserved16 # µ i # VALUE32 # Ý _ADI_PORT_INEN_CLR_t # ADI_PORT_INEN_CLR_t µ MUX0 # MUX1 # MUX2 # MUX3 # MUX4 # MUX5 # MUX6 # MUX7 # MUX8 # MUX9 # MUX10 #
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MUX11 # MUX12 # MUX13 # MUX14 # MUX15 # < ÷ # VALUE32 # _ _ADI_PORT_MUX_t # ADI_PORT_MUX_t < PX0 # PX1 # PX2 # PX3 # PX4 # PX5 # PX6 # PX7 # PX8 # PX9 # PX10 # PX11 # PX12 # PX13 # PX14 # PX15 # reserved16 # À t # VALUE32 # è _ADI_PORT_DATA_TGL_t # ADI_PORT_DATA_TGL_t À ) PX0 # PX1 # PX2 # PX3 # PX4 # PX5 # PX6 # PX7 # PX8 # PX9 # PX10 # PX11 # PX12 # PX13 # PX14 # PX15 # reserved16 # N # VALUE32 # q _ADI_PORT_POL_t ) # ADI_PORT_POL_t N
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PX0 # PX1 # PX2 # PX3 # PX4 # PX5 # PX6 # PX7 # PX8 # PX9 # PX10 # PX11 # PX12 # PX13 # PX14 # PX15 # reserved16 # Ò
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# VALUE32 # ù
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_ADI_PORT_POL_SET_t
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# ADI_PORT_POL_SET_t Ò
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9 PX0 # PX1 # PX2 # PX3 # PX4 # PX5 # PX6 # PX7 # PX8 # PX9 # PX10 # PX11 # PX12 # PX13 # PX14 # PX15 # reserved16 # ^ # VALUE32 #
_ADI_PORT_POL_CLR_t 9 # ADI_PORT_POL_CLR_t ^ 3 FER # MUX # DATA # DIR # INEN # POLAR # reserved6 # LOCK # X # VALUE32 # | _ADI_PORT_LOCK_t 3 # ADI_PORT_LOCK_t X ¹ PX0 # PX1 # PX2 # PX3 # PX4 # PX5 # PX6 # PX7 # PX8 # PX9 # PX10 # PX11 # PX12 # PX13 # PX14 # PX15 # reserved16 # Þ # VALUE32 # _ADI_PORT_TRIG_TGL_t ¹ # ADI_PORT_TRIG_TGL_t Þ G PX0 # PX1 # PX2 # PX3 # PX4 # PX5 # PX6 # PX7 # PX8 # PX9 # PX10 # PX11 # PX12 # PX13 # PX14 # PX15 # reserved16 # l # VALUE32 # _ADI_PORT_CFG0_FER_t G # ADI_PORT_CFG0_FER_t l Õ PX0 # PX1 # PX2 # PX3 # PX4 # PX5 # PX6 # PX7 # PX8 # PX9 # PX10 # PX11 # PX12 # PX13 # PX14 # PX15 # reserved16 # ú ® # VALUE32 # & _ADI_PORT_CFG0_FER_SET_t Õ # ADI_PORT_CFG0_FER_SET_t ú k PX0 # PX1 # PX2 # PX3 # PX4 # PX5 # PX6 # PX7 # PX8 # PX9 # PX10 # PX11 # PX12 # PX13 # PX14 # PX15 # reserved16 # D # VALUE32 # ¼ _ADI_PORT_CFG0_FER_CLR_t k # ADI_PORT_CFG0_FER_CLR_t PX0 # PX1 # PX2 # PX3 # PX4 # PX5 # PX6 # PX7 # PX8 # PX9 # PX10 # PX11 # PX12 # PX13 # PX14 # PX15 # reserved16 # & Ú # VALUE32 # O _ADI_PORT_CFG0_DATA_t # ADI_PORT_CFG0_DATA_t & PX0 # PX1 # PX2 # PX3 # PX4 # PX5 # PX6 # PX7 # PX8 # PX9 # PX10 # PX11 # PX12 # PX13 # PX14 # PX15 # reserved16 # ¶ j # VALUE32 # ã _ADI_PORT_CFG0_DATA_SET_t # ADI_PORT_CFG0_DATA_SET_t ¶ ) PX0 # PX1 # PX2 # PX3 # PX4 # PX5 # PX6 # PX7 # PX8 # PX9 # PX10 # PX11 # PX12 # PX13 # PX14 # PX15 # reserved16 # N # VALUE32 # { _ADI_PORT_CFG0_DATA_CLR_t ) # ADI_PORT_CFG0_DATA_CLR_t N Á PX0 # PX1 # PX2 # PX3 # PX4 # PX5 # PX6 # PX7 # PX8 # PX9 # PX10 # PX11 # PX12 # PX13 # PX14 # PX15 # reserved16 # æ # VALUE32 # _ADI_PORT_CFG0_DIR_t Á # ADI_PORT_CFG0_DIR_t æ O PX0 # PX1 # PX2 # PX3 # PX4 # PX5 # PX6 # PX7 # PX8 # PX9 # PX10 # PX11 # PX12 # PX13 # PX14 # PX15 # reserved16 # t ( # VALUE32 # _ADI_PORT_CFG0_DIR_SET_t O # ADI_PORT_CFG0_DIR_SET_t t å PX0 # PX1 # PX2 # PX3 # PX4 # PX5 # PX6 # PX7 # PX8 # PX9 # PX10 # PX11 # PX12 # PX13 # PX14 # PX15 # reserved16 #
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¾ # VALUE32 # 6 _ADI_PORT_CFG0_DIR_CLR_t å # ADI_PORT_CFG0_DIR_CLR_t
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{ PX0 # PX1 # PX2 # PX3 # PX4 # PX5 # PX6 # PX7 # PX8 # PX9 # PX10 # PX11 # PX12 # PX13 # PX14 # PX15 # reserved16 # T # VALUE32 # É _ADI_PORT_CFG0_INEN_t { # ADI_PORT_CFG0_INEN_t PX0 # PX1 # PX2 # PX3 # PX4 # PX5 # PX6 # PX7 # PX8 # PX9 # PX10 # PX11 # PX12 # PX13 # PX14 # PX15 # reserved16 # 0 ä # VALUE32 # ] _ADI_PORT_CFG0_INEN_SET_t # ADI_PORT_CFG0_INEN_SET_t 0 £! PX0 # PX1 # PX2 # PX3 # PX4 # PX5 # PX6 # PX7 # PX8 # PX9 # PX10 # PX11 # PX12 # PX13 # PX14 # PX15 # reserved16 # È! | # VALUE32 # õ! _ADI_PORT_CFG0_INEN_CLR_t £! # ADI_PORT_CFG0_INEN_CLR_t È! 4# MUX0 # MUX1 # MUX2 # MUX3 # MUX4 # MUX5 # MUX6 # MUX7 # MUX8 # MUX9 # MUX10 #
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MUX11 # MUX12 # MUX13 # MUX14 # MUX15 # Y# " # VALUE32 # # _ADI_PORT_CFG0_MUX_t 4# # ADI_PORT_CFG0_MUX_t Y# Â$ PX0 # PX1 # PX2 # PX3 # PX4 # PX5 # PX6 # PX7 # PX8 # PX9 # PX10 # PX11 # PX12 # PX13 # PX14 # PX15 # reserved16 # ç$ # # VALUE32 # % _ADI_PORT_CFG0_DATA_TGL_t Â$ # ADI_PORT_CFG0_DATA_TGL_t ç$ Z& PX0 # PX1 # PX2 # PX3 # PX4 # PX5 # PX6 # PX7 # PX8 # PX9 # PX10 # PX11 # PX12 # PX13 # PX14 # PX15 # reserved16 # & 3% # VALUE32 # §& _ADI_PORT_CFG0_POL_t Z& # ADI_PORT_CFG0_POL_t & è' PX0 # PX1 # PX2 # PX3 # PX4 # PX5 # PX6 # PX7 # PX8 # PX9 # PX10 # PX11 # PX12 # PX13 # PX14 # PX15 # reserved16 # ( Á& # VALUE32 # 9( _ADI_PORT_CFG0_POL_SET_t è' # ADI_PORT_CFG0_POL_SET_t ( ~) PX0 # PX1 # PX2 # PX3 # PX4 # PX5 # PX6 # PX7 # PX8 # PX9 # PX10 # PX11 # PX12 # PX13 # PX14 # PX15 # reserved16 # £) W( # VALUE32 # Ï) _ADI_PORT_CFG0_POL_CLR_t ~) # ADI_PORT_CFG0_POL_CLR_t £) * FER # MUX # DATA # DIR # INEN # POLAR # reserved6 # LOCK # §* í) # VALUE32 # Ð* _ADI_PORT_CFG0_LOCK_t * # ADI_PORT_CFG0_LOCK_t §* , PX0 # PX1 # PX2 # PX3 # PX4 # PX5 # PX6 # PX7 # PX8 # PX9 # PX10 # PX11 # PX12 # PX13 # PX14 # PX15 # reserved16 # 7, ë* # VALUE32 # d, _ADI_PORT_CFG0_TRIG_TGL_t , # ADI_PORT_CFG0_TRIG_TGL_t 7, ª- PX0 # PX1 # PX2 # PX3 # PX4 # PX5 # PX6 # PX7 # PX8 # PX9 # PX10 # PX11 # PX12 # PX13 # PX14 # PX15 # reserved16 # Ï- , # VALUE32 # ÷- _ADI_PORT_CFG1_FER_t ª- # ADI_PORT_CFG1_FER_t Ï- 8/ PX0 # PX1 # PX2 # PX3 # PX4 # PX5 # PX6 # PX7 # PX8 # PX9 # PX10 # PX11 # PX12 # PX13 # PX14 # PX15 # reserved16 # ]/ . # VALUE32 # / _ADI_PORT_CFG1_FER_SET_t 8/ # ADI_PORT_CFG1_FER_SET_t ]/ Î0 PX0 # PX1 # PX2 # PX3 # PX4 # PX5 # PX6 # PX7 # PX8 # PX9 # PX10 # PX11 # PX12 # PX13 # PX14 # PX15 # reserved16 # ó0 §/ # VALUE32 # 1 _ADI_PORT_CFG1_FER_CLR_t Î0 # ADI_PORT_CFG1_FER_CLR_t ó0 d2 PX0 # PX1 # PX2 # PX3 # PX4 # PX5 # PX6 # PX7 # PX8 # PX9 # PX10 # PX11 # PX12 # PX13 # PX14 # PX15 # reserved16 # 2 =1 # VALUE32 # ²2 _ADI_PORT_CFG1_DATA_t d2 # ADI_PORT_CFG1_DATA_t 2 ô3 PX0 # PX1 # PX2 # PX3 # PX4 # PX5 # PX6 # PX7 # PX8 # PX9 # PX10 # PX11 # PX12 # PX13 # PX14 # PX15 # reserved16 # 4 Í2 # VALUE32 # F4 _ADI_PORT_CFG1_DATA_SET_t ô3 # ADI_PORT_CFG1_DATA_SET_t 4 5 PX0 # PX1 # PX2 # PX3 # PX4 # PX5 # PX6 # PX7 # PX8 # PX9 # PX10 # PX11 # PX12 # PX13 # PX14 # PX15 # reserved16 # ±5 e4 # VALUE32 # Þ5 _ADI_PORT_CFG1_DATA_CLR_t 5 # ADI_PORT_CFG1_DATA_CLR_t ±5 $7 PX0 # PX1 # PX2 # PX3 # PX4 # PX5 # PX6 # PX7 # PX8 # PX9 # PX10 # PX11 # PX12 # PX13 # PX14 # PX15 # reserved16 # I7 ý5 # VALUE32 # q7 _ADI_PORT_CFG1_DIR_t $7 # ADI_PORT_CFG1_DIR_t I7 ²8 PX0 # PX1 # PX2 # PX3 # PX4 # PX5 # PX6 # PX7 # PX8 # PX9 # PX10 # PX11 # PX12 # PX13 # PX14 # PX15 # reserved16 # ×8 7 # VALUE32 # 9 _ADI_PORT_CFG1_DIR_SET_t ²8 # ADI_PORT_CFG1_DIR_SET_t ×8 H: PX0 # PX1 # PX2 # PX3 # PX4 # PX5 # PX6 # PX7 # PX8 # PX9 # PX10 # PX11 # PX12 # PX13 # PX14 # PX15 # reserved16 # m: !9 # VALUE32 # : _ADI_PORT_CFG1_DIR_CLR_t H: # ADI_PORT_CFG1_DIR_CLR_t m: Þ; PX0 # PX1 # PX2 # PX3 # PX4 # PX5 # PX6 # PX7 # PX8 # PX9 # PX10 # PX11 # PX12 # PX13 # PX14 # PX15 # reserved16 # < ·: # VALUE32 # ,< _ADI_PORT_CFG1_INEN_t Þ; # ADI_PORT_CFG1_INEN_t < n= PX0 # PX1 # PX2 # PX3 # PX4 # PX5 # PX6 # PX7 # PX8 # PX9 # PX10 # PX11 # PX12 # PX13 # PX14 # PX15 # reserved16 # = G< # VALUE32 # À= _ADI_PORT_CFG1_INEN_SET_t n= # ADI_PORT_CFG1_INEN_SET_t = ? PX0 # PX1 # PX2 # PX3 # PX4 # PX5 # PX6 # PX7 # PX8 # PX9 # PX10 # PX11 # PX12 # PX13 # PX14 # PX15 # reserved16 # +? ß= # VALUE32 # X? _ADI_PORT_CFG1_INEN_CLR_t ? # ADI_PORT_CFG1_INEN_CLR_t +? @ MUX0 # MUX1 # MUX2 # MUX3 # MUX4 # MUX5 # MUX6 # MUX7 # MUX8 # MUX9 # MUX10 #
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MUX11 # MUX12 # MUX13 # MUX14 # MUX15 # ¼@ w? # VALUE32 # ä@ _ADI_PORT_CFG1_MUX_t @ # ADI_PORT_CFG1_MUX_t ¼@ %B PX0 # PX1 # PX2 # PX3 # PX4 # PX5 # PX6 # PX7 # PX8 # PX9 # PX10 # PX11 # PX12 # PX13 # PX14 # PX15 # reserved16 # JB þ@ # VALUE32 # wB _ADI_PORT_CFG1_DATA_TGL_t %B # ADI_PORT_CFG1_DATA_TGL_t JB ½C PX0 # PX1 # PX2 # PX3 # PX4 # PX5 # PX6 # PX7 # PX8 # PX9 # PX10 # PX11 # PX12 # PX13 # PX14 # PX15 # reserved16 # âC B # VALUE32 #
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D _ADI_PORT_CFG1_POL_t ½C # ADI_PORT_CFG1_POL_t âC KE PX0 # PX1 # PX2 # PX3 # PX4 # PX5 # PX6 # PX7 # PX8 # PX9 # PX10 # PX11 # PX12 # PX13 # PX14 # PX15 # reserved16 # pE $D # VALUE32 # E _ADI_PORT_CFG1_POL_SET_t KE # ADI_PORT_CFG1_POL_SET_t pE áF PX0 # PX1 # PX2 # PX3 # PX4 # PX5 # PX6 # PX7 # PX8 # PX9 # PX10 # PX11 # PX12 # PX13 # PX14 # PX15 # reserved16 # G ºE # VALUE32 # 2G _ADI_PORT_CFG1_POL_CLR_t áF # ADI_PORT_CFG1_POL_CLR_t G åG FER # MUX # DATA # DIR # INEN # POLAR # reserved6 # LOCK #
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H PG # VALUE32 # 3H _ADI_PORT_CFG1_LOCK_t åG # ADI_PORT_CFG1_LOCK_t
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H uI PX0 # PX1 # PX2 # PX3 # PX4 # PX5 # PX6 # PX7 # PX8 # PX9 # PX10 # PX11 # PX12 # PX13 # PX14 # PX15 # reserved16 # I NH # VALUE32 # ÇI _ADI_PORT_CFG1_TRIG_TGL_t uI # ADI_PORT_CFG1_TRIG_TGL_t I K PX0 # PX1 # PX2 # PX3 # PX4 # PX5 # PX6 # PX7 # PX8 # PX9 # PX10 # PX11 # PX12 # PX13 # PX14 # PX15 # reserved16 # 2K æI # VALUE32 # ZK _ADI_PORT_CFG2_FER_t K # ADI_PORT_CFG2_FER_t 2K L PX0 # PX1 # PX2 # PX3 # PX4 # PX5 # PX6 # PX7 # PX8 # PX9 # PX10 # PX11 # PX12 # PX13 # PX14 # PX15 # reserved16 # ÀL tK # VALUE32 # ìL _ADI_PORT_CFG2_FER_SET_t L # ADI_PORT_CFG2_FER_SET_t ÀL 1N PX0 # PX1 # PX2 # PX3 # PX4 # PX5 # PX6 # PX7 # PX8 # PX9 # PX10 # PX11 # PX12 # PX13 # PX14 # PX15 # reserved16 # VN
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M # VALUE32 # N _ADI_PORT_CFG2_FER_CLR_t 1N # ADI_PORT_CFG2_FER_CLR_t VN ÇO PX0 # PX1 # PX2 # PX3 # PX4 # PX5 # PX6 # PX7 # PX8 # PX9 # PX10 # PX11 # PX12 # PX13 # PX14 # PX15 # reserved16 # ìO N # VALUE32 # P _ADI_PORT_CFG2_DATA_t ÇO # ADI_PORT_CFG2_DATA_t ìO WQ PX0 # PX1 # PX2 # PX3 # PX4 # PX5 # PX6 # PX7 # PX8 # PX9 # PX10 # PX11 # PX12 # PX13 # PX14 # PX15 # reserved16 # |Q 0P # VALUE32 # ©Q _ADI_PORT_CFG2_DATA_SET_t WQ # ADI_PORT_CFG2_DATA_SET_t |Q ïR PX0 # PX1 # PX2 # PX3 # PX4 # PX5 # PX6 # PX7 # PX8 # PX9 # PX10 # PX11 # PX12 # PX13 # PX14 # PX15 # reserved16 # S ÈQ # VALUE32 # AS _ADI_PORT_CFG2_DATA_CLR_t ïR # ADI_PORT_CFG2_DATA_CLR_t S T PX0 # PX1 # PX2 # PX3 # PX4 # PX5 # PX6 # PX7 # PX8 # PX9 # PX10 # PX11 # PX12 # PX13 # PX14 # PX15 # reserved16 # ¬T `S # VALUE32 # ÔT _ADI_PORT_CFG2_DIR_t T # ADI_PORT_CFG2_DIR_t ¬T V PX0 # PX1 # PX2 # PX3 # PX4 # PX5 # PX6 # PX7 # PX8 # PX9 # PX10 # PX11 # PX12 # PX13 # PX14 # PX15 # reserved16 # :V îT # VALUE32 # fV _ADI_PORT_CFG2_DIR_SET_t V # ADI_PORT_CFG2_DIR_SET_t :V «W PX0 # PX1 # PX2 # PX3 # PX4 # PX5 # PX6 # PX7 # PX8 # PX9 # PX10 # PX11 # PX12 # PX13 # PX14 # PX15 # reserved16 # ÐW V # VALUE32 # üW _ADI_PORT_CFG2_DIR_CLR_t «W # ADI_PORT_CFG2_DIR_CLR_t ÐW AY PX0 # PX1 # PX2 # PX3 # PX4 # PX5 # PX6 # PX7 # PX8 # PX9 # PX10 # PX11 # PX12 # PX13 # PX14 # PX15 # reserved16 # fY X # VALUE32 # Y _ADI_PORT_CFG2_INEN_t AY # ADI_PORT_CFG2_INEN_t fY ÑZ PX0 # PX1 # PX2 # PX3 # PX4 # PX5 # PX6 # PX7 # PX8 # PX9 # PX10 # PX11 # PX12 # PX13 # PX14 # PX15 # reserved16 # öZ ªY # VALUE32 # #[ _ADI_PORT_CFG2_INEN_SET_t ÑZ # ADI_PORT_CFG2_INEN_SET_t öZ i\ PX0 # PX1 # PX2 # PX3 # PX4 # PX5 # PX6 # PX7 # PX8 # PX9 # PX10 # PX11 # PX12 # PX13 # PX14 # PX15 # reserved16 # \ B[ # VALUE32 # »\ _ADI_PORT_CFG2_INEN_CLR_t i\ # ADI_PORT_CFG2_INEN_CLR_t \ ú] MUX0 # MUX1 # MUX2 # MUX3 # MUX4 # MUX5 # MUX6 # MUX7 # MUX8 # MUX9 # MUX10 #
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MUX11 # MUX12 # MUX13 # MUX14 # MUX15 # ^ Ú\ # VALUE32 # G^ _ADI_PORT_CFG2_MUX_t ú] # ADI_PORT_CFG2_MUX_t ^ _ PX0 # PX1 # PX2 # PX3 # PX4 # PX5 # PX6 # PX7 # PX8 # PX9 # PX10 # PX11 # PX12 # PX13 # PX14 # PX15 # reserved16 # _ a^ # VALUE32 # Ú_ _ADI_PORT_CFG2_DATA_TGL_t _ # ADI_PORT_CFG2_DATA_TGL_t _ a PX0 # PX1 # PX2 # PX3 # PX4 # PX5 # PX6 # PX7 # PX8 # PX9 # PX10 # PX11 # PX12 # PX13 # PX14 # PX15 # reserved16 # Ea ù_ # VALUE32 # ma _ADI_PORT_CFG2_POL_t a # ADI_PORT_CFG2_POL_t Ea ®b PX0 # PX1 # PX2 # PX3 # PX4 # PX5 # PX6 # PX7 # PX8 # PX9 # PX10 # PX11 # PX12 # PX13 # PX14 # PX15 # reserved16 # Ób a # VALUE32 # ÿb _ADI_PORT_CFG2_POL_SET_t ®b # ADI_PORT_CFG2_POL_SET_t Ób Dd PX0 # PX1 # PX2 # PX3 # PX4 # PX5 # PX6 # PX7 # PX8 # PX9 # PX10 # PX11 # PX12 # PX13 # PX14 # PX15 # reserved16 # id c # VALUE32 # d _ADI_PORT_CFG2_POL_CLR_t Dd # ADI_PORT_CFG2_POL_CLR_t id He FER # MUX # DATA # DIR # INEN # POLAR # reserved6 # LOCK # me ³d # VALUE32 # e _ADI_PORT_CFG2_LOCK_t He # ADI_PORT_CFG2_LOCK_t me Øf PX0 # PX1 # PX2 # PX3 # PX4 # PX5 # PX6 # PX7 # PX8 # PX9 # PX10 # PX11 # PX12 # PX13 # PX14 # PX15 # reserved16 # ýf ±e # VALUE32 # *g _ADI_PORT_CFG2_TRIG_TGL_t Øf # ADI_PORT_CFG2_TRIG_TGL_t ýf h reserved0 # CNT0UDSEL # CNT0DGSEL # reserved8 # PUTMS # reserved17 # FAULT_DIS # reserved19 # &h Ig # VALUE32 # Kh _ADI_PADS_PCFG0_t h # ADI_PADS_PCFG0_t &h i PA0 # PA1 # PA2 # PA3 # PA4 # PA5 # PA6 # PA7 # reserved24 # (i bh # VALUE32 # Qi _ADI_PADS_PORTA0_DS_t i # ADI_PADS_PORTA0_DS_t (i j PA8 # PA9 # PA10 # PA11 # PA12 # PA13 # PA14 # PA15 # reserved24 # 8j li # VALUE32 # aj _ADI_PADS_PORTA1_DS_t j # ADI_PADS_PORTA1_DS_t 8j k PB0 # PB1 # PB2 # PB3 # PB4 # PB5 # PB6 # PB7 # reserved24 # Bk |j # VALUE32 # kk _ADI_PADS_PORTB0_DS_t k # ADI_PADS_PORTB0_DS_t Bk -l PB8 # PB9 # PB10 # PB11 # PB12 # PB13 # PB14 # PB15 # reserved24 # Rl k # VALUE32 # {l _ADI_PADS_PORTB1_DS_t -l # ADI_PADS_PORTB1_DS_t Rl 7m PC0 # PC1 # PC2 # PC3 # PC4 # PC5 # PC6 # PC7 # reserved24 # \m l # VALUE32 #
m _ADI_PADS_PORTC0_DS_t 7m # ADI_PADS_PORTC0_DS_t \m /n CKOUT # RESOUTB # FAULTB # LP1CK # LP0CK # OSPI # reserved18 # Tn m # VALUE32 # n _ADI_PADS_NONPORTS_DS_t /n # ADI_PADS_NONPORTS_DS_t Tn ho DAI1 # DAI2 # DAI3 # DAI4 # DAI5 # DAI6 # DAI7 # DAI8 # DAI9 # DAI10 # reserved30 # o n # VALUE32 # ¶o _ADI_PADS_DAI0_0_DS_t ho # ADI_PADS_DAI0_0_DS_t o Pp DAI11 # DAI12 # reserved6 # DAI19 # DAI20 # reserved30 # up Ño # VALUE32 # p _ADI_PADS_DAI0_1_DS_t Pp # ADI_PADS_DAI0_1_DS_t up
q DAI1 # DAI2 # DAI3 # DAI4 # DAI5 # DAI6 # DAI7 # DAI8 # DAI9 # DAI10 # reserved30 # ªq ¹p # VALUE32 # Óq _ADI_PADS_DAI1_0_DS_t
q # ADI_PADS_DAI1_0_DS_t ªq mr DAI11 # DAI12 # reserved6 # DAI19 # DAI20 # reserved30 # r îq # VALUE32 # »r _ADI_PADS_DAI1_1_DS_t mr # ADI_PADS_DAI1_1_DS_t r s VALUE # reserved20 # .s Ör # VALUE32 # Us _ADI_PADS_DAI0_IE_t s # ADI_PADS_DAI0_IE_t .s ¡s VALUE # reserved20 # Æs ns # VALUE32 # ís _ADI_PADS_DAI1_IE_t ¡s # ADI_PADS_DAI1_IE_t Æs 7t PUE # reserved16 # \t t # VALUE32 # t _ADI_PADS_PORT_PUE_t 7t # ADI_PADS_PORT_PUE_t \t Ït PUE # reserved20 # ôt t # VALUE32 # u _ADI_PADS_DAI_PUE_t Ït # ADI_PADS_DAI_PUE_t ôt eu PUD # reserved16 # u 4u # VALUE32 # ²u _ADI_PADS_PORT_PDE_t eu # ADI_PADS_PORT_PDE_t u ýu PUD # reserved20 # "v Ìu # VALUE32 # Iv _ADI_PADS_DAI_PDE_t ýu # ADI_PADS_DAI_PDE_t "v ¢x PIQ0 # PIQ1 # PIQ2 # PIQ3 # PIQ4 # PIQ5 # PIQ6 # PIQ7 # PIQ8 # PIQ9 # PIQ10 # PIQ11 # PIQ12 # PIQ13 # PIQ14 # PIQ15 # PIQ16 # PIQ17 # PIQ18 # PIQ19 # PIQ20 # PIQ21 #
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PIQ22 # PIQ23 # PIQ24 # PIQ25 # PIQ26 # PIQ27 # PIQ28 # PIQ29 # PIQ30 # PIQ31 # Çx bv # VALUE32 # îx _ADI_PINT_MSK_SET_t ¢x # ADI_PINT_MSK_SET_t Çx G{ PIQ0 # PIQ1 # PIQ2 # PIQ3 # PIQ4 # PIQ5 # PIQ6 # PIQ7 # PIQ8 # PIQ9 # PIQ10 # PIQ11 # PIQ12 # PIQ13 # PIQ14 # PIQ15 # PIQ16 # PIQ17 # PIQ18 # PIQ19 # PIQ20 # PIQ21 #
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PIQ22 # PIQ23 # PIQ24 # PIQ25 # PIQ26 # PIQ27 # PIQ28 # PIQ29 # PIQ30 # PIQ31 # l{ y # VALUE32 # { _ADI_PINT_MSK_CLR_t G{ # ADI_PINT_MSK_CLR_t l{ ì} PIQ0 # PIQ1 # PIQ2 # PIQ3 # PIQ4 # PIQ5 # PIQ6 # PIQ7 # PIQ8 # PIQ9 # PIQ10 # PIQ11 # PIQ12 # PIQ13 # PIQ14 # PIQ15 # PIQ16 # PIQ17 # PIQ18 # PIQ19 # PIQ20 # PIQ21 #
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PIQ22 # PIQ23 # PIQ24 # PIQ25 # PIQ26 # PIQ27 # PIQ28 # PIQ29 # PIQ30 # PIQ31 # ~ ¬{ # VALUE32 # 4~ _ADI_PINT_REQ_t ì} # ADI_PINT_REQ_t ~ ç~ B0MAP # B0MSB0 # B1MAP # B1MSB0 # B2MAP # B2MSB0 # B3MAP # B3MSB0 # I~ # VALUE32 # 2 _ADI_PINT_ASSIGN_t ç~ # ADI_PINT_ASSIGN_t PIQ0 # PIQ1 # PIQ2 # PIQ3 # PIQ4 # PIQ5 # PIQ6 # PIQ7 # PIQ8 # PIQ9 # PIQ10 # PIQ11 # PIQ12 # PIQ13 # PIQ14 # PIQ15 # PIQ16 # PIQ17 # PIQ18 # PIQ19 # PIQ20 # PIQ21 #
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PIQ22 # PIQ23 # PIQ24 # PIQ25 # PIQ26 # PIQ27 # PIQ28 # PIQ29 # PIQ30 # PIQ31 # ¯ J # VALUE32 # × _ADI_PINT_EDGE_SET_t # ADI_PINT_EDGE_SET_t ¯ 1 PIQ0 # PIQ1 # PIQ2 # PIQ3 # PIQ4 # PIQ5 # PIQ6 # PIQ7 # PIQ8 # PIQ9 # PIQ10 # PIQ11 # PIQ12 # PIQ13 # PIQ14 # PIQ15 # PIQ16 # PIQ17 # PIQ18 # PIQ19 # PIQ20 # PIQ21 #
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PIQ22 # PIQ23 # PIQ24 # PIQ25 # PIQ26 # PIQ27 # PIQ28 # PIQ29 # PIQ30 # PIQ31 # V ñ # VALUE32 # ~ _ADI_PINT_EDGE_CLR_t 1 # ADI_PINT_EDGE_CLR_t V Ø PIQ0 # PIQ1 # PIQ2 # PIQ3 # PIQ4 # PIQ5 # PIQ6 # PIQ7 # PIQ8 # PIQ9 # PIQ10 # PIQ11 # PIQ12 # PIQ13 # PIQ14 # PIQ15 # PIQ16 # PIQ17 # PIQ18 # PIQ19 # PIQ20 # PIQ21 #
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PIQ22 # PIQ23 # PIQ24 # PIQ25 # PIQ26 # PIQ27 # PIQ28 # PIQ29 # PIQ30 # PIQ31 # ý # VALUE32 # $ _ADI_PINT_INV_SET_t Ø # ADI_PINT_INV_SET_t ý } PIQ0 # PIQ1 # PIQ2 # PIQ3 # PIQ4 # PIQ5 # PIQ6 # PIQ7 # PIQ8 # PIQ9 # PIQ10 # PIQ11 # PIQ12 # PIQ13 # PIQ14 # PIQ15 # PIQ16 # PIQ17 # PIQ18 # PIQ19 # PIQ20 # PIQ21 #
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PIQ22 # PIQ23 # PIQ24 # PIQ25 # PIQ26 # PIQ27 # PIQ28 # PIQ29 # PIQ30 # PIQ31 # ¢ = # VALUE32 # É _ADI_PINT_INV_CLR_t } # ADI_PINT_INV_CLR_t ¢ " PIQ0 # PIQ1 # PIQ2 # PIQ3 # PIQ4 # PIQ5 # PIQ6 # PIQ7 # PIQ8 # PIQ9 # PIQ10 # PIQ11 # PIQ12 # PIQ13 # PIQ14 # PIQ15 # PIQ16 # PIQ17 # PIQ18 # PIQ19 # PIQ20 # PIQ21 #
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PIQ22 # PIQ23 # PIQ24 # PIQ25 # PIQ26 # PIQ27 # PIQ28 # PIQ29 # PIQ30 # PIQ31 # G â # VALUE32 # o _ADI_PINT_PINSTATE_t " # ADI_PINT_PINSTATE_t G É PIQ0 # PIQ1 # PIQ2 # PIQ3 # PIQ4 # PIQ5 # PIQ6 # PIQ7 # PIQ8 # PIQ9 # PIQ10 # PIQ11 # PIQ12 # PIQ13 # PIQ14 # PIQ15 # PIQ16 # PIQ17 # PIQ18 # PIQ19 # PIQ20 # PIQ21 #
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PIQ22 # PIQ23 # PIQ24 # PIQ25 # PIQ26 # PIQ27 # PIQ28 # PIQ29 # PIQ30 # PIQ31 # î # VALUE32 # _ADI_PINT_LATCH_t É # ADI_PINT_LATCH_t î F WDOG_CTL_WDTEXP ADI_WDOG_CTL_WDRO * z WDOG_CTL_WINEVT ADI_WDOG_CTL_WDWE ^ reserved0 # WDEN # reserved12 # WDRO # WDWE # reserved17 # 8 # VALUE32 # [ _ADI_WDOG_CTL_t # ADI_WDOG_CTL_t 8 VALUE # ± p # VALUE32 # Ô _ADI_WDOG_CNT_t # ADI_WDOG_CNT_t ± VALUE # * é # VALUE32 # N _ADI_WDOG_STAT_t # ADI_WDOG_STAT_t * VALUE # ¥ d # VALUE32 # È _ADI_WDOG_WIN_t # ADI_WDOG_WIN_t ¥ CNT_CFG_CNTDIS CNT_CFG_CNTEN ADI_CNT_CFG_EN Ý H CNT_CFG_DEBDIS CNT_CFG_DEBEN ADI_CNT_CFG_DEBEN CNT_CFG_CDGINV_AHI CNT_CFG_CDGINV_ALO ADI_CNT_CFG_CDGINV ` á CNT_CFG_CUDINV_AHI CNT_CFG_CUDINV_ALO ADI_CNT_CFG_CUDINV . CNT_CFG_CZMINV_AHI CNT_CFG_CZMINV_ALO ADI_CNT_CFG_CZMINV ú Î CNT_CFG_CNTMODE_QUADENC CNT_CFG_CNTMODE_BINENC CNT_CFG_CNTMODE_UDCNT CNT_CFG_CNTMODE_DIRCNT CNT_CFG_CNTMODE_DIRTMR ADI_CNT_CFG_CNTMODE G CNT_CFG_ZMZC_DIS CNT_CFG_ZMZC_EN ADI_CNT_CFG_ZMZC è CNT_CFG_BNDMODE_BNDCOMP CNT_CFG_BNDMODE_BINENC CNT_CFG_BNDMODE_BNDCAPT CNT_CFG_BNDMODE_BNDAEXT ADI_CNT_CFG_BNDMODE . è CNT_CFG_NO_INPDIS CNT_CFG_INPDIS ADI_CNT_CFG_INPDIS ¹ EN # DEBEN # reserved2 # CDGINV # CUDINV # CZMINV # reserved7 # CNTMODE # ZMZC # BNDMODE # reserved14 # INPDIS # reserved16 # 0 # VALUE32 # R _ADI_CNT_CFG_t # ADI_CNT_CFG_t 0 CNT_IMSK_IC_MSK CNT_IMSK_IC_UMSK ADI_CNT_IMSK_IC f Ú CNT_IMSK_UC_MSK CNT_IMSK_UC_UMSK ADI_CNT_IMSK_UC « CNT_IMSK_DC_MSK CNT_IMSK_DC_UMSK ADI_CNT_IMSK_DC ð h CNT_IMSK_MINC_MSK CNT_IMSK_MINC_UMSK ADI_CNT_IMSK_MINC 5 ³ CNT_IMSK_MAXC_MSK CNT_IMSK_MAXC_UMSK ADI_CNT_IMSK_MAXC CNT_IMSK_COV31_MSK CNT_IMSK_COV31_UMSK ADI_CNT_IMSK_COV31 Ë N CNT_IMSK_COV15_MSK CNT_IMSK_COV15_UMSK ADI_CNT_IMSK_COV15 CNT_IMSK_CZERO_MSK CNT_IMSK_CZERO_UMSK ADI_CNT_IMSK_CZERO g æ CNT_IMSK_CZM_MSK CNT_IMSK_CZM_UMSK ADI_CNT_IMSK_CZM µ 0 CNT_IMSK_CZME_MSK CNT_IMSK_CZME_UMSK ADI_CNT_IMSK_CZME ý { CNT_IMSK_CZMZ_MSK CNT_IMSK_CZMZ_UMSK ADI_CNT_IMSK_CZMZ H k IC # UC # DC # MINC # MAXC # COV31 # COV15 # CZERO # CZM # CZME # CZMZ # reserved11 # # VALUE32 # ³ _ADI_CNT_IMSK_t k # ADI_CNT_IMSK_t IC # UC # DC # MINC # MAXC # COV31 # COV15 # CZERO # CZM # CZME # CZMZ # reserved11 # Å È # VALUE32 # è _ADI_CNT_STAT_t # ADI_CNT_STAT_t Å ? W1LCNTZERO # reserved1 # W1LCNTMIN # W1LCNTMAX # W1LMINZERO # W1LMINCNT # reserved6 # W1LMINMAX # W1LMAXZERO # W1LMAXCNT # W1LMAXMIN # reserved11 # W1ZMONCE # reserved13 # d ý # VALUE32 # _ADI_CNT_CMD_t ? # ADI_CNT_CMD_t d Ð DPRESCALE # reserved5 # õ # VALUE32 # _ADI_CNT_DEBNCE_t Ð # ADI_CNT_DEBNCE_t õ M VALUE # r 1 # VALUE32 # _ADI_CNT_CNTR_t M # ADI_CNT_CNTR_t r Æ VALUE # ë ª # VALUE32 # _ADI_CNT_MAX_t Æ # ADI_CNT_MAX_t ë = VALUE # b ! # VALUE32 # _ADI_CNT_MIN_t = # ADI_CNT_MIN_t b Ü READMODE # PD # reserved2 # # VALUE32 # $ _ADI_OTPC_CTL_t Ü # ADI_OTPC_CTL_t reserved0 # ADDRERR # reserved15 # © 9 # VALUE32 # Í _ADI_OTPC_STAT_t # ADI_OTPC_STAT_t © !¡ LT # HT # reserved8 # F¡ ã # VALUE32 # l¡ _ADI_OTPC_TIMING_t !¡ # ADI_OTPC_TIMING_t F¡ ¤¡ reserved0 # É¡ ¡ # VALUE32 # ñ¡ _ADI_OTPC_BOOT_SR3_t ¤¡ # ADI_OTPC_BOOT_SR3_t É¡ +¢ reserved0 # P¢ ¢ # VALUE32 # x¢ _ADI_OTPC_BOOT_RR0_t +¢ # ADI_OTPC_BOOT_RR0_t P¢ ²¢ reserved0 # ×¢ ¢ # VALUE32 # ÿ¢ _ADI_OTPC_BOOT_RR1_t ²¢ # ADI_OTPC_BOOT_RR1_t ×¢ 9£ reserved0 # ^£ £ # VALUE32 # £ _ADI_OTPC_BOOT_RR2_t 9£ # ADI_OTPC_BOOT_RR2_t ^£ Ú£ OTPC_SECU_STATE_OPEN OTPC_SECU_STATE_LOCKED ADI_OTPC_SECU_STATE_PARTLOCK £ 2¤ PARTLOCK # reserved2 # W¤ ý£ # VALUE32 # ¤ _ADI_OTPC_SECU_STATE_t 2¤ # ADI_OTPC_SECU_STATE_t W¤ Ϥ DATA # reserved16 # ô¤ ¤ # VALUE32 # ¥ _ADI_OTPC_DAP_DR_t Ϥ # ADI_OTPC_DAP_DR_t ô¤ M¥ ADDR # r¥ 2¥ # VALUE32 # ¥ _ADI_OTPC_DAP_OAR_t M¥ # ADI_OTPC_DAP_OAR_t r¥ ä¥ VALUE # reserved8 # ¦ ²¥ # VALUE32 # 1¦ _ADI_OTPC_PMC_INST_t ä¥ # ADI_OTPC_PMC_INST_t ¦ ~¦ FSMCTL # reserved4 # £¦ K¦ # VALUE32 # ʦ _ADI_OTPC_PMC_CTL_t ~¦ # ADI_OTPC_PMC_CTL_t £¦ § VALUE # reserved8 # :§ 㦠# VALUE32 # b§ _ADI_OTPC_PMC_STAT_t § # ADI_OTPC_PMC_STAT_t :§ ¨ IREF # ORED # LDCPEN # VRRL # VRRS # VRRE # IPSOSCEN # reserved16 # ?¨ |§ # VALUE32 # h¨ _ADI_OTPC_PMC_MODE0_t ¨ # ADI_OTPC_PMC_MODE0_t ?¨ !© IREF # ORED # LDCPEN # VRRL # VRRS # VRRE # IPSOSCEN # reserved16 # F© ¨ # VALUE32 # o© _ADI_OTPC_PMC_MODE1_t !© # ADI_OTPC_PMC_MODE1_t F© (ª IREF # ORED # LDCPEN # VRRL # VRRS # VRRE # IPSOSCEN # reserved16 # Mª © # VALUE32 # vª _ADI_OTPC_PMC_MODE2_t (ª # ADI_OTPC_PMC_MODE2_t Mª /« IREF # ORED # LDCPEN # VRRL # VRRS # VRRE # IPSOSCEN # reserved16 # T« ª # VALUE32 # }« _ADI_OTPC_PMC_MODE3_t /« # ADI_OTPC_PMC_MODE3_t T« Þ« SHRTRD # LONGRD # reserved8 # ¬ « # VALUE32 # /¬ _ADI_OTPC_PMC_PGM_TMG0_t Þ« # ADI_OTPC_PMC_PGM_TMG0_t ¬ õ¬ BRPCHK # PREPGM # POSTPGM # POSTSOAK # RPWCOMP # RDREC # PGMREC # reserved8 # M¬ # VALUE32 # F _ADI_OTPC_PMC_PGM_TMG1_t õ¬ # ADI_OTPC_PMC_PGM_TMG1_t ¹ PRG # SOAK # MODESET # reserved8 # Þ d # VALUE32 #
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® _ADI_OTPC_PMC_PGM_TMG2_t ¹ # ADI_OTPC_PMC_PGM_TMG2_t Þ Z® VALUE # reserved8 # ® (® # VALUE32 # «® _ADI_OTPC_PMC_DAP_ADDR_t Z® # ADI_OTPC_PMC_DAP_ADDR_t ® F¯ ENTRY # EXIT # LIMIT # reserved14 # UWE # reserved16 # k¯ É® # VALUE32 # ¯ _ADI_OTPC_PMC_PGM_CQ_t F¯ # ADI_OTPC_PMC_PGM_CQ_t k¯ W° MR11 # MR12 # MR13 # MR14 # MR15 # MR4 # MR5 # MRR4 # reserved8 # |° ±¯ # VALUE32 # ¤° _ADI_OTPC_DAP_RFMR_t W° # ADI_OTPC_DAP_RFMR_t |° j± MRR8 # MRR9 # MRR10 # MRR11 # MRR12 # MRR13 # MRR1 # CPEN # reserved8 # ± ¾° # VALUE32 # ·± _ADI_OTPC_DAP_VRMR_t j± # ADI_OTPC_DAP_VRMR_t ± ]² MRR16 # MRR17 # MRR18 # MRR19 # MRR20 # MRR21 # reserved6 # ² ѱ # VALUE32 # ª² _ADI_OTPC_DAP_OVLR_t ]² # ADI_OTPC_DAP_OVLR_t ² s³ MRR24 # MRR25 # MRR0 # MRR27 # MRR28 # MRR29 # MRR30 # MRR15 # reserved8 # ³ IJ # VALUE32 # À³ _ADI_OTPC_DAP_IPCR_t s³ # ADI_OTPC_DAP_IPCR_t ³ :´ MR0 # MR1 # MR2 # MR3 # reserved4 # _´ Ú³ # VALUE32 # ´ _ADI_OTPC_DAP_ORCR_t :´ # ADI_OTPC_DAP_ORCR_t _´ µ MR6 # MR7 # MR8 # MR9 # MR10 # reserved5 # 7µ ¡´ # VALUE32 # _µ _ADI_OTPC_DAP_ODCR_t µ # ADI_OTPC_DAP_ODCR_t 7µ (¶ MRR26 # MRR12 # MRR13 # MRR14 # MRR7 # MRR22 # MRR23 # MRR31 # reserved8 # M¶ yµ # VALUE32 # v¶ _ADI_OTPC_DAP_IPCR2_t (¶ # ADI_OTPC_DAP_IPCR2_t M¶ ü¶ reserved0 # PD # reserved2 # SEL # reserved4 # !· ¶ # VALUE32 # I· _ADI_OTPC_DAP_OCER_t ü¶ # ADI_OTPC_DAP_OCER_t !· ¸ ECCDIS # ECCGEN # ECCTST # BRPDIS # BRPGEN # PASS # MUXQ0 # MUXQ1 # reserved8 # <¸ c· # VALUE32 # d¸ _ADI_OTPC_DAP_DPCR_t ¸ # ADI_OTPC_DAP_DPCR_t <¸ ¯¸ MBPC # reserved3 # Ô¸ ~¸ # VALUE32 # ý¸ _ADI_OTPC_DAP_DPCR2_t ¯¸ # ADI_OTPC_DAP_DPCR2_t Ô¸ 8¹ HADC_CTL_ADC_NRESET ADI_HADC_CTL_NRST ¹ l¹ HADC_CTL_ADC_PD ADI_HADC_CTL_PD P¹ ¹ HADC_CTL_STARTCNV ADI_HADC_CTL_STARTCNV ¹ ô¹ HADC_CTL_ADC_CONT_FIXED HADC_CTL_ADC_CONT ADI_HADC_CTL_CONT ¼¹ Áº NRST # PD # STARTCNV # FDIV # CONT # FIXEDCNV # DOUTOREOCB # ENLS # reserved14 # æº º # VALUE32 # » _ADI_HADC_CTL_t Áº # ADI_HADC_CTL_t æº P» VALUE # reserved8 # u» » # VALUE32 # » _ADI_HADC_CHAN_MSK_t P» # ADI_HADC_CHAN_MSK_t u» ¼ CHAN # reserved4 # SEQ # RDY # reserved18 # D¼ ·» # VALUE32 # h¼ _ADI_HADC_IMSK_t ¼ # ADI_HADC_IMSK_t D¼ ½ RDY # reserved1 # RDYW1C # SEQOVRW1C # INTRW1C # TMUHADC_BUSY # reserved21 # @½ ~¼ # VALUE32 # d½ _ADI_HADC_STAT_t ½ # ADI_HADC_STAT_t @½ ½ VALUE # reserved12 # Ò½ z½ # VALUE32 # ö½ _ADI_HADC_DATA_t ½ # ADI_HADC_DATA_t Ò½ §¾ TMPU # reserved1 # TMEN # SCLKDIV # reserved12 # TMEN_FORCE # reserved14 # ̾ ¾ # VALUE32 # î¾ _ADI_TMU_CTL_t §¾ # ADI_TMU_CTL_t ̾ 5¿ VALUE # reserved16 # Z¿ ¿ # VALUE32 # }¿ _ADI_TMU_TEMP_t 5¿ # ADI_TMU_TEMP_t Z¿ Á¿ EN # reserved1 # æ¿ ¿ # VALUE32 # À _ADI_TMU_AVG_t Á¿ # ADI_TMU_AVG_t æ¿ NÀ VALUE # reserved9 # sÀ À # VALUE32 # À _ADI_TMU_FLT_LIM_HI_t NÀ # ADI_TMU_FLT_LIM_HI_t sÀ éÀ VALUE # reserved9 # Á ·À # VALUE32 # 8Á _ADI_TMU_ALRT_LIM_HI_t éÀ # ADI_TMU_ALRT_LIM_HI_t Á Á VALUE # reserved9 # «Á TÁ # VALUE32 # ÔÁ _ADI_TMU_FLT_LIM_LO_t Á # ADI_TMU_FLT_LIM_LO_t «Á ! VALUE # reserved9 # F ïÁ # VALUE32 # p _ADI_TMU_ALRT_LIM_LO_t ! # ADI_TMU_ALRT_LIM_LO_t F à reserved0 # FLTHI # ALRTHI # FLTLO # ALRTLO # reserved8 # 1à  # VALUE32 # Tà _ADI_TMU_STAT_t à # ADI_TMU_STAT_t 1à à VALUE #
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reserved10 # Áà ià # VALUE32 # äà _ADI_TMU_GAIN_t à # ADI_TMU_GAIN_t Áà cÄ FLTHI # ALRTHI # FLTLO # ALRTLO # reserved4 # Ä ùà # VALUE32 # «Ä _ADI_TMU_IMSK_t cÄ # ADI_TMU_IMSK_t Ä óÄ VALUE # reserved15 # Å ÀÄ # VALUE32 # =Å _ADI_TMU_OFFSET_t óÄ # ADI_TMU_OFFSET_t Å Å reserved0 # PERIOD # reserved29 # ÃÅ TÅ # VALUE32 # ëÅ _ADI_TMU_CNV_BLANK_t Å # ADI_TMU_CNV_BLANK_t ÃÅ 7Æ VALUE # reserved6 # \Æ Æ # VALUE32 # Æ _ADI_TMU_REFR_CNTR_t 7Æ # ADI_TMU_REFR_CNTR_t \Æ sÇ TMR00 # TMR01 # TMR02 # TMR03 # TMR04 # TMR05 # TMR06 # TMR07 # TMR08 # TMR09 # reserved10 # Ç Æ # VALUE32 # ¼Ç _ADI_TIMER_RUN_t sÇ # ADI_TIMER_RUN_t Ç §È TMR00 # TMR01 # TMR02 # TMR03 # TMR04 # TMR05 # TMR06 # TMR07 # TMR08 # TMR09 # reserved10 # ÌÈ ÒÇ # VALUE32 # ôÈ _ADI_TIMER_RUN_SET_t §È # ADI_TIMER_RUN_SET_t ÌÈ ãÉ TMR00 # TMR01 # TMR02 # TMR03 # TMR04 # TMR05 # TMR06 # TMR07 # TMR08 # TMR09 # reserved10 # Ê É # VALUE32 # 0Ê _ADI_TIMER_RUN_CLR_t ãÉ # ADI_TIMER_RUN_CLR_t Ê Ë TMR00 # TMR01 # TMR02 # TMR03 # TMR04 # TMR05 # TMR06 # TMR07 # TMR08 # TMR09 # reserved10 # DË JÊ # VALUE32 # mË _ADI_TIMER_STOP_CFG_t Ë # ADI_TIMER_STOP_CFG_t DË ]Ì TMR00 # TMR01 # TMR02 # TMR03 # TMR04 # TMR05 # TMR06 # TMR07 # TMR08 # TMR09 # reserved10 # Ì Ë # VALUE32 # ¯Ì _ADI_TIMER_STOP_CFG_SET_t ]Ì # ADI_TIMER_STOP_CFG_SET_t Ì £Í TMR00 # TMR01 # TMR02 # TMR03 # TMR04 # TMR05 # TMR06 # TMR07 # TMR08 # TMR09 # reserved10 # ÈÍ ÎÌ # VALUE32 # õÍ _ADI_TIMER_STOP_CFG_CLR_t £Í # ADI_TIMER_STOP_CFG_CLR_t ÈÍ éÎ TMR00 # TMR01 # TMR02 # TMR03 # TMR04 # TMR05 # TMR06 # TMR07 # TMR08 # TMR09 # reserved10 # Ï Î # VALUE32 # 8Ï _ADI_TIMER_DATA_IMSK_t éÎ # ADI_TIMER_DATA_IMSK_t Ï )Ð TMR00 # TMR01 # TMR02 # TMR03 # TMR04 # TMR05 # TMR06 # TMR07 # TMR08 # TMR09 # reserved10 # NÐ TÏ # VALUE32 # xÐ _ADI_TIMER_STAT_IMSK_t )Ð # ADI_TIMER_STAT_IMSK_t NÐ iÑ TMR00 # TMR01 # TMR02 # TMR03 # TMR04 # TMR05 # TMR06 # TMR07 # TMR08 # TMR09 # reserved10 # Ñ Ð # VALUE32 # ¶Ñ _ADI_TIMER_TRG_MSK_t iÑ # ADI_TIMER_TRG_MSK_t Ñ ¥Ò TMR00 # TMR01 # TMR02 # TMR03 # TMR04 # TMR05 # TMR06 # TMR07 # TMR08 # TMR09 # reserved10 # ÊÒ ÐÑ # VALUE32 # ñÒ _ADI_TIMER_TRG_IE_t ¥Ò # ADI_TIMER_TRG_IE_t ÊÒ ßÓ TMR00 # TMR01 # TMR02 # TMR03 # TMR04 # TMR05 # TMR06 # TMR07 # TMR08 # TMR09 # reserved10 # Ô
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Ó # VALUE32 # .Ô _ADI_TIMER_DATA_ILAT_t ßÓ # ADI_TIMER_DATA_ILAT_t Ô Õ TMR00 # TMR01 # TMR02 # TMR03 # TMR04 # TMR05 # TMR06 # TMR07 # TMR08 # TMR09 # reserved10 # DÕ JÔ # VALUE32 # nÕ _ADI_TIMER_STAT_ILAT_t Õ # ADI_TIMER_STAT_ILAT_t DÕ úÕ TIMER_ERR_TYPE_NO_ERR0 TIMER_ERR_TYPE_CNTOVF0 TIMER_ERR_TYPE_PERPRG0 TIMER_ERR_TYPE_PULSEPRG0 ADI_TIMER_ERR_TYPE_TERR0 Õ Ö TIMER_ERR_TYPE_NO_ERR1 TIMER_ERR_TYPE_CNTOVF1 TIMER_ERR_TYPE_PERPRG1 TIMER_ERR_TYPE_PULSEPRG1 ADI_TIMER_ERR_TYPE_TERR1 Ö × TIMER_ERR_TYPE_NO_ERR2 TIMER_ERR_TYPE_CNTOVF2 TIMER_ERR_TYPE_PERPRG2 TIMER_ERR_TYPE_PULSEPRG2 ADI_TIMER_ERR_TYPE_TERR2 ¨Ö §× TIMER_ERR_TYPE_NO_ERR3 TIMER_ERR_TYPE_CNTOVF3 TIMER_ERR_TYPE_PERPRG3 TIMER_ERR_TYPE_PULSEPRG3 ADI_TIMER_ERR_TYPE_TERR3 7× 6Ø TIMER_ERR_TYPE_NO_ERR4 TIMER_ERR_TYPE_CNTOVF4 TIMER_ERR_TYPE_PERPRG4 TIMER_ERR_TYPE_PULSEPRG4 ADI_TIMER_ERR_TYPE_TERR4 Æ× ÅØ TIMER_ERR_TYPE_NO_ERR5 TIMER_ERR_TYPE_CNTOVF5 TIMER_ERR_TYPE_PERPRG5 TIMER_ERR_TYPE_PULSEPRG5 ADI_TIMER_ERR_TYPE_TERR5 UØ TÙ TIMER_ERR_TYPE_NO_ERR6 TIMER_ERR_TYPE_CNTOVF6 TIMER_ERR_TYPE_PERPRG6 TIMER_ERR_TYPE_PULSEPRG6 ADI_TIMER_ERR_TYPE_TERR6 äØ ãÙ TIMER_ERR_TYPE_NO_ERR7 TIMER_ERR_TYPE_CNTOVF7 TIMER_ERR_TYPE_PERPRG7 TIMER_ERR_TYPE_PULSEPRG7 ADI_TIMER_ERR_TYPE_TERR7 sÙ rÚ TIMER_ERR_TYPE_NO_ERR8 TIMER_ERR_TYPE_CNTOVF8 TIMER_ERR_TYPE_PERPRG8 TIMER_ERR_TYPE_PULSEPRG8 ADI_TIMER_ERR_TYPE_TERR8 Ú Û TIMER_ERR_TYPE_NO_ERR9 TIMER_ERR_TYPE_CNTOVF9 TIMER_ERR_TYPE_PERPRG9 TIMER_ERR_TYPE_PULSEPRG9 ADI_TIMER_ERR_TYPE_TERR9 Ú õÛ TERR0 # TERR1 # TERR2 # TERR3 # TERR4 # TERR5 # TERR6 # TERR7 # TERR8 # TERR9 # reserved20 # Ü Û # VALUE32 # CÜ _ADI_TIMER_ERR_TYPE_t õÛ # ADI_TIMER_ERR_TYPE_t Ü zÜ VALUE # Ü ^Ü # VALUE32 # ÉÜ _ADI_TIMER_BCAST_PER_t zÜ # ADI_TIMER_BCAST_PER_t Ü Ý VALUE # &Ý åÜ # VALUE32 # PÝ _ADI_TIMER_BCAST_WID_t Ý # ADI_TIMER_BCAST_WID_t &Ý Ý VALUE # Ý lÝ # VALUE32 # ×Ý _ADI_TIMER_BCAST_DLY_t Ý # ADI_TIMER_BCAST_DLY_t Ý ·ß TIMER_TMR_CFG_IDLE_MODE0 TIMER_TMR_CFG_IDLE_MODE1 TIMER_TMR_CFG_IDLE_MODE2 TIMER_TMR_CFG_IDLE_MODE3 TIMER_TMR_CFG_IDLE_MODE4 TIMER_TMR_CFG_IDLE_MODE5 TIMER_TMR_CFG_IDLE_MODE6 TIMER_TMR_CFG_IDLE_MODE7 TIMER_TMR_CFG_WDPER_MODE TIMER_TMR_CFG_WDWID_MODE TIMER_TMR_CFG_WIDCAP0_MODE
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TIMER_TMR_CFG_WIDCAP1_MODE TIMER_TMR_CFG_PWMCONT_MODE TIMER_TMR_CFG_PWMSING_MODE TIMER_TMR_CFG_EXTCLK_MODE TIMER_TMR_CFG_PININT_MODE ADI_TIMER_TMR_CFG_TMODE óÝ Cà TIMER_TMR_CFG_IRQMODE0 TIMER_TMR_CFG_IRQMODE1 TIMER_TMR_CFG_IRQMODE2 TIMER_TMR_CFG_IRQMODE3 ADI_TIMER_TMR_CFG_IRQMODE Õß à TIMER_TMR_CFG_TRIGSTOP TIMER_TMR_CFG_TRIGSTART ADI_TIMER_TMR_CFG_SLAVETRIG cà þà TIMER_TMR_CFG_NEG_EDGE TIMER_TMR_CFG_POS_EDGE ADI_TIMER_TMR_CFG_PULSEHI Âà |á TIMER_TMR_CFG_CLKSEL_SCLK TIMER_TMR_CFG_CLKSEL_ALT0 TIMER_TMR_CFG_CLKSEL_ALT1 ADI_TIMER_TMR_CFG_CLKSEL á Ûá TIMER_TMR_CFG_TINSEL_TMR TIMER_TMR_CFG_TINSEL_AUX ADI_TIMER_TMR_CFG_TINSEL á 9â TIMER_TMR_CFG_PADOUT_EN TIMER_TMR_CFG_PADOUT_DIS ADI_TIMER_TMR_CFG_OUTDIS úá â TIMER_TMR_CFG_BCASTDLY_DIS TIMER_TMR_CFG_BCASTDLY_EN ADI_TIMER_TMR_CFG_BDLYEN Xâ ýâ TIMER_TMR_CFG_BCASTWID_DIS TIMER_TMR_CFG_BCASTWID_EN ADI_TIMER_TMR_CFG_BWIDEN ºâ _ã TIMER_TMR_CFG_BCASTPER_DIS TIMER_TMR_CFG_BCASTPER_EN ADI_TIMER_TMR_CFG_BPEREN ã ºã TIMER_TMR_CFG_EMU_NOCNT TIMER_TMR_CFG_EMU_CNT ADI_TIMER_TMR_CFG_EMURUN ~ã ä TIMER_TMR_CFG_TGLTRIG0 TIMER_TMR_CFG_TGLTRIG1 ADI_TIMER_TMR_CFG_TGLTRIG Ùã Vå TMODE # IRQMODE # SLAVETRIG # PULSEHI # CLKSEL # TINSEL # OUTDIS # BDLYEN # BWIDEN # BPEREN # EMURUN # TGLTRIG # ORDTGLTRIG # reserved18 # {å 5ä # VALUE32 # £å _ADI_TIMER_TMR_CFG_t Vå # ADI_TIMER_TMR_CFG_t {å Ùå VALUE # þå ½å # VALUE32 # &æ _ADI_TIMER_TMR_CNT_t Ùå # ADI_TIMER_TMR_CNT_t þå \æ VALUE # æ @æ # VALUE32 # ©æ _ADI_TIMER_TMR_PER_t \æ # ADI_TIMER_TMR_PER_t æ ßæ VALUE # ç Ãæ # VALUE32 # ,ç _ADI_TIMER_TMR_WID_t ßæ # ADI_TIMER_TMR_WID_t ç bç VALUE # ç Fç # VALUE32 # ¯ç _ADI_TIMER_TMR_DLY_t bç # ADI_TIMER_TMR_DLY_t ç åç VALUE #
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è Éç # VALUE32 # 3è _ADI_DMA_DSCPTR_NXT_t åç # ADI_DMA_DSCPTR_NXT_t
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è jè VALUE # è Nè # VALUE32 # ·è _ADI_DMA_ADDRSTART_t jè # ADI_DMA_ADDRSTART_t è Tê EN # WNR # SYNC # CADDR # PSIZE # reserved7 # MSIZE # reserved11 # FLOW # TWAIT # NDSIZE # reserved19 # INT #
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TRIG # TOVEN # DESCIDCPY # TWOD # reserved27 # PDRF # reserved29 # yê Ñè # VALUE32 # ê _ADI_DMA_CFG_t Tê # ADI_DMA_CFG_t yê Ëê VALUE # ðê ¯ê # VALUE32 # ë _ADI_DMA_XCNT_t Ëê # ADI_DMA_XCNT_t ðê Dë VALUE u # ië (ë # VALUE32 u # ë _ADI_DMA_XMOD_t Dë # ADI_DMA_XMOD_t ië ½ë VALUE # âë ¡ë # VALUE32 # ì _ADI_DMA_YCNT_t ½ë # ADI_DMA_YCNT_t âë 6ì VALUE u # [ì ì # VALUE32 u # ~ì _ADI_DMA_YMOD_t 6ì # ADI_DMA_YMOD_t [ì ¯ì VALUE # Ôì ì # VALUE32 # ýì _ADI_DMA_DSCPTR_CUR_t ¯ì # ADI_DMA_DSCPTR_CUR_t Ôì _í PDPO # reserved1 # DESCPPREV # í í # VALUE32 # í _ADI_DMA_DSCPTR_PRV_t _í # ADI_DMA_DSCPTR_PRV_t í äí VALUE # î Èí # VALUE32 # 0î _ADI_DMA_ADDR_CUR_t äí # ADI_DMA_ADDR_CUR_t î hï IRQDONE # IRQERR # PIRQ # reserved3 # ERRC # reserved7 # RUN # reserved11 # PBWID # MBWID # FIFOFILL # reserved19 # TWAIT # reserved21 # ï Iî # VALUE32 # °ï _ADI_DMA_STAT_t hï # ADI_DMA_STAT_t ï áï VALUE # ð Åï # VALUE32 # -ð _ADI_DMA_XCNT_CUR_t áï # ADI_DMA_XCNT_CUR_t ð bð VALUE # ð Fð # VALUE32 # ®ð _ADI_DMA_YCNT_CUR_t bð # ADI_DMA_YCNT_CUR_t ð úð VALUE # reserved16 # ñ Çð # VALUE32 # Dñ _ADI_DMA_BWLCNT_t úð # ADI_DMA_BWLCNT_t ñ ñ VALUE # reserved16 # ³ñ [ñ # VALUE32 # Üñ _ADI_DMA_BWLCNT_CUR_t ñ # ADI_DMA_BWLCNT_CUR_t ³ñ ò VALUE # 8ò ÷ñ # VALUE32 # ]ò _ADI_DMA_BWMCNT_t ò # ADI_DMA_BWMCNT_t 8ò ò VALUE # µò tò # VALUE32 # Þò _ADI_DMA_BWMCNT_CUR_t ò # ADI_DMA_BWMCNT_CUR_t µò ó OSPI_CTL_DIS OSPI_CTL_EN ADI_OSPI_CTL_EN ùò dó OSPI_CTL_CPOL_0 OSPI_CTL_CPOL_1 ADI_OSPI_CTL_CPOL 6ó ªó OSPI_CTL_CPHA_0 OSPI_CTL_CPHA_1 ADI_OSPI_CTL_CPHA |ó ôó OSPI_CTL_RSTCFG_0 OSPI_CTL_RSTCFG_1 ADI_OSPI_CTL_RSTCFG Âó >ô OSPI_CTL_DACEN_0 OSPI_CTL_DACEN_1 ADI_OSPI_CTL_DACEN ô ô OSPI_CTL_SSELDCODE_0 OSPI_CTL_SSELDCODE_1 ADI_OSPI_CTL_SSELDCODE Wô Üô OSPI_CTL_XIPRD_0 OSPI_CTL_XIPRD_1 ADI_OSPI_CTL_XIPRD ¬ô 'õ OSPI_CTL_XIPIMM_0 OSPI_CTL_XIPIMM_1 ADI_OSPI_CTL_XIPIMM õô ðö EN # CPOL # CPHA # reserved3 # HLD # RST # RSTCFG # DACEN # reserved8 # SSELDCODE # SSEL # WRPROT # reserved15 # AHBADDREN # XIPRD # XIPIMM # BAUD # reserved23 # DTREN # reserved25 # OPCODEEN # IDLE # ÷ Aõ # VALUE32 # 8÷ _ADI_OSPI_CTL_t ðö # ADI_OSPI_CTL_t ÷ »÷ OSPI_DRICTL_INSTRTYP_0 OSPI_DRICTL_INSTRTYP_1 OSPI_DRICTL_INSTRTYP_2 OSPI_DRICTL_INSTRTYP_3 ADI_OSPI_DRICTL_INSTRTYP M÷ Pø OSPI_DRICTL_ADDRTRNSFR_0 OSPI_DRICTL_ADDRTRNSFR_1 OSPI_DRICTL_ADDRTRNSFR_2 OSPI_DRICTL_ADDRTRNSFR_3 ADI_OSPI_DRICTL_ADDRTRNSFR Ú÷ çø OSPI_DRICTL_DATATRNSFR_0 OSPI_DRICTL_DATATRNSFR_1 OSPI_DRICTL_DATATRNSFR_2 OSPI_DRICTL_DATATRNSFR_3 ADI_OSPI_DRICTL_DATATRNSFR qø ú OPCODERD # INSTRTYP # DDREN # reserved11 # ADDRTRNSFR # reserved14 # DATATRNSFR # reserved18 # MODEEN # reserved21 # DMYRD # reserved29 # 9ú ù # VALUE32 # _ú _ADI_OSPI_DRICTL_t ú # ADI_OSPI_DRICTL_t 9ú íú OSPI_DWICTL_ADDRTRNSFR_0 OSPI_DWICTL_ADDRTRNSFR_1 OSPI_DWICTL_ADDRTRNSFR_2 OSPI_DWICTL_ADDRTRNSFR_3 ADI_OSPI_DWICTL_ADDRTRNSFR wú û OSPI_DWICTL_DATATRNSFR_0 OSPI_DWICTL_DATATRNSFR_1 OSPI_DWICTL_DATATRNSFR_2 OSPI_DWICTL_DATATRNSFR_3 ADI_OSPI_DWICTL_DATATRNSFR û rü OPCODEWR # WELDIS # reserved9 # ADDRTRNSFR # reserved14 # DATATRNSFR # reserved18 # DMYWR # reserved29 # ü ¥û # VALUE32 # ½ü _ADI_OSPI_DWICTL_t rü # ADI_OSPI_DWICTL_t ü &ý INIT # LSTTRAN # DACT # DSRT # Ký Õü # VALUE32 # ný _ADI_OSPI_DLY_t &ý # ADI_OSPI_DLY_t Ký ·ý OSPI_RDC_SMPLEDG_0 OSPI_RDC_SMPLEDG_1 ADI_OSPI_RDC_SMPLEDG ý Zþ reserved0 # DLYRD # SMPLEDG # reserved6 #
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DDRDLYRD # reserved20 # þ Òý # VALUE32 # ¢þ _ADI_OSPI_RDC_t Zþ # ADI_OSPI_RDC_t þ ÿ ADDRSZ # PGSZ # BLKSZ # reserved21 # 3ÿ ·þ # VALUE32 # Xÿ _ADI_OSPI_DSCTL_t ÿ # ADI_OSPI_DSCTL_t 3ÿ ÿ OFFSET # ±ÿ oÿ # VALUE32 # Úÿ _ADI_OSPI_REMAPADDR_t ÿ # ADI_OSPI_REMAPADDR_t ±ÿ & MODE # reserved8 # K õÿ # VALUE32 # p _ADI_OSPI_MBCTL_t & # ADI_OSPI_MBCTL_t K ½ OSPI_WCCTL_POLRTY_0 OSPI_WCCTL_POLRTY_1 ADI_OSPI_WCCTL_POLRTY w OPCODE # INDEX # reserved11 # POLRTY # DIS # EXPEN # CNT # REPDLY # Ù # VALUE32 # Á _ADI_OSPI_WCCTL_t w # ADI_OSPI_WCCTL_t ò PEC # Ø # VALUE32 # > _ADI_OSPI_POLLEXP_t ò # ADI_OSPI_POLLEXP_t OSPI_ISTAT_UNDRFLW_0 OSPI_ISTAT_UNDRFLW_1 ADI_OSPI_ISTAT_UNDRFLW W r reserved0 # UNDRFLW # reserved2 # WRPROT # ILLACCES # reserved6 # POLEXP # STIGREQ # reserved15 # ¬ # VALUE32 # ¼ _ADI_OSPI_ISTAT_t r # ADI_OSPI_ISTAT_t ° MODEFAIL_MSK # UNDRFLW_MSK # reserved2 # WRPROT_MSK # ILLACCES_MSK # reserved6 # POLEXP_MSK # STIGREQ_MSK # reserved15 # Õ Ó # VALUE32 # ù _ADI_OSPI_IMSK_t ° # ADI_OSPI_IMSK_t Õ - SUBSECT # R # VALUE32 # | _ADI_OSPI_WRPROT_LWR_t - # ADI_OSPI_WRPROT_LWR_t R ¶ SUBSECT # Û # VALUE32 # _ADI_OSPI_WRPROT_UP_t ¶ # ADI_OSPI_WRPROT_UP_t Û ^ INV # EN # reserved2 # # VALUE32 # _ADI_OSPI_WRPROT_CTL_t ^ # ADI_OSPI_WRPROT_CTL_t w TRIGREQ # BNKREQ # reserved2 # BNKDATA # RDSZ # reserved19 # BNKADDR # reserved29 # É # VALUE32 # Â _ADI_OSPI_FCMCTL_t w # ADI_OSPI_FCMCTL_t < OSPI_FCCTL_ADDRSZ_0 OSPI_FCCTL_ADDRSZ_1 OSPI_FCCTL_ADDRSZ_2 OSPI_FCCTL_ADDRSZ_3 ADI_OSPI_FCCTL_ADDRSZ Ú º OSPI_FCCTL_OPCODE_0 OSPI_FCCTL_OPCODE_1 OSPI_FCCTL_OPCODE_2 OSPI_FCCTL_OPCODE_3 ADI_OSPI_FCCTL_OPCODE X Í EXE # STAT # STIGBNKEN # reserved3 # DMY # WRSZ # WREN # ADDRSZ # MODEEN # ADDREN # RDSZ # RDEN # OPCODE # ò Ö # VALUE32 #
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_ADI_OSPI_FCCTL_t Í # ADI_OSPI_FCCTL_t ò I
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ADDR # n
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.
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# VALUE32 #
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_ADI_OSPI_FCA_t I
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# ADI_OSPI_FCA_t n
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Á
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DATA # æ
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¦
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# VALUE32 # _ADI_OSPI_FCRD_LWR_t Á
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# ADI_OSPI_FCRD_LWR_t æ
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C DATA # h ( # VALUE32 # _ADI_OSPI_FCRD_UP_t C # ADI_OSPI_FCRD_UP_t h à DATA # è ¨ # VALUE32 # _ADI_OSPI_FCWD_LWR_t à # ADI_OSPI_FCWD_LWR_t è E DATA # j * # VALUE32 # _ADI_OSPI_FCWD_UP_t E # ADI_OSPI_FCWD_UP_t j DEVSTAT # STAT # reserved9 # DMY # reserved20 # ; ª # VALUE32 # b _ADI_OSPI_POLSTAT_t # ADI_OSPI_POLSTAT_t ; Ô XSTIGBYT # XPOLBYT # XWRBYT # XRDBYT # ù { # VALUE32 # _ADI_OSPI_OE_LWR_t Ô # ADI_OSPI_OE_LWR_t ù reserved0 # XBYTWEL # FSTBYTWEL # ¦ 7 # VALUE32 # Ë _ADI_OSPI_OE_UP_t # ADI_OSPI_OE_UP_t ¦ 8 CFGID # reserved2 # REVID # PATCH # ] â # VALUE32 # _ADI_OSPI_MODID_t 8 # ADI_OSPI_MODID_t ] ¾ SPI_CTL_DIS SPI_CTL_EN ADI_SPI_CTL_EN þ SPI_CTL_SLAVE SPI_CTL_MASTER ADI_SPI_CTL_MSTR Ó D SPI_CTL_PSSE_DIS SPI_CTL_PSSE_EN ADI_SPI_CTL_PSSE SPI_CTL_ODM_DIS SPI_CTL_ODM_EN ADI_SPI_CTL_ODM [ Ê SPI_CTL_SCKMID SPI_CTL_SCKBEG ADI_SPI_CTL_CPHA SPI_CTL_SCKHI SPI_CTL_SCKLO ADI_SPI_CTL_CPOL á P SPI_CTL_SW_SSEL SPI_CTL_HW_SSEL ADI_SPI_CTL_ASSEL " SPI_CTL_DEASSRT_SSEL SPI_CTL_ASSRT_SSEL ADI_SPI_CTL_SELST h å SPI_CTL_MISO_DIS SPI_CTL_MISO_EN ADI_SPI_CTL_EMISO ¶ : SPI_CTL_SIZE08 SPI_CTL_SIZE16 SPI_CTL_SIZE32 ADI_SPI_CTL_SIZE ý SPI_CTL_MSB_FIRST SPI_CTL_LSB_FIRST ADI_SPI_CTL_LSBF Q É SPI_CTL_FLOW_DIS SPI_CTL_FLOW_EN ADI_SPI_CTL_FCEN SPI_CTL_FLOW_RX SPI_CTL_FLOW_TX ADI_SPI_CTL_FCCH à S SPI_CTL_FLOW_LO SPI_CTL_FLOW_HI ADI_SPI_CTL_FCPL % ¤ SPI_CTL_FIFO0 SPI_CTL_FIFO1 SPI_CTL_FIFO2 ADI_SPI_CTL_FCWM j ê SPI_CTL_FAST_DIS SPI_CTL_FAST_EN ADI_SPI_CTL_FMODE » D SPI_CTL_MIO_DIS SPI_CTL_MIO_DUAL SPI_CTL_MIO_QUAD ADI_SPI_CTL_MIOM SPI_CTL_STMISO SPI_CTL_STMOSI ADI_SPI_CTL_SOSI [ Î SPI_CTL_WEM_UNMSK SPI_CTL_WEM_MSK ADI_SPI_CTL_MMWEM SPI_CTL_MM_DIS SPI_CTL_MM_EN ADI_SPI_CTL_MMSE æ Í EN # MSTR # PSSE # ODM # CPHA # CPOL # ASSEL # SELST # EMISO # SIZE # reserved11 # LSBF # FCEN # FCCH # FCPL # FCWM # FMODE # reserved19 # MIOM #
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SOSI # reserved23 # MMWEM # MMSE # ò ( # VALUE32 # _ADI_SPI_CTL_t Í # ADI_SPI_CTL_t ò W SPI_RXCTL_RX_DIS SPI_RXCTL_RX_EN ADI_SPI_RXCTL_REN ( SPI_RXCTL_RTI_DIS SPI_RXCTL_RTI_EN ADI_SPI_RXCTL_RTI o é SPI_RXCTL_RWC_DIS SPI_RXCTL_RWC_EN ADI_SPI_RXCTL_RWCEN ¸ SPI_RXCTL_RDR_DIS SPI_RXCTL_RDR_NE SPI_RXCTL_RDR_25 SPI_RXCTL_RDR_50 SPI_RXCTL_RDR_75 SPI_RXCTL_RDR_FULL ADI_SPI_RXCTL_RDR Î SPI_RXCTL_DISCARD SPI_RXCTL_OVERWRITE ADI_SPI_RXCTL_RDO ; SPI_RXCTL_RWM_0 SPI_RXCTL_RWM_25 SPI_RXCTL_RWM_50 SPI_RXCTL_RWM_75 ADI_SPI_RXCTL_RRWM æ À SPI_RXCTL_UWM_DIS SPI_RXCTL_UWM_25 SPI_RXCTL_UWM_50 SPI_RXCTL_UWM_75 SPI_RXCTL_UWM_FULL ADI_SPI_RXCTL_RUWM T Ç REN # reserved1 # RTI # RWCEN # RDR # reserved7 # RDO # reserved9 # RRWM # reserved14 # RUWM # reserved19 # ì Ù # VALUE32 # _ADI_SPI_RXCTL_t Ç # ADI_SPI_RXCTL_t ì U SPI_TXCTL_TX_DIS SPI_TXCTL_TX_EN ADI_SPI_TXCTL_TEN & SPI_TXCTL_TTI_DIS SPI_TXCTL_TTI_EN ADI_SPI_TXCTL_TTI m ç SPI_TXCTL_TWC_DIS SPI_TXCTL_TWC_EN ADI_SPI_TXCTL_TWCEN ¶ SPI_TXCTL_TDR_DIS SPI_TXCTL_TDR_NF SPI_TXCTL_TDR_25 SPI_TXCTL_TDR_50 SPI_TXCTL_TDR_75 SPI_TXCTL_TDR_EMPTY ADI_SPI_TXCTL_TDR Ç SPI_TXCTL_LASTWD SPI_TXCTL_ZERO ADI_SPI_TXCTL_TDU 7 SPI_TXCTL_RWM_FULL SPI_TXCTL_RWM_25 SPI_TXCTL_RWM_50 SPI_TXCTL_RWM_75 ADI_SPI_TXCTL_TRWM ß ½ SPI_TXCTL_UWM_DIS SPI_TXCTL_UWM_25 SPI_TXCTL_UWM_50 SPI_TXCTL_UWM_75 SPI_TXCTL_UWM_EMPTY ADI_SPI_TXCTL_TUWM P Ä TEN # reserved1 # TTI # TWCEN # TDR # reserved7 # TDU # reserved9 # TRWM # reserved14 # TUWM # reserved19 # é Ö # VALUE32 # _ADI_SPI_TXCTL_t Ä # ADI_SPI_TXCTL_t é U BAUD # reserved16 # z # # VALUE32 # _ADI_SPI_CLK_t U # ADI_SPI_CLK_t z STOP # LEADX # LAGX # reserved10 # * ° # VALUE32 # L _ADI_SPI_DLY_t # ADI_SPI_DLY_t * SPI_SLVSEL_SSEL1_DIS SPI_SLVSEL_SSEL1_EN ADI_SPI_SLVSEL_SSE1 ` è SPI_SLVSEL_SSEL2_DIS SPI_SLVSEL_SSEL2_EN ADI_SPI_SLVSEL_SSE2 ± 9! SPI_SLVSEL_SSEL3_DIS SPI_SLVSEL_SSEL3_EN ADI_SPI_SLVSEL_SSE3 ! ! SPI_SLVSEL_SSEL4_DIS SPI_SLVSEL_SSEL4_EN ADI_SPI_SLVSEL_SSE4 S! Û! SPI_SLVSEL_SSEL5_DIS SPI_SLVSEL_SSEL5_EN ADI_SPI_SLVSEL_SSE5 ¤! ," SPI_SLVSEL_SSEL6_DIS SPI_SLVSEL_SSEL6_EN ADI_SPI_SLVSEL_SSE6 õ! }" SPI_SLVSEL_SSEL7_DIS SPI_SLVSEL_SSEL7_EN ADI_SPI_SLVSEL_SSE7 F" Í" SPI_SLVSEL_SSEL1_LO SPI_SLVSEL_SSEL1_HI ADI_SPI_SLVSEL_SSEL1 " # SPI_SLVSEL_SSEL2_LO SPI_SLVSEL_SSEL2_HI ADI_SPI_SLVSEL_SSEL2 è" o# SPI_SLVSEL_SSEL3_LO SPI_SLVSEL_SSEL3_HI ADI_SPI_SLVSEL_SSEL3 9# À# SPI_SLVSEL_SSEL4_LO SPI_SLVSEL_SSEL4_HI ADI_SPI_SLVSEL_SSEL4 # $ SPI_SLVSEL_SSEL5_LO SPI_SLVSEL_SSEL5_HI ADI_SPI_SLVSEL_SSEL5 Û# b$ SPI_SLVSEL_SSEL6_LO SPI_SLVSEL_SSEL6_HI ADI_SPI_SLVSEL_SSEL6 ,$ ³$ SPI_SLVSEL_SSEL7_LO SPI_SLVSEL_SSEL7_HI ADI_SPI_SLVSEL_SSEL7 }$ & reserved0 # SSE1 # SSE2 # SSE3 # SSE4 # SSE5 # SSE6 # SSE7 # reserved8 # SSEL1 # SSEL2 # SSEL3 # SSEL4 # SSEL5 # SSEL6 # SSEL7 # reserved16 # 5& Î$ # VALUE32 # Z& _ADI_SPI_SLVSEL_t & # ADI_SPI_SLVSEL_t 5& ¤& VALUE # reserved16 # É& q& # VALUE32 # ë& _ADI_SPI_RWC_t ¤& # ADI_SPI_RWC_t É& 2' VALUE # reserved16 # W' ÿ& # VALUE32 # z' _ADI_SPI_RWCR_t 2' # ADI_SPI_RWCR_t W' Â' VALUE # reserved16 # ç' ' # VALUE32 # ( _ADI_SPI_TWC_t Â' # ADI_SPI_TWC_t ç' P( VALUE # reserved16 # u( ( # VALUE32 # ( _ADI_SPI_TWCR_t P( # ADI_SPI_TWCR_t u( Ý( SPI_IMSK_RUWM_LO SPI_IMSK_RUWM_HI ADI_SPI_IMSK_RUWM ( %) SPI_IMSK_TUWM_LO SPI_IMSK_TUWM_HI ADI_SPI_IMSK_TUWM õ( k) SPI_IMSK_ROR_LO SPI_IMSK_ROR_HI ADI_SPI_IMSK_ROR =) °) SPI_IMSK_TUR_LO SPI_IMSK_TUR_HI ADI_SPI_IMSK_TUR ) ó) SPI_IMSK_TC_LO SPI_IMSK_TC_HI ADI_SPI_IMSK_TC Ç) 5* SPI_IMSK_MF_LO SPI_IMSK_MF_HI ADI_SPI_IMSK_MF * w* SPI_IMSK_RS_LO SPI_IMSK_RS_HI ADI_SPI_IMSK_RS K* ¹* SPI_IMSK_TS_LO SPI_IMSK_TS_HI ADI_SPI_IMSK_TS * û* SPI_IMSK_RF_LO SPI_IMSK_RF_HI ADI_SPI_IMSK_RF Ï* =+ SPI_IMSK_TF_LO SPI_IMSK_TF_HI ADI_SPI_IMSK_TF + <, reserved0 # RUWM # TUWM # reserved3 # ROR # TUR # TC # MF # RS # TS # RF # TF # reserved12 # a, S+ # VALUE32 # , _ADI_SPI_IMSK_t <, # ADI_SPI_IMSK_t a, - reserved0 # RUWM # TUWM # reserved3 # ROR # TUR # TC # MF # RS # TS # RF # TF # reserved12 # §- , # VALUE32 # Î- _ADI_SPI_IMSK_CLR_t - # ADI_SPI_IMSK_CLR_t §- Ð. reserved0 # RUWM # TUWM # reserved3 # ROR # TUR # TC # MF # RS # TS # RF # TF # reserved12 # õ. ç- # VALUE32 # / _ADI_SPI_IMSK_SET_t Ð. # ADI_SPI_IMSK_SET_t õ. e/ SPI_STAT_SPIF_LO SPI_STAT_SPIF_HI ADI_SPI_STAT_SPIF 5/ / SPI_STAT_RUWM_LO SPI_STAT_RUWM_HI ADI_SPI_STAT_RUWM }/ õ/ SPI_STAT_TUWM_LO SPI_STAT_TUWM_HI ADI_SPI_STAT_TUWM Å/ ;0 SPI_STAT_ROR_LO SPI_STAT_ROR_HI ADI_SPI_STAT_ROR 0 0 SPI_STAT_TUR_LO SPI_STAT_TUR_HI ADI_SPI_STAT_TUR R0 Ã0 SPI_STAT_TC_LO SPI_STAT_TC_HI ADI_SPI_STAT_TC 0 1 SPI_STAT_MF_LO SPI_STAT_MF_HI ADI_SPI_STAT_MF Ù0 G1 SPI_STAT_RS_LO SPI_STAT_RS_HI ADI_SPI_STAT_RS 1 1 SPI_STAT_TS_LO SPI_STAT_TS_HI ADI_SPI_STAT_TS ]1 Ë1 SPI_STAT_RF_LO SPI_STAT_RF_HI ADI_SPI_STAT_RF 1 2 SPI_STAT_TF_LO SPI_STAT_TF_HI ADI_SPI_STAT_TF á1 2 SPI_STAT_RFIFO_EMPTY SPI_STAT_RFIFO_25 SPI_STAT_RFIFO_50 SPI_STAT_RFIFO_75 SPI_STAT_RFIFO_FULL ADI_SPI_STAT_RFS #2 3 SPI_STAT_TFIFO_FULL SPI_STAT_TFIFO_25 SPI_STAT_TFIFO_50 SPI_STAT_TFIFO_75 SPI_STAT_TFIFO_EMPTY ADI_SPI_STAT_TFS 2 e3 SPI_STAT_STALL SPI_STAT_NOSTALL ADI_SPI_STAT_FCS 73 3 SPI_STAT_RFIFO_NE SPI_STAT_RFIFO_E ADI_SPI_STAT_RFE |3 õ3 SPI_STAT_TFIFO_NF SPI_STAT_TFIFO_F ADI_SPI_STAT_TFF Ä3 Ï5 SPIF # RUWM # TUWM # reserved3 # ROR # TUR # TC # MF # RS # TS # RF # TF # RFS # reserved15 # TFS # reserved19 # FCS # reserved21 #
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RFE # TFF # reserved24 # MMWE # MMRE # reserved30 # MMAE # ô5 4 # VALUE32 # 6 _ADI_SPI_STAT_t Ï5 # ADI_SPI_STAT_t ô5 \6 SPI_ILAT_RUWM_LO SPI_ILAT_RUWM_HI ADI_SPI_ILAT_RUWM ,6 ¤6 SPI_ILAT_TUWM_LO SPI_ILAT_TUWM_HI ADI_SPI_ILAT_TUWM t6 ê6 SPI_ILAT_ROR_LO SPI_ILAT_ROR_HI ADI_SPI_ILAT_ROR ¼6 /7 SPI_ILAT_TUR_LO SPI_ILAT_TUR_HI ADI_SPI_ILAT_TUR 7 r7 SPI_ILAT_TC_LO SPI_ILAT_TC_HI ADI_SPI_ILAT_TC F7 ´7 SPI_ILAT_MF_LO SPI_ILAT_MF_HI ADI_SPI_ILAT_MF 7 ö7 SPI_ILAT_RS_LO SPI_ILAT_RS_HI ADI_SPI_ILAT_RS Ê7 88 SPI_ILAT_TS_LO SPI_ILAT_TS_HI ADI_SPI_ILAT_TS 8 z8 SPI_ILAT_RF_LO SPI_ILAT_RF_HI ADI_SPI_ILAT_RF N8 ¼8 SPI_ILAT_TF_LO SPI_ILAT_TF_HI ADI_SPI_ILAT_TF 8 »9 reserved0 # RUWM # TUWM # reserved3 # ROR # TUR # TC # MF # RS # TS # RF # TF # reserved12 # à9 Ò8 # VALUE32 # : _ADI_SPI_ILAT_t »9 # ADI_SPI_ILAT_t à9 ; reserved0 # RUWM # TUWM # reserved3 # ROR # TUR # TC # MF # RS # TS # RF # TF # reserved12 # &; : # VALUE32 # M; _ADI_SPI_ILAT_CLR_t ; # ADI_SPI_ILAT_CLR_t &; ; DATA # ¦; f; # VALUE32 # Ê; _ADI_SPI_RFIFO_t ; # ADI_SPI_RFIFO_t ¦; û; DATA # < à; # VALUE32 # D< _ADI_SPI_TFIFO_t û; # ADI_SPI_TFIFO_t < P= OPCODE # ADRSIZE # ADRPINS # DMYSIZE # reserved15 # MODE # TRIDMY # MERGE # WRAP # CMDSKIP # CMDPINS # reserved30 # u= Z< # VALUE32 # = _ADI_SPI_MMRDH_t P= # ADI_SPI_MMRDH_t u= Ì= TOPADR # ñ= ¯= # VALUE32 # > _ADI_SPI_MMTOP_t Ì= # ADI_SPI_MMTOP_t ñ= ? EN # MSTR # PSSE # ODM # CPHA # CPOL # ASSEL # SELST # EMISO # SIZE # reserved11 # LSBF # FCEN # FCCH # FCPL # FCWM # FMODE # reserved19 # MIOM #
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SOSI # reserved23 # Ò? +> # VALUE32 # ù? _ADI_SPI_CFG0_CTL_t ? # ADI_SPI_CFG0_CTL_t Ò? A REN # reserved1 # RTI # RWCEN # RDR # reserved7 # RDO # reserved9 # RRWM # reserved14 # RUWM # reserved19 # %A @ # VALUE32 # NA _ADI_SPI_CFG0_RXCTL_t A # ADI_SPI_CFG0_RXCTL_t %A WB TEN # reserved1 # TTI # TWCEN # TDR # reserved7 # TDU # reserved9 # TRWM # reserved14 # TUWM # reserved19 # |B iA # VALUE32 # ¥B _ADI_SPI_CFG0_TXCTL_t WB # ADI_SPI_CFG0_TXCTL_t |B òB BAUD # reserved16 # C ÀB # VALUE32 # >C _ADI_SPI_CFG0_CLK_t òB # ADI_SPI_CFG0_CLK_t C ¬C STOP # LEADX # LAGX # reserved10 # ÑC WC # VALUE32 # øC _ADI_SPI_CFG0_DLY_t ¬C # ADI_SPI_CFG0_DLY_t ÑC SE reserved0 # SSE1 # SSE2 # SSE3 # SSE4 # SSE5 # SSE6 # SSE7 # reserved8 # SSEL1 # SSEL2 # SSEL3 # SSEL4 # SSEL5 # SSEL6 # SSEL7 # reserved16 # xE D # VALUE32 # ¢E _ADI_SPI_CFG0_SLVSEL_t SE # ADI_SPI_CFG0_SLVSEL_t xE ñE VALUE # reserved16 # F ¾E # VALUE32 # =F _ADI_SPI_CFG0_RWC_t ñE # ADI_SPI_CFG0_RWC_t F F VALUE # reserved16 # ®F VF # VALUE32 # ÖF _ADI_SPI_CFG0_RWCR_t F # ADI_SPI_CFG0_RWCR_t ®F #G VALUE # reserved16 # HG ðF # VALUE32 # oG _ADI_SPI_CFG0_TWC_t #G # ADI_SPI_CFG0_TWC_t HG »G VALUE # reserved16 # àG G # VALUE32 # H _ADI_SPI_CFG0_TWCR_t »G # ADI_SPI_CFG0_TWCR_t àG I reserved0 # RUWM # TUWM # reserved3 # ROR # TUR # TC # MF # RS # TS # RF # TF # reserved12 # 0I "H # VALUE32 # XI _ADI_SPI_CFG0_IMSK_t I # ADI_SPI_CFG0_IMSK_t 0I [J reserved0 # RUWM # TUWM # reserved3 # ROR # TUR # TC # MF # RS # TS # RF # TF # reserved12 # J rI # VALUE32 # ¬J _ADI_SPI_CFG0_IMSK_CLR_t [J # ADI_SPI_CFG0_IMSK_CLR_t J ³K reserved0 # RUWM # TUWM # reserved3 # ROR # TUR # TC # MF # RS # TS # RF # TF # reserved12 # ØK ÊJ # VALUE32 # L _ADI_SPI_CFG0_IMSK_SET_t ³K # ADI_SPI_CFG0_IMSK_SET_t ØK M SPIF # RUWM # TUWM # reserved3 # ROR # TUR # TC # MF # RS # TS # RF # TF # RFS # reserved15 # TFS # reserved19 # FCS # reserved21 #
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RFE # TFF # reserved24 # ÀM "L # VALUE32 # èM _ADI_SPI_CFG0_STAT_t M # ADI_SPI_CFG0_STAT_t ÀM ëN reserved0 # RUWM # TUWM # reserved3 # ROR # TUR # TC # MF # RS # TS # RF # TF # reserved12 # O N # VALUE32 # 8O _ADI_SPI_CFG0_ILAT_t ëN # ADI_SPI_CFG0_ILAT_t O ;P reserved0 # RUWM # TUWM # reserved3 # ROR # TUR # TC # MF # RS # TS # RF # TF # reserved12 # `P RO # VALUE32 # P _ADI_SPI_CFG0_ILAT_CLR_t ;P # ADI_SPI_CFG0_ILAT_CLR_t `P ÅP DATA # êP ªP # VALUE32 # Q _ADI_SPI_CFG0_RFIFO_t ÅP # ADI_SPI_CFG0_RFIFO_t êP IQ DATA # nQ .Q # VALUE32 # Q _ADI_SPI_CFG0_TFIFO_t IQ # ADI_SPI_CFG0_TFIFO_t nQ 4S EN # MSTR # PSSE # ODM # CPHA # CPOL # ASSEL # SELST # EMISO # SIZE # reserved11 # LSBF # FCEN # FCCH # FCPL # FCWM # FMODE # reserved19 # MIOM #
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SOSI # reserved23 # YS ²Q # VALUE32 # S _ADI_SPI_CFG1_CTL_t 4S # ADI_SPI_CFG1_CTL_t YS T REN # reserved1 # RTI # RWCEN # RDR # reserved7 # RDO # reserved9 # RRWM # reserved14 # RUWM # reserved19 # ¬T S # VALUE32 # ÕT _ADI_SPI_CFG1_RXCTL_t T # ADI_SPI_CFG1_RXCTL_t ¬T ÞU TEN # reserved1 # TTI # TWCEN # TDR # reserved7 # TDU # reserved9 # TRWM # reserved14 # TUWM # reserved19 # V ðT # VALUE32 # ,V _ADI_SPI_CFG1_TXCTL_t ÞU # ADI_SPI_CFG1_TXCTL_t V yV BAUD # reserved16 # V GV # VALUE32 # ÅV _ADI_SPI_CFG1_CLK_t yV # ADI_SPI_CFG1_CLK_t V 3W STOP # LEADX # LAGX # reserved10 # XW ÞV # VALUE32 # W _ADI_SPI_CFG1_DLY_t 3W # ADI_SPI_CFG1_DLY_t XW ÚX reserved0 # SSE1 # SSE2 # SSE3 # SSE4 # SSE5 # SSE6 # SSE7 # reserved8 # SSEL1 # SSEL2 # SSEL3 # SSEL4 # SSEL5 # SSEL6 # SSEL7 # reserved16 # ÿX W # VALUE32 # )Y _ADI_SPI_CFG1_SLVSEL_t ÚX # ADI_SPI_CFG1_SLVSEL_t ÿX xY VALUE # reserved16 # Y EY # VALUE32 # ÄY _ADI_SPI_CFG1_RWC_t xY # ADI_SPI_CFG1_RWC_t Y Z VALUE # reserved16 # 5Z ÝY # VALUE32 # ]Z _ADI_SPI_CFG1_RWCR_t Z # ADI_SPI_CFG1_RWCR_t 5Z ªZ VALUE # reserved16 # ÏZ wZ # VALUE32 # öZ _ADI_SPI_CFG1_TWC_t ªZ # ADI_SPI_CFG1_TWC_t ÏZ B[ VALUE # reserved16 # g[ [ # VALUE32 # [ _ADI_SPI_CFG1_TWCR_t B[ # ADI_SPI_CFG1_TWCR_t g[ \ reserved0 # RUWM # TUWM # reserved3 # ROR # TUR # TC # MF # RS # TS # RF # TF # reserved12 # ·\ ©[ # VALUE32 # ß\ _ADI_SPI_CFG1_IMSK_t \ # ADI_SPI_CFG1_IMSK_t ·\ â] reserved0 # RUWM # TUWM # reserved3 # ROR # TUR # TC # MF # RS # TS # RF # TF # reserved12 # ^ ù\ # VALUE32 # 3^ _ADI_SPI_CFG1_IMSK_CLR_t â] # ADI_SPI_CFG1_IMSK_CLR_t ^ :_ reserved0 # RUWM # TUWM # reserved3 # ROR # TUR # TC # MF # RS # TS # RF # TF # reserved12 # __ Q^ # VALUE32 # _ _ADI_SPI_CFG1_IMSK_SET_t :_ # ADI_SPI_CFG1_IMSK_SET_t __ "a SPIF # RUWM # TUWM # reserved3 # ROR # TUR # TC # MF # RS # TS # RF # TF # RFS # reserved15 # TFS # reserved19 # FCS # reserved21 #
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RFE # TFF # reserved24 # Ga ©_ # VALUE32 # oa _ADI_SPI_CFG1_STAT_t "a # ADI_SPI_CFG1_STAT_t Ga rb reserved0 # RUWM # TUWM # reserved3 # ROR # TUR # TC # MF # RS # TS # RF # TF # reserved12 # b a # VALUE32 # ¿b _ADI_SPI_CFG1_ILAT_t rb # ADI_SPI_CFG1_ILAT_t b Âc reserved0 # RUWM # TUWM # reserved3 # ROR # TUR # TC # MF # RS # TS # RF # TF # reserved12 # çc Ùb # VALUE32 # d _ADI_SPI_CFG1_ILAT_CLR_t Âc # ADI_SPI_CFG1_ILAT_CLR_t çc Ld DATA # qd 1d # VALUE32 # d _ADI_SPI_CFG1_RFIFO_t Ld # ADI_SPI_CFG1_RFIFO_t qd Ðd DATA # õd µd # VALUE32 # e _ADI_SPI_CFG1_TFIFO_t Ðd # ADI_SPI_CFG1_TFIFO_t õd Þf EN # MSTR # PSSE # ODM # CPHA # CPOL # ASSEL # SELST # EMISO # SIZE # reserved11 # LSBF # FCEN # FCCH # FCPL # FCWM # FMODE # reserved19 # MIOM #
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SOSI # reserved23 # MMWEM # MMSE # g 9e # VALUE32 # *g _ADI_SPI_CFG2_CTL_t Þf # ADI_SPI_CFG2_CTL_t g 1h REN # reserved1 # RTI # RWCEN # RDR # reserved7 # RDO # reserved9 # RRWM # reserved14 # RUWM # reserved19 # Vh Cg # VALUE32 # h _ADI_SPI_CFG2_RXCTL_t 1h # ADI_SPI_CFG2_RXCTL_t Vh i TEN # reserved1 # TTI # TWCEN # TDR # reserved7 # TDU # reserved9 # TRWM # reserved14 # TUWM # reserved19 # i h # VALUE32 # Öi _ADI_SPI_CFG2_TXCTL_t i # ADI_SPI_CFG2_TXCTL_t i #j BAUD # reserved16 # Hj ñi # VALUE32 # oj _ADI_SPI_CFG2_CLK_t #j # ADI_SPI_CFG2_CLK_t Hj Ýj STOP # LEADX # LAGX # reserved10 # k j # VALUE32 # )k _ADI_SPI_CFG2_DLY_t Ýj # ADI_SPI_CFG2_DLY_t k l reserved0 # SSE1 # SSE2 # SSE3 # SSE4 # SSE5 # SSE6 # SSE7 # reserved8 # SSEL1 # SSEL2 # SSEL3 # SSEL4 # SSEL5 # SSEL6 # SSEL7 # reserved16 # ©l Bk # VALUE32 # Ól _ADI_SPI_CFG2_SLVSEL_t l # ADI_SPI_CFG2_SLVSEL_t ©l "m VALUE # reserved16 # Gm ïl # VALUE32 # nm _ADI_SPI_CFG2_RWC_t "m # ADI_SPI_CFG2_RWC_t Gm ºm VALUE # reserved16 # ßm m # VALUE32 # n _ADI_SPI_CFG2_RWCR_t ºm # ADI_SPI_CFG2_RWCR_t ßm Tn VALUE # reserved16 # yn !n # VALUE32 # n _ADI_SPI_CFG2_TWC_t Tn # ADI_SPI_CFG2_TWC_t yn ìn VALUE # reserved16 # o ¹n # VALUE32 # 9o _ADI_SPI_CFG2_TWCR_t ìn # ADI_SPI_CFG2_TWCR_t o <p reserved0 # RUWM # TUWM # reserved3 # ROR # TUR # TC # MF # RS # TS # RF # TF # reserved12 # ap So # VALUE32 # p _ADI_SPI_CFG2_IMSK_t <p # ADI_SPI_CFG2_IMSK_t ap q reserved0 # RUWM # TUWM # reserved3 # ROR # TUR # TC # MF # RS # TS # RF # TF # reserved12 # ±q £p # VALUE32 # Ýq _ADI_SPI_CFG2_IMSK_CLR_t q # ADI_SPI_CFG2_IMSK_CLR_t ±q är reserved0 # RUWM # TUWM # reserved3 # ROR # TUR # TC # MF # RS # TS # RF # TF # reserved12 # s ûq # VALUE32 # 5s _ADI_SPI_CFG2_IMSK_SET_t är # ADI_SPI_CFG2_IMSK_SET_t s u SPIF # RUWM # TUWM # reserved3 # ROR # TUR # TC # MF # RS # TS # RF # TF # RFS # reserved15 # TFS # reserved19 # FCS # reserved21 #
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RFE # TFF # reserved24 # MMWE # MMRE # reserved30 # MMAE # ;u Ss # VALUE32 # cu _ADI_SPI_CFG2_STAT_t u # ADI_SPI_CFG2_STAT_t ;u fv reserved0 # RUWM # TUWM # reserved3 # ROR # TUR # TC # MF # RS # TS # RF # TF # reserved12 # v }u # VALUE32 # ³v _ADI_SPI_CFG2_ILAT_t fv # ADI_SPI_CFG2_ILAT_t v ¶w reserved0 # RUWM # TUWM # reserved3 # ROR # TUR # TC # MF # RS # TS # RF # TF # reserved12 # Ûw Ív # VALUE32 # x _ADI_SPI_CFG2_ILAT_CLR_t ¶w # ADI_SPI_CFG2_ILAT_CLR_t Ûw @x DATA # ex %x # VALUE32 # x _ADI_SPI_CFG2_RFIFO_t @x # ADI_SPI_CFG2_RFIFO_t ex Äx DATA # éx ©x # VALUE32 # y _ADI_SPI_CFG2_TFIFO_t Äx # ADI_SPI_CFG2_TFIFO_t éx #z OPCODE # ADRSIZE # ADRPINS # DMYSIZE # reserved15 # MODE # TRIDMY # MERGE # WRAP # CMDSKIP # CMDPINS # reserved30 # Hz -y # VALUE32 # qz _ADI_SPI_CFG2_MMRDH_t #z # ADI_SPI_CFG2_MMRDH_t Hz ©z TOPADR # Îz z # VALUE32 # ÷z _ADI_SPI_CFG2_MMTOP_t ©z # ADI_SPI_CFG2_MMTOP_t Îz /{ DMC_CTL_DDR3MODE ADI_DMC_CTL_DDR3EN { â{ DMC_CTL_RDTOWR0 DMC_CTL_RDTOWR1 DMC_CTL_RDTOWR2 DMC_CTL_RDTOWR3 DMC_CTL_RDTOWR4 DMC_CTL_RDTOWR5 DMC_CTL_RDTOWR6 DMC_CTL_RDTOWR7 ADI_DMC_CTL_RDTOWR H{ | DMC_CTL_0 DMC_CTL_1 ADI_DMC_CTL_RL_DQS û{ } DDR3EN # reserved1 # INIT # SRREQ # PDREQ # reserved5 # PREC # RESET # ADDRMODE # RDTOWR # PPREF # DLLCAL # reserved14 #
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ZQCS # ZQCL # RL_DQS # reserved27 # ¬} 6| # VALUE32 # Î} _ADI_DMC_CTL_t } # ADI_DMC_CTL_t ¬} ( IDLE # reserved1 # INITDONE # SRACK # PDACK # reserved5 # RESETDONE # reserved8 # DLLCALDONE # reserved14 # PENDREF # PHYRDPHASE # ZQCSDONE # ZQCLDONE # reserved26 # M â} # VALUE32 # p _ADI_DMC_STAT_t ( # ADI_DMC_STAT_t M reserved0 # PRECBANK0 # PRECBANK1 # PRECBANK2 # PRECBANK3 # PRECBANK4 # PRECBANK5 # PRECBANK6 # PRECBANK7 # NUMREF # IDLECYC # reserved24 # ¸
# VALUE32 # Ý _ADI_DMC_EFFCTL_t # ADI_DMC_EFFCTL_t ¸ ID1 # 3 ô # VALUE32 # V _ADI_DMC_PRIO_t # ADI_DMC_PRIO_t 3 ID1MSK # k # VALUE32 # Ó _ADI_DMC_PRIOMSK_t # ADI_DMC_PRIOMSK_t ID2 # * ë # VALUE32 # N _ADI_DMC_PRIO2_t # ADI_DMC_PRIO2_t * ID2MSK # ¦ d # VALUE32 # Í _ADI_DMC_PRIOMSK2_t # ADI_DMC_PRIOMSK2_t ¦ DMC_CFG_IFWID16 ADI_DMC_CFG_IFWID æ 7 DMC_CFG_SDRWID16 ADI_DMC_CFG_SDRWID ¿ DMC_CFG_SDRSIZE512 DMC_CFG_SDRSIZE1G DMC_CFG_SDRSIZE2G DMC_CFG_SDRSIZE4G DMC_CFG_SDRSIZE8G ADI_DMC_CFG_SDRSIZE P ö DMC_CFG_EXTBANK1 ADI_DMC_CFG_EXTBANK Ù ~ IFWID # SDRWID # SDRSIZE # EXTBANK # reserved16 # £ # VALUE32 # Å _ADI_DMC_CFG_t ~ # ADI_DMC_CFG_t £ u
TRCD # TWTR # TRP # TRAS # reserved17 # TRC # reserved26 # TMRD #
Ù # VALUE32 # ¼
_ADI_DMC_TR0_t u
# ADI_DMC_TR0_t
R TREF # reserved14 # TRFC # reserved25 # TRRD # reserved31 # w Ð
# VALUE32 # _ADI_DMC_TR1_t R # ADI_DMC_TR1_t w P TFAW # TFAW5 # reserved6 # TRTP # reserved12 # TXP # TCKE # reserved24 # u # VALUE32 # _ADI_DMC_TR2_t P # ADI_DMC_TR2_t u " reserved0 # MR # MR1 # MR2 # EMR3 # reserved12 # G « # VALUE32 # i _ADI_DMC_MSK_t " # ADI_DMC_MSK_t G DMC_MR_BLEN8_DDR3 ADI_DMC_MR_BLEN } d BLEN # CL0 # reserved3 # CL # reserved7 # DLLRST # WRRECOV # PD # reserved13 # ± # VALUE32 # ª _ADI_DMC_MR_t d # ADI_DMC_MR_t ² DLLEN # DIC0 # RTT0 # AL # DIC1 # RTT1 # WL # reserved8 # RTT2 # reserved10 # TDQS # QOFF # reserved13 # × ½ # VALUE32 # ù _ADI_DMC_MR1_t ² # ADI_DMC_MR1_t × 5 DMC_MR2_SRT DMC_MR2_ASREN ADI_DMC_MR2_ASR ¬ PASR # CWL # ASR # SRT # reserved8 # Ñ K # VALUE32 # ó _ADI_DMC_MR2_t ¬ # ADI_DMC_MR2_t Ñ K MPR_LOC # MPR # reserved3 # p # VALUE32 # _ADI_DMC_EMR3_t K # ADI_DMC_EMR3_t p õ DLLCALRDCNT # DATACYC # reserved12 # ¨ # VALUE32 # ? _ADI_DMC_DLLCTL_t õ # ADI_DMC_DLLCTL_t ~ DMC_DT_CALIB_ADDR # £ V # VALUE32 # Ï _ADI_DMC_DT_CALIB_ADDR_t ~ # ADI_DMC_DT_CALIB_ADDR_t £ DMC_DT_DATA_CALIB_DATA0 # @ í # VALUE32 # r _ADI_DMC_DT_DATA_CALIB_DATA0_t # ADI_DMC_DT_DATA_CALIB_DATA0_t @ Ä DMC_DT_DATA_CALIB_DATA1 # é # VALUE32 # _ADI_DMC_DT_DATA_CALIB_DATA1_t Ä # ADI_DMC_DT_DATA_CALIB_DATA1_t é [ VALUE # ? # VALUE32 # « _ADI_DMC_RDDATABUFID1_t [ # ADI_DMC_RDDATABUFID1_t ä VALUE # È # VALUE32 # 5 _ADI_DMC_RDDATABUFMSK1_t ä # ADI_DMC_RDDATABUFMSK1_t o VALUE # S # VALUE32 # ¿ _ADI_DMC_RDDATABUFID2_t o # ADI_DMC_RDDATABUFID2_t ø VALUE # Ü # VALUE32 # I _ADI_DMC_RDDATABUFMSK2_t ø # ADI_DMC_RDDATABUFMSK2_t ¬ DMC_DDR_LANE0_CTL0_ENABLED DMC_DDR_LANE0_CTL0_DISABLED ADI_DMC_DDR_LANE0_CTL0_LANE_DIS g ö DMC_DDR_LANE0_CTL0_DDR3 ADI_DMC_DDR_LANE0_CTL0_DDR_MODE Ò DMC_DDR_LANE0_CTL0_DIVBY2 DMC_DDR_LANE0_CTL0_DIVBY4 DMC_DDR_LANE0_CTL0_DIVBY8 DMC_DDR_LANE0_CTL0_DIVBY16 ADI_DMC_DDR_LANE0_CTL0_MF_SEL DMC_DDR_LANE0_CTL0_DQS_DUTY_DISABLE DMC_DDR_LANE0_CTL0_DQS_DUTY_ENABLE ADI_DMC_DDR_LANE0_CTL0_BYPENB » DMC_DDR_LANE0_CTL0_DIRECTION_NEG DMC_DDR_LANE0_CTL0_DIRECTION_POS ADI_DMC_DDR_LANE0_CTL0_BYPSELP 4 7 DMC_DDR_LANE0_CTL0_DUTY_ADJ_L1 DMC_DDR_LANE0_CTL0_DUTY_ADJ_L2 DMC_DDR_LANE0_CTL0_DUTY_ADJ_L3 DMC_DDR_LANE0_CTL0_DUTY_ADJ_L4 ADI_DMC_DDR_LANE0_CTL0_BYPCODE © z LANE_DIS # DDR_MODE # reserved3 # MF_SEL # reserved7 # CB_RSTDLL # reserved9 # BYPENB # BYPSELP # BYPCODE # reserved16 # CB_RSTDAT # reserved28 # \ # VALUE32 # Ì _ADI_DMC_DDR_LANE0_CTL0_t z # ADI_DMC_DDR_LANE0_CTL0_t ~ reserved0 # COMP_DCYCLE # reserved2 # BYPCODE # BYPDELCHAINEN # reserved16 # £ ë # VALUE32 # Ð _ADI_DMC_DDR_LANE0_CTL1_t ~ # ADI_DMC_DDR_LANE0_CTL1_t £ 4 DMC_DDR_LANE1_CTL0_ENABLED DMC_DDR_LANE1_CTL0_DISABLED ADI_DMC_DDR_LANE1_CTL0_LANE_DIS ï ~ DMC_DDR_LANE1_CTL0_DDR3 ADI_DMC_DDR_LANE1_CTL0_DDR_MODE Z DMC_DDR_LANE1_CTL0_DIVBY2 DMC_DDR_LANE1_CTL0_DIVBY4 DMC_DDR_LANE1_CTL0_DIVBY8 DMC_DDR_LANE1_CTL0_DIVBY16 ADI_DMC_DDR_LANE1_CTL0_MF_SEL ¤ DMC_DDR_LANE1_CTL0_DQS_DUTY_DISABLE DMC_DDR_LANE1_CTL0_DQS_DUTY_ENABLE ADI_DMC_DDR_LANE1_CTL0_BYPENB C DMC_DDR_LANE1_CTL0_DIRECTION_NEG DMC_DDR_LANE1_CTL0_DIRECTION_POS ADI_DMC_DDR_LANE1_CTL0_BYPSELP ¼ ¿ DMC_DDR_LANE1_CTL0_DUTY_ADJ_L1 DMC_DDR_LANE1_CTL0_DUTY_ADJ_L2 DMC_DDR_LANE1_CTL0_DUTY_ADJ_L3 DMC_DDR_LANE1_CTL0_DUTY_ADJ_L4 ADI_DMC_DDR_LANE1_CTL0_BYPCODE 1 LANE_DIS # DDR_MODE # reserved3 # MF_SEL # reserved7 # CB_RSTDLL # reserved9 # BYPENB # BYPSELP # BYPCODE # reserved16 # CB_RSTDAT # reserved28 # ' ä # VALUE32 # T _ADI_DMC_DDR_LANE1_CTL0_t # ADI_DMC_DDR_LANE1_CTL0_t ' reserved0 # COMP_DCYCLE # reserved2 # BYPCODE # BYPDELCHAINEN # reserved16 # + s # VALUE32 # X _ADI_DMC_DDR_LANE1_CTL1_t # ADI_DMC_DDR_LANE1_CTL1_t + ê DMC_DDR_ROOT_CTL_DIVBY2 DMC_DDR_ROOT_CTL_DIVBY4 DMC_DDR_ROOT_CTL_DIVBY8 DMC_DDR_ROOT_CTL_DIVBY16 ADI_DMC_DDR_ROOT_CTL_MF_SEL w k PHYC_DCYCLE_BYP # PHYC_DCYCLE_VAL # CPHY_DCYCLE_BYP # CPHY_DCYCLE_VAL # PIPE_OFSTDCYCLE # SW_REFRESH # MF_SEL # TRIG_WR_XFER_CA # TRIG_WR_XFER_L0 # TRIG_WR_XFER_L1 # reserved19 # TRIG_RD_XFER_ALL #
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reserved22 #
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# VALUE32 # » _ADI_DMC_DDR_ROOT_CTL_t k # ADI_DMC_DDR_ROOT_CTL_t 5 IMPWRADD # IMPWRDQ # IMPRTT # reserved24 # Z Ø # VALUE32 # _ADI_DMC_DDR_ZQ_CTL0_t 5 # ADI_DMC_DDR_ZQ_CTL0_t Z ' BYPRDPU # BYPRDPD # PDCAL # reserved13 #
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USEFNBUS # reserved23 # L # VALUE32 # v _ADI_DMC_DDR_ZQ_CTL1_t ' # ADI_DMC_DDR_ZQ_CTL1_t L ¡ BYPIMAD # BYPIMDQ # BYPIMRD # BYPPUADD # BYPPDADD # BYPPUDQ # BYPPDDQ # CALTYPE # CALSTRT # PUCALEN # PDCALEN # RTTCALEN # ´¡ # VALUE32 # Þ¡ _ADI_DMC_DDR_ZQ_CTL2_t ¡ # ADI_DMC_DDR_ZQ_CTL2_t ´¡ e¢ DMC_DDR_CA_CTL_DIVBY2 DMC_DDR_CA_CTL_DIVBY4 DMC_DDR_CA_CTL_DIVBY8 DMC_DDR_CA_CTL_DIVBY16 ADI_DMC_DDR_CA_CTL_MF_SEL ú¡ À¢ DMC_DDR_CA_CTL_DISABLE DMC_DDR_CA_CTL_ENABLE ADI_DMC_DDR_CA_CTL_BYPENB
¢ (£ DMC_DDR_CA_CTL_DIRECTION_NEG DMC_DDR_CA_CTL_DIRECTION_POS ADI_DMC_DDR_CA_CTL_BYPSELP ࢠϣ DMC_DDR_CA_CTL_DUTY_ADJ_0_L4 DMC_DDR_CA_CTL_DUTY_ADJ_0_L3 DMC_DDR_CA_CTL_DUTY_ADJ_0_L1 DMC_DDR_CA_CTL_DUTY_ADJ_0_L2 ADI_DMC_DDR_CA_CTL_BYPCODE0 I£ w¤ DMC_DDR_CA_CTL_DUTY_ADJ_1_L2 DMC_DDR_CA_CTL_DUTY_ADJ_1_L1 DMC_DDR_CA_CTL_DUTY_ADJ_1_L3 DMC_DDR_CA_CTL_DUTY_ADJ_1_L4 ADI_DMC_DDR_CA_CTL_BYPCODE1 ñ£ ¥ reserved0 # SW_REFRESH # MF_SEL # BYPENB # BYPSELP # BYPCODE0 # reserved21 # BYPCODE1 # reserved25 # SLAVE_ID # reserved31 # ³¥ ¤ # VALUE32 # Ü¥ _ADI_DMC_DDR_CA_CTL_t ¥ # ADI_DMC_DDR_CA_CTL_t ³¥ § BK0EDIS # BK1EDIS # BK2EDIS # BK3EDIS # BK4EDIS # BK5EDIS # BK6EDIS # BK7EDIS # BK8EDIS # reserved9 # DISURP # reserved29 # LOCK # +§ ÷¥ # VALUE32 # O§ _ADI_L2CTL_CTL_t § # ADI_L2CTL_CTL_t +§ ®¨ ERR0 # ERR1 # reserved2 # SCRBDN # INITDN # reserved6 # ECCERR0 # ECCERR1 # ECCERR2 # ECCERR3 # ECCERR4 # ECCERR5 # ECCERR6 # ECCERR7 # ECCERR8 # reserved17 # Ó¨ e§ # VALUE32 # ø¨ _ADI_L2CTL_STAT_t ®¨ # ADI_L2CTL_STAT_t Ó¨ R© RPC0 # RPC1 # reserved16 # w© © # VALUE32 # © _ADI_L2CTL_RPCR_t R© # ADI_L2CTL_RPCR_t w© ö© WPC0 # WPC1 # reserved16 # ª ³© # VALUE32 # @ª _ADI_L2CTL_WPCR_t ö© # ADI_L2CTL_WPCR_t ª ÷ª BK0 # BK1 # BK2 # BK3 # BK4 # BK5 # BK6 # BK7 # reserved8 # « Wª # VALUE32 # A« _ADI_L2CTL_INIT_t ÷ª # ADI_L2CTL_INIT_t « ø« BK0 # BK1 # BK2 # BK3 # BK4 # BK5 # BK6 # BK7 # reserved8 # ¬ X« # VALUE32 # C¬ _ADI_L2CTL_ISTAT_t ø« # ADI_L2CTL_ISTAT_t ¬ à BK0DS # BK1DS # BK2DS # BK3DS # BK4DS # BK5DS # BK6DS # BK7DS # reserved8 # BK0SD # BK1SD # BK2SD # BK3SD # BK4SD # BK5SD #
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BK6SD # BK7SD # reserved24 # LOCK # è [¬ # VALUE32 # ® _ADI_L2CTL_PCTL_t à # ADI_L2CTL_PCTL_t è @® VALUE # e® $® # VALUE32 # ® _ADI_L2CTL_ERRADDR0_t @® # ADI_L2CTL_ERRADDR0_t e® Å® VALUE # ê® ©® # VALUE32 # ¯ _ADI_L2CTL_ERRADDR1_t Å® # ADI_L2CTL_ERRADDR1_t ê® J¯ VALUE # o¯ .¯ # VALUE32 # ¯ _ADI_L2CTL_ERRADDR2_t J¯ # ADI_L2CTL_ERRADDR2_t o¯ ϯ VALUE # ô¯ ³¯ # VALUE32 # ° _ADI_L2CTL_ERRADDR3_t ϯ # ADI_L2CTL_ERRADDR3_t ô¯ T° VALUE # y° 8° # VALUE32 # ¢° _ADI_L2CTL_ERRADDR4_t T° # ADI_L2CTL_ERRADDR4_t y° Ù° VALUE # þ° ½° # VALUE32 # '± _ADI_L2CTL_ERRADDR5_t Ù° # ADI_L2CTL_ERRADDR5_t þ° ^± VALUE # ± B± # VALUE32 # ¬± _ADI_L2CTL_ERRADDR6_t ^± # ADI_L2CTL_ERRADDR6_t ± ã± VALUE # ² DZ # VALUE32 # 1² _ADI_L2CTL_ERRADDR7_t ã± # ADI_L2CTL_ERRADDR7_t ² h² VALUE # ² L² # VALUE32 # ¶² _ADI_L2CTL_ERRADDR8_t h² # ADI_L2CTL_ERRADDR8_t ² w³ ROMERR # reserved1 # ACCERR # ECCERR # RDWR # reserved5 # ID # reserved19 # ³ Ѳ # VALUE32 # À³ _ADI_L2CTL_ET0_t w³ # ADI_L2CTL_ET0_t ³ ò³ VALUE # ´ Ö³ # VALUE32 # >´ _ADI_L2CTL_EADDR0_t ò³ # ADI_L2CTL_EADDR0_t ´ ý´ ROMERR # reserved1 # ACCERR # ECCERR # RDWR # reserved5 # ID # reserved19 # "µ W´ # VALUE32 # Fµ _ADI_L2CTL_ET1_t ý´ # ADI_L2CTL_ET1_t "µ xµ VALUE # µ \µ # VALUE32 # ĵ _ADI_L2CTL_EADDR1_t xµ # ADI_L2CTL_EADDR1_t µ /¶ SRT # reserved16 # SEN # LOCK # T¶ ݵ # VALUE32 # y¶ _ADI_L2CTL_SCTL_t /¶ # ADI_L2CTL_SCTL_t T¶ ¬¶ VALUE # Ѷ ¶ # VALUE32 # ö¶ _ADI_L2CTL_SADR_t ¬¶ # ADI_L2CTL_SADR_t Ѷ @· VALUE # reserved18 # e· · # VALUE32 # · _ADI_L2CTL_SCNT_t @· # ADI_L2CTL_SCNT_t e· ã· REV # MAJOR # reserved8 # ¸ ¡· # VALUE32 # .¸ _ADI_L2CTL_REVID_t ã· # ADI_L2CTL_REVID_t ¸ q¸ SMPU_CTL_RSEN SMPU_CTL_RSDIS ADI_SMPU_CFG0_CTL_RSDIS F¸ ¼¸ SMPU_CTL_PBEEN SMPU_CTL_PBEDIS ADI_SMPU_CFG0_CTL_PBEDIS ¸ ¹ SMPU_CTL_DECERR SMPU_CTL_SLVERR ADI_SMPU_CFG0_CTL_PBETYPE Û¸ X¹ SMPU_CTL_PINTDIS SMPU_CTL_PINTEN ADI_SMPU_CFG0_CTL_PINTEN )¹ º RSDIS # PBEDIS # PBETYPE # PINTEN # RLOCK # reserved5 # LOCK # +º w¹ # VALUE32 # Sº _ADI_SMPU_CFG0_CTL_t º # ADI_SMPU_CFG0_CTL_t +º º SMPU_STAT_NOIRQ SMPU_STAT_IRQ ADI_SMPU_CFG0_STAT_IRQ mº äº SMPU_STAT_NOIOVR SMPU_STAT_IOVR ADI_SMPU_CFG0_STAT_IOVR ¶º 0» SMPU_STAT_NOBERR SMPU_STAT_BERR ADI_SMPU_CFG0_STAT_BERR » ~» SMPU_STAT_NOBEOVR SMPU_STAT_BEOVR ADI_SMPU_CFG0_STAT_BEOVR N» Ï» SMPU_STAT_NOADRERR SMPU_STAT_ADRERR ADI_SMPU_CFG0_STAT_ADRERR » ¼ SMPU_STAT_NOLWERR SMPU_STAT_LWERR ADI_SMPU_CFG0_STAT_LWERR ï» Þ¼ IRQ # IOVR # BERR # BEOVR # reserved4 # ADRERR # LWERR # reserved18 # ½ >¼ # VALUE32 # ,½ _ADI_SMPU_CFG0_STAT_t Þ¼ # ADI_SMPU_CFG0_STAT_t ½ c½ VALUE # ½ G½ # VALUE32 # ²½ _ADI_SMPU_CFG0_IADDR_t c½ # ADI_SMPU_CFG0_IADDR_t ½ ¾ SMPU_IDTLS_NONSECURE SMPU_IDTLS_SECURE ADI_SMPU_CFG0_IDTLS_SECURE ν S¾ SMPU_IDTLS_WRITE SMPU_IDTLS_READ ADI_SMPU_CFG0_IDTLS_RNW $¾ Ú¾ SECURE # RNW # reserved2 # ID # reserved19 # ÿ¾ q¾ # VALUE32 # )¿ _ADI_SMPU_CFG0_IDTLS_t Ú¾ # ADI_SMPU_CFG0_IDTLS_t ÿ¾ a¿ VALUE # ¿ E¿ # VALUE32 # °¿ _ADI_SMPU_CFG0_BADDR_t a¿ # ADI_SMPU_CFG0_BADDR_t ¿ À SMPU_BDTLS_NONSECURE SMPU_BDTLS_SECURE ADI_SMPU_CFG0_BDTLS_SECURE Ì¿ QÀ SMPU_BDTLS_WRITE SMPU_BDTLS_READ ADI_SMPU_CFG0_BDTLS_RNW "À ØÀ SECURE # RNW # reserved2 # ID # reserved19 # ýÀ oÀ # VALUE32 # 'Á _ADI_SMPU_CFG0_BDTLS_t ØÀ # ADI_SMPU_CFG0_BDTLS_t ýÀ
Á REV # MAJOR # reserved8 # ªÁ CÁ # VALUE32 # ÔÁ _ADI_SMPU_CFG0_REVID_t
Á # ADI_SMPU_CFG0_REVID_t ªÁ ) SMPU_SECURECTL_SBEEN SMPU_SECURECTL_SBEDIS ADI_SMPU_CFG0_SECURECTL_SBEDIS ðÁ  SMPU_SECURECTL_DECERR SMPU_SECURECTL_SLVERR ADI_SMPU_CFG0_SECURECTL_SBETYPE N é SMPU_SECURECTL_SINTDIS SMPU_SECURECTL_SINTEN ADI_SMPU_CFG0_SECURECTL_SINTEN ®Â Kà SMPU_SECURECTL_RLOCKDIS SMPU_SECURECTL_RLOCKEN ADI_SMPU_CFG0_SECURECTL_RLOCK à ¨Ã SMPU_SECURECTL_RNSDIS SMPU_SECURECTL_RNSEN ADI_SMPU_CFG0_SECURECTL_RNSEN oÃ Ä SMPU_SECURECTL_RSECEN SMPU_SECURECTL_RSECDIS ADI_SMPU_CFG0_SECURECTL_RSECDIS Ìà fÄ SMPU_SECURECTL_WNSDIS SMPU_SECURECTL_WNSEN ADI_SMPU_CFG0_SECURECTL_WNSEN -Ä ÅÄ SMPU_SECURECTL_WSECEN SMPU_SECURECTL_WSECDIS ADI_SMPU_CFG0_SECURECTL_WSECDIS Ä ËÅ SBEDIS # SBETYPE # SINTEN # RLOCK # reserved4 # RNSEN # RSECDIS # WNSEN # WSECDIS # reserved12 # LOCK # ðÅ ëÄ # VALUE32 # Æ _ADI_SMPU_CFG0_SECURECTL_t ËÅ # ADI_SMPU_CFG0_SECURECTL_t ðÅ qÆ SMPU_RCTL_RPROTDIS SMPU_RCTL_RPROTEN ADI_SMPU_CFG0_RCTL_RPROTEN >Æ ÅÆ SMPU_RCTL_WPROTDIS SMPU_RCTL_WPROTEN ADI_SMPU_CFG0_RCTL_WPROTEN Æ Ç EN # SIZE # reserved6 # RPROTEN # RIDCINV # WPROTEN # WIDCINV # reserved12 # ²Ç æÆ # VALUE32 # ÛÇ _ADI_SMPU_CFG0_RCTL_t Ç # ADI_SMPU_CFG0_RCTL_t ²Ç (È reserved0 # BADDR # MÈ öÇ # VALUE32 # wÈ _ADI_SMPU_CFG0_RADDR_t (È # ADI_SMPU_CFG0_RADDR_t MÈ ÃÈ ID # reserved11 # èÈ È # VALUE32 # É _ADI_SMPU_CFG0_RIDA_t ÃÈ # ADI_SMPU_CFG0_RIDA_t èÈ ]É MSK # reserved11 # É ,É # VALUE32 # ®É _ADI_SMPU_CFG0_RIDMSKA_t ]É # ADI_SMPU_CFG0_RIDMSKA_t É üÉ ID # reserved11 # !Ê ÌÉ # VALUE32 # JÊ _ADI_SMPU_CFG0_RIDB_t üÉ # ADI_SMPU_CFG0_RIDB_t !Ê Ê MSK # reserved11 # »Ê eÊ # VALUE32 # çÊ _ADI_SMPU_CFG0_RIDMSKB_t Ê # ADI_SMPU_CFG0_RIDMSKB_t »Ê @Ë SMPU_SECURERCTL_RNSDIS SMPU_SECURERCTL_RNSEN ADI_SMPU_CFG0_SECURERCTL_RNSEN Ë ¢Ë SMPU_SECURERCTL_RSECEN SMPU_SECURERCTL_RSECDIS ADI_SMPU_CFG0_SECURERCTL_RSECDIS eË Ì SMPU_SECURERCTL_WNSDIS SMPU_SECURERCTL_WNSEN ADI_SMPU_CFG0_SECURERCTL_WNSEN ÉË fÌ SMPU_SECURERCTL_WSECEN SMPU_SECURERCTL_WSECDIS ADI_SMPU_CFG0_SECURERCTL_WSECDIS )Ì ùÌ RNSEN # RSECDIS # WNSEN # WSECDIS # reserved4 # Í Ì # VALUE32 # MÍ _ADI_SMPU_CFG0_SECURERCTL_t ùÌ # ADI_SMPU_CFG0_SECURERCTL_t Í ýÍ RSDIS # PBEDIS # PBETYPE # PINTEN # RLOCK # reserved5 # LOCK # "Î nÍ # VALUE32 # EÎ _ADI_SMPU_CTL_t ýÍ # ADI_SMPU_CTL_t "Î úÎ IRQ # IOVR # BERR # BEOVR # reserved4 # ADRERR # LWERR # reserved18 # Ï ZÎ # VALUE32 # CÏ _ADI_SMPU_STAT_t úÎ # ADI_SMPU_STAT_t Ï uÏ VALUE # Ï YÏ # VALUE32 # ¿Ï _ADI_SMPU_IADDR_t uÏ # ADI_SMPU_IADDR_t Ï ?Ð SECURE # RNW # reserved2 # ID # reserved19 # dÐ ÖÏ # VALUE32 # Ð _ADI_SMPU_IDTLS_t ?Ð # ADI_SMPU_IDTLS_t dÐ ¼Ð VALUE # áÐ Ð # VALUE32 # Ñ _ADI_SMPU_BADDR_t ¼Ð # ADI_SMPU_BADDR_t áÐ Ñ SECURE # RNW # reserved2 # ID # reserved19 # «Ñ Ñ # VALUE32 # ÐÑ _ADI_SMPU_BDTLS_t Ñ # ADI_SMPU_BDTLS_t «Ñ )Ò REV # MAJOR # reserved8 # NÒ çÑ # VALUE32 # sÒ _ADI_SMPU_REVID_t )Ò # ADI_SMPU_REVID_t NÒ jÓ SBEDIS # SBETYPE # SINTEN # RLOCK # reserved4 # RNSEN # RSECDIS # WNSEN # WSECDIS # reserved12 # LOCK # Ó Ò # VALUE32 # ¸Ó _ADI_SMPU_SECURECTL_t jÓ # ADI_SMPU_SECURECTL_t Ó zÔ EN # SIZE # reserved6 # RPROTEN # RIDCINV # WPROTEN # WIDCINV # reserved12 # Ô ÓÓ # VALUE32 # ÃÔ _ADI_SMPU_RCTL_t zÔ # ADI_SMPU_RCTL_t Ô Õ reserved0 # BADDR # 0Õ ÙÔ # VALUE32 # UÕ _ADI_SMPU_RADDR_t Õ # ADI_SMPU_RADDR_t 0Õ Õ ID # reserved11 # ÁÕ lÕ # VALUE32 # åÕ _ADI_SMPU_RIDA_t Õ # ADI_SMPU_RIDA_t ÁÕ ,Ö MSK # reserved11 # QÖ ûÕ # VALUE32 # xÖ _ADI_SMPU_RIDMSKA_t ,Ö # ADI_SMPU_RIDMSKA_t QÖ ÁÖ ID # reserved11 # æÖ Ö # VALUE32 #
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× _ADI_SMPU_RIDB_t ÁÖ # ADI_SMPU_RIDB_t æÖ Q× MSK # reserved11 # v× × # VALUE32 # × _ADI_SMPU_RIDMSKB_t Q× # ADI_SMPU_RIDMSKB_t v× "Ø RNSEN # RSECDIS # WNSEN # WSECDIS # reserved4 # GØ ¶× # VALUE32 # qØ _ADI_SMPU_SECURERCTL_t "Ø # ADI_SMPU_SECURERCTL_t GØ Ù RSDIS # PBEDIS # PBETYPE # PINTEN # RLOCK # reserved5 # LOCK # AÙ Ø # VALUE32 # iÙ _ADI_SMPU_CFG1_CTL_t Ù # ADI_SMPU_CFG1_CTL_t AÙ #Ú IRQ # IOVR # BERR # BEOVR # reserved4 # ADRERR # LWERR # reserved18 # HÚ Ù # VALUE32 # qÚ _ADI_SMPU_CFG1_STAT_t #Ú # ADI_SMPU_CFG1_STAT_t HÚ ¨Ú VALUE # ÍÚ Ú # VALUE32 # ÷Ú _ADI_SMPU_CFG1_IADDR_t ¨Ú # ADI_SMPU_CFG1_IADDR_t ÍÚ |Û SECURE # RNW # reserved2 # ID # reserved19 # ¡Û Û # VALUE32 # ËÛ _ADI_SMPU_CFG1_IDTLS_t |Û # ADI_SMPU_CFG1_IDTLS_t ¡Û Ü VALUE # (Ü çÛ # VALUE32 # RÜ _ADI_SMPU_CFG1_BADDR_t Ü # ADI_SMPU_CFG1_BADDR_t (Ü ×Ü SECURE # RNW # reserved2 # ID # reserved19 # üÜ nÜ # VALUE32 # &Ý _ADI_SMPU_CFG1_BDTLS_t ×Ü # ADI_SMPU_CFG1_BDTLS_t üÜ Ý REV # MAJOR # reserved8 # ©Ý BÝ # VALUE32 # ÓÝ _ADI_SMPU_CFG1_REVID_t Ý # ADI_SMPU_CFG1_REVID_t ©Ý ÏÞ SBEDIS # SBETYPE # SINTEN # RLOCK # reserved4 # RNSEN # RSECDIS # WNSEN # WSECDIS # reserved12 # LOCK # ôÞ ïÝ # VALUE32 # "ß _ADI_SMPU_CFG1_SECURECTL_t ÏÞ # ADI_SMPU_CFG1_SECURECTL_t ôÞ éß EN # SIZE # reserved6 # RPROTEN # RIDCINV # WPROTEN # WIDCINV # reserved12 # à Bß # VALUE32 # 7à _ADI_SMPU_CFG1_RCTL_t éß # ADI_SMPU_CFG1_RCTL_t à à reserved0 # BADDR # ©à Rà # VALUE32 # Óà _ADI_SMPU_CFG1_RADDR_t à # ADI_SMPU_CFG1_RADDR_t ©à á ID # reserved11 # Dá ïà # VALUE32 # má _ADI_SMPU_CFG1_RIDA_t á # ADI_SMPU_CFG1_RIDA_t Dá ¹á MSK # reserved11 # Þá á # VALUE32 #
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â _ADI_SMPU_CFG1_RIDMSKA_t ¹á # ADI_SMPU_CFG1_RIDMSKA_t Þá Xâ ID # reserved11 # }â (â # VALUE32 # ¦â _ADI_SMPU_CFG1_RIDB_t Xâ # ADI_SMPU_CFG1_RIDB_t }â òâ MSK # reserved11 # ã Áâ # VALUE32 # Cã _ADI_SMPU_CFG1_RIDMSKB_t òâ # ADI_SMPU_CFG1_RIDMSKB_t ã Íã RNSEN # RSECDIS # WNSEN # WSECDIS # reserved4 # òã aã # VALUE32 # !ä _ADI_SMPU_CFG1_SECURERCTL_t Íã # ADI_SMPU_CFG1_SECURERCTL_t òã iä SEC_CCTL_DIS SEC_CCTL_EN ADI_SEC_CCTL_EN Bä ®ä SEC_CCTL_NO_RESET SEC_CCTL_RESET ADI_SEC_CCTL_RESET ä üä SEC_CCTL_NO_WAITIDLE SEC_CCTL_WAITIDLE ADI_SEC_CCTL_WFI Çä Bå SEC_CCTL_NMI_DIS SEC_CCTL_NMI_EN ADI_SEC_CCTL_NMIEN å å SEC_CCTL_UNLOCK SEC_CCTL_LOCK ADI_SEC_CCTL_LOCK [å Aæ EN # RESET # reserved2 #
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WFI # reserved13 # NMIEN # reserved17 # LOCK # fæ å # VALUE32 # æ _ADI_SEC_CCTL_t Aæ # ADI_SEC_CCTL_t fæ Ëæ SEC_CSTAT_NO_ERR SEC_CSTAT_ERR ADI_SEC_CSTAT_ERR æ ç SEC_CSTAT_ACKERR ADI_SEC_CSTAT_ERRC ãæ Qç SEC_CSTAT_INVALID_PND SEC_CSTAT_VALID_PND ADI_SEC_CSTAT_PNDV ç ¢ç SEC_CSTAT_INVALID_ACT SEC_CSTAT_VALID_ACT ADI_SEC_CSTAT_ACTV jç óç SEC_CSTAT_INVALID_SID SEC_CSTAT_VALID_SID ADI_SEC_CSTAT_SIDV »ç Bè SEC_CSTAT_NOT_WAITING SEC_CSTAT_WAITING ADI_SEC_CSTAT_WFI è è SEC_CSTAT_NO_NMI SEC_CSTAT_NMI ADI_SEC_CSTAT_NMI Zè ¤é reserved0 # ERR # reserved2 # ERRC # reserved6 # PNDV # ACTV # SIDV # reserved11 # WFI # reserved13 # NMI # reserved17 # Éé è # VALUE32 # íé _ADI_SEC_CSTAT_t ¤é # ADI_SEC_CSTAT_t Éé Eê SID # PRIO # reserved16 # jê ê # VALUE32 # ê _ADI_SEC_CPND_t Eê # ADI_SEC_CPND_t jê äê SID # PRIO # reserved16 # ë ¢ê # VALUE32 # ,ë _ADI_SEC_CACT_t äê # ADI_SEC_CACT_t ë oë SEC_CPMSK_UNLOCK SEC_CPMSK_LOCK ADI_SEC_CPMSK_LOCK Aë Êë PRIO # reserved8 # LOCK # ïë ë # VALUE32 # ì _ADI_SEC_CPMSK_t Êë # ADI_SEC_CPMSK_t ïë Wì SEC_CGMSK_UNMASK SEC_CGMSK_MASK ADI_SEC_CGMSK_UGRP )ì ì SEC_CGMSK_UNLOCK SEC_CGMSK_LOCK ADI_SEC_CGMSK_LOCK pì í GRP # reserved4 # UGRP # reserved9 # LOCK # Dí ·ì # VALUE32 # hí _ADI_SEC_CGMSK_t í # ADI_SEC_CGMSK_t Dí ¬í SEC_CPLVL_UNLOCK SEC_CPLVL_LOCK ADI_SEC_CPLVL_LOCK ~í î PLVL # reserved3 # LOCK # ,î Åí # VALUE32 # Pî _ADI_SEC_CPLVL_t î # ADI_SEC_CPLVL_t ,î î SID # reserved8 # »î fî # VALUE32 # Þî _ADI_SEC_CSID_t î # ADI_SEC_CSID_t »î "ï SEC_SCTL_INT_DIS SEC_SCTL_INT_EN ADI_SEC_SCTL_IEN óî lï SEC_SCTL_FAULT_DIS SEC_SCTL_FAULT_EN ADI_SEC_SCTL_FEN 9ï ²ï SEC_SCTL_SRC_DIS SEC_SCTL_SRC_EN ADI_SEC_SCTL_SEN ï ôï SEC_SCTL_LEVEL SEC_SCTL_EDGE ADI_SEC_SCTL_ES Éï 9ð SEC_SCTL_ERR_DIS SEC_SCTL_ERR_EN ADI_SEC_SCTL_ERREN
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ð ~ð SEC_SCTL_UNLOCK SEC_SCTL_LOCK ADI_SEC_SCTL_LOCK Rð wñ IEN # FEN # SEN # ES # ERREN # reserved5 # PRIO # GRP # reserved20 # CTG # reserved28 # LOCK # ñ ð # VALUE32 # ¿ñ _ADI_SEC_SCTL_t wñ # ADI_SEC_SCTL_t ñ ò SEC_SSTAT_NO_ERR SEC_SSTAT_ERR ADI_SEC_SSTAT_ERR Ôñ Jò SEC_SSTAT_SOVFERR SEC_SSTAT_ENDERR ADI_SEC_SSTAT_ERRC ò ò SEC_SSTAT_NOTPENDING SEC_SSTAT_PENDING ADI_SEC_SSTAT_PND cò äò SEC_SSTAT_NO_SRC SEC_SSTAT_ACTIVE_SRC ADI_SEC_SSTAT_ACT °ò Èó reserved0 # ERR # reserved2 # ERRC # reserved6 # PND # ACT # reserved10 # CHID # reserved24 # íó üò # VALUE32 # ô _ADI_SEC_SSTAT_t Èó # ADI_SEC_SSTAT_t íó Nô SEC_FCTL_DIS SEC_FCTL_EN ADI_SEC_FCTL_EN 'ô ô SEC_FCTL_NO_RESET SEC_FCTL_RESET ADI_SEC_FCTL_RESET dô áô SEC_FCTL_FLTOUT_DIS SEC_FCTL_FLTOUT_EN ADI_SEC_FCTL_FOEN ¬ô .õ SEC_FCTL_TRGOUT_DIS SEC_FCTL_TRGOUT_EN ADI_SEC_FCTL_TOEN ùô {õ SEC_FCTL_SYSRST_DIS SEC_FCTL_SYSRST_EN ADI_SEC_FCTL_SREN Fõ Æõ SEC_FCTL_FLTIN_DIS SEC_FCTL_FLTIN_EN ADI_SEC_FCTL_FIEN õ ö SEC_FCTL_FLT_MODE SEC_FCTL_COP_MODE ADI_SEC_FCTL_CMS Þõ _ö SEC_FCTL_FLTACT_MODE SEC_FCTL_FLTPND_MODE ADI_SEC_FCTL_TES 'ö ¢ö SEC_FCTL_UNLOCK SEC_FCTL_LOCK ADI_SEC_FCTL_LOCK vö ÷ EN # RESET # reserved2 # FOEN # TOEN # SREN # FIEN # reserved8 # CMS # TES # reserved14 # LOCK # Â÷ ºö # VALUE32 # å÷ _ADI_SEC_FCTL_t ÷ # ADI_SEC_FCTL_t Â÷ 'ø SEC_FSTAT_NO_ERR SEC_FSTAT_ERR ADI_SEC_FSTAT_ERR ú÷ pø SEC_FSTAT_SOVFERR SEC_FSTAT_ENDERR ADI_SEC_FSTAT_ERRC ?ø ¼ø SEC_FSTAT_NO_FLTPND SEC_FSTAT_FLTPND ADI_SEC_FSTAT_PND ø ù SEC_FSTAT_NO_FLTACT SEC_FSTAT_FLTACT ADI_SEC_FSTAT_ACT Ôø Rù SEC_FSTAT_NO_NXTFLT SEC_FSTAT_NXTFLT ADI_SEC_FSTAT_NPND ù ú reserved0 # ERR # reserved2 # ERRC # reserved6 # PND # ACT # NPND # reserved11 # Eú kù # VALUE32 # iú _ADI_SEC_FSTAT_t ú # ADI_SEC_FSTAT_t Eú µú SEC_FSID_SRC_INTFLT SEC_FSID_SRC_EXTFLT ADI_SEC_FSID_FEXT ú %û SID # reserved8 # FEXT # reserved17 # Jû Íú # VALUE32 # mû _ADI_SEC_FSID_t %û # ADI_SEC_FSID_t Jû ¸û SEC_FEND_END_INTFLT SEC_FEND_END_EXTFLT ADI_SEC_FEND_FEXT û (ü SID # reserved8 # FEXT # reserved17 # Mü Ðû # VALUE32 # pü _ADI_SEC_FEND_t (ü # ADI_SEC_FEND_t Mü ¡ü COUNT # Æü
ü # VALUE32 # éü _ADI_SEC_FDLY_t ¡ü # ADI_SEC_FDLY_t Æü ý COUNT # ?ý þü # VALUE32 # fý _ADI_SEC_FDLY_CUR_t ý # ADI_SEC_FDLY_CUR_t ?ý ý COUNT # Àý ý # VALUE32 # åý _ADI_SEC_FSRDLY_t ý # ADI_SEC_FSRDLY_t Àý þ COUNT # =þ üý # VALUE32 # fþ _ADI_SEC_FSRDLY_CUR_t þ # ADI_SEC_FSRDLY_CUR_t =þ þ COUNT # Âþ þ # VALUE32 # æþ _ADI_SEC_FCOPP_t þ # ADI_SEC_FCOPP_t Âþ ÿ COUNT # =ÿ üþ # VALUE32 # eÿ _ADI_SEC_FCOPP_CUR_t ÿ # ADI_SEC_FCOPP_CUR_t =ÿ ¦ÿ SEC_GCTL_DIS SEC_GCTL_EN ADI_SEC_GCTL_EN ÿ ëÿ SEC_GCTL_NO_RESET SEC_GCTL_RESET ADI_SEC_GCTL_RESET ¼ÿ 0 SEC_GCTL_UNLOCK SEC_GCTL_LOCK ADI_SEC_GCTL_LOCK EN # RESET # reserved2 # LOCK # ¿ H # VALUE32 # â _ADI_SEC_GCTL_t # ADI_SEC_GCTL_t ¿ $ SEC_GSTAT_NO_ERR SEC_GSTAT_ERR ADI_SEC_GSTAT_ERR ÷ SEC_GSTAT_SFIERR SEC_GSTAT_SCIERR SEC_GSTAT_SSIERR ADI_SEC_GSTAT_ERRC < Ë SEC_GSTAT_NO_ADRERR SEC_GSTAT_ADRERR ADI_SEC_GSTAT_ADRERR SEC_GSTAT_NO_LWERR SEC_GSTAT_LWERR ADI_SEC_GSTAT_LWERR æ reserved0 # ERR # reserved2 # ERRC # reserved6 # SCI # reserved12 # SID # reserved24 # ADRERR # LWERR # 6 1 # VALUE32 # Z _ADI_SEC_GSTAT_t # ADI_SEC_GSTAT_t 6 SID # reserved8 # Å p # VALUE32 # é _ADI_SEC_RAISE_t # ADI_SEC_RAISE_t Å / SID # reserved8 # T ÿ # VALUE32 # v _ADI_SEC_END_t / # ADI_SEC_END_t T 3 MTR0 # reserved7 # MTR1 # reserved15 # MTR2 # reserved23 # MTR3 # reserved31 # X # VALUE32 # z _ADI_TRU_MTR_t 3 # ADI_TRU_MTR_t X À ADDR # reserved12 # å # VALUE32 # _ADI_TRU_ERRADDR_t À # ADI_TRU_ERRADDR_t å i LWERR # ADDRERR # reserved2 # # # VALUE32 # ± _ADI_TRU_STAT_t i # ADI_TRU_STAT_t ) EN # RESET # MTRL # reserved3 # LOCK # N Æ # VALUE32 # q _ADI_TRU_GCTL_t ) # ADI_TRU_GCTL_t N Ç SSR # reserved7 # LOCK # ì # VALUE32 # _ADI_TRU_SSR_t Ç # ADI_TRU_SSR_t ì ¦ GLCK # reserved8 # PINTEN # reserved15 # WPLCK # reserved17 # Ë " # VALUE32 # í _ADI_SPU_CTL_t ¦ # ADI_SPU_CTL_t Ë GLCK # reserved1 # VIRQ # reserved13 # ADDRERR # LWERR # ¥ # VALUE32 # È _ADI_SPU_STAT_t # ADI_SPU_STAT_t ¥
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reserved0 # SSECCLR # MSECCLR # reserved6 # SINTEN # reserved15 # SCRLCK # reserved17 # ´
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Ý # VALUE32 # Ü
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_ADI_SPU_SECURECTL_t
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# ADI_SPU_SECURECTL_t ´
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DATA # 6 ö
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# VALUE32 # ^ _ADI_SPU_SECURECHK_t # ADI_SPU_SECURECHK_t 6 ª CSEC0 # reserved1 # Ï x # VALUE32 # õ _ADI_SPU_SECUREC_t ª # ADI_SPU_SECUREC_t Ï O SSEC # MSEC # reserved2 # t # VALUE32 # _ADI_SPU_SECUREP_t O # ADI_SPU_SECUREP_t t CM0 # reserved1 # SM0 # SM1 # reserved18 # > ² # VALUE32 # _ _ADI_SPU_WP_t # ADI_SPU_WP_t > > SYSRST # RSTOUTASRT # RSTOUTDSRT # reserved3 # SRSTREQEN # CRSTREQEN # CRSTMSKSEL # reserved11 # LOCK # c r # VALUE32 #
_ADI_RCU_CTL_t > # ADI_RCU_CTL_t c ª HWRST # reserved1 # SSRST # SWRST # reserved4 # RSTOUT # reserved6 # BMODE # reserved12 # ADDRERR # LWERR # RSTOUTERR # reserved19 # Ï # VALUE32 # ò _ADI_RCU_STAT_t ª # ADI_RCU_STAT_t Ï X CR0 # CR1 # reserved2 # LOCK # } # VALUE32 # ¡ _ADI_RCU_CRCTL_t X # ADI_RCU_CRCTL_t } ÷ CR0 # CR1 # reserved2 # · # VALUE32 # A _ADI_RCU_CRSTAT_t ÷ # ADI_RCU_CRSTAT_t SRRQ # reserved4 # ® X # VALUE32 # Õ _ADI_RCU_SRRQSTAT_t # ADI_RCU_SRRQSTAT_t ® / SI0 # reserved1 # LOCK # T î # VALUE32 # x _ADI_RCU_SIDIS_t / # ADI_RCU_SIDIS_t T ¾ SI0 # reserved1 # ã # VALUE32 # _ADI_RCU_SISTAT_t ¾ # ADI_RCU_SISTAT_t ã c SVECT0 # reserved1 # LOCK # # VALUE32 # ° _ADI_RCU_SVECT_LCK_t c # ADI_RCU_SVECT_LCK_t NOKERNEL # NOVECTINIT # HALT # HBTOVW # NOMEMINIT # NOCACHE # NOFAULTS # reserved7 # NOPREBOOT # NOHOOK # reserved11 # NOL2CONFIG # IDLEONENTRY # reserved14 # LOCK # 5 Ê # VALUE32 # Y _ADI_RCU_BCODE_t # ADI_RCU_BCODE_t 5 VALUE # ° o # VALUE32 # Õ _ADI_RCU_SVECT0_t # ADI_RCU_SVECT0_t ° 1 ERRCODE # C0IDLE # reserved9 # C0L1INIT # reserved17 #
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L2INIT # L3INIT # HALTONAPP # HALTONINIT # HALTONCALL # HALTONERR # CALLAPP # CALLINIT # CALLBACK # CALLERR # V ì # VALUE32 # x _ADI_RCU_MSG_t 1 # ADI_RCU_MSG_t V Ì SET0 # SET1 # SET2 # SET3 # SET4 # SET5 # SET6 # SET7 # SET8 # SET9 # SET10 # SET11 # SET12 # SET13 # SET14 # SET15 # SET16 # SET17 # SET18 # SET19 # SET20 # SET21 #
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SET22 # SET23 # SET24 # SET25 # SET26 # SET27 # SET28 # SET29 # SET30 # SET31 # ñ # VALUE32 # _ADI_RCU_MSG_SET_t Ì # ADI_RCU_MSG_SET_t ñ o CLR0 # CLR1 # CLR2 # CLR3 # CLR4 # CLR5 # CLR6 # CLR7 # CLR8 # CLR9 # CLR10 # CLR11 # CLR12 # CLR13 # CLR14 # CLR15 # CLR16 # CLR17 # CLR18 # CLR19 # CLR20 # CLR21 #
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CLR22 # CLR23 # CLR24 # CLR25 # CLR26 # CLR27 # CLR28 # CLR29 # CLR30 # CLR31 # / # VALUE32 # º _ADI_RCU_MSG_CLR_t o # ADI_RCU_MSG_CLR_t w DF # reserved1 # MSEL # reserved15 # S1SELEXEN # reserved18 # WFI # LOCK # Ò # VALUE32 # ¾ _ADI_CGU_CTL_t w # ADI_CGU_CTL_t P PLLBPST # PLLBPCL # PLLDIS # PLLEN # reserved4 # LOCK # u Ò # VALUE32 # _ADI_CGU_PLLCTL_t P # ADI_CGU_PLLCTL_t u Ü PLLEN # PLLBP # PLOCK # CLKSALGN # reserved4 # OSCWDSTATFC # OSCWDSTATF # ADDRERR # LWERR # reserved18 # WDFMSERR # WDIVERR # PCFGERR #
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reserved22 #
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± # VALUE32 # $ _ADI_CGU_STAT_t Ü # ADI_CGU_STAT_t ÷ CSEL # S0SEL # SYSSEL # S1SEL # DSEL # reserved21 #
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OSEL # ALGN # UPDT # LOCK # ! 9 # VALUE32 # >! _ADI_CGU_DIV_t ÷ # ADI_CGU_DIV_t ! ! CLKOUTSEL # reserved5 # LOCK # ¾! R! # VALUE32 # æ! _ADI_CGU_CLKOUTSEL_t ! # ADI_CGU_CLKOUTSEL_t ¾! à" HODF # HODEN # CNGEN # BOUF # BOUEN # FAULTEN # MONDIS # reserved16 # FAULTPINDIS # reserved24 # LOCK # # " # VALUE32 # ,# _ADI_CGU_OSCWDCTL_t à" # ADI_CGU_OSCWDCTL_t # ¾# EN # LOAD # reserved2 # TSDIV # reserved8 # LOCK # ã# E# # VALUE32 # $ _ADI_CGU_TSCTL_t ¾# # ADI_CGU_TSCTL_t ã# 9$ VALUE # ^$ $ # VALUE32 #
$ _ADI_CGU_TSVALUE0_t 9$ # ADI_CGU_TSVALUE0_t ^$ º$ VALUE # ß$ $ # VALUE32 # % _ADI_CGU_TSVALUE1_t º$ # ADI_CGU_TSVALUE1_t ß$ ;% VALUE # `% % # VALUE32 # % _ADI_CGU_TSCOUNT0_t ;% # ADI_CGU_TSCOUNT0_t `% ¼% VALUE # á% % # VALUE32 # & _ADI_CGU_TSCOUNT1_t ¼% # ADI_CGU_TSCOUNT1_t á% d& CCBF0 # reserved1 # LOCK # & !& # VALUE32 # °& _ADI_CGU_CCBF_DIS_t d& # ADI_CGU_CCBF_DIS_t & û& CCBF0 # reserved1 # ' É& # VALUE32 # H' _ADI_CGU_CCBF_STAT_t û& # ADI_CGU_CCBF_STAT_t ' ã' SCLK0BF # SCLK1BF # DCLKBF # OUTCLKBF # reserved4 # LOCK # ( b' # VALUE32 # /( _ADI_CGU_SCBF_DIS_t ã' # ADI_CGU_SCBF_DIS_t ( ¶( SCLK0BF # SCLK1BF # DCLKBF # OCLKBF # reserved4 # Û( H( # VALUE32 # ) _ADI_CGU_SCBF_STAT_t ¶( # ADI_CGU_SCBF_STAT_t Û( h) reserved0 # S1SELEX # reserved24 # ) ) # VALUE32 # ±) _ADI_CGU_DIVEX_t h) # ADI_CGU_DIVEX_t ) * REV # MAJOR # reserved8 # .* Ç) # VALUE32 # R* _ADI_CGU_REVID_t * # ADI_CGU_REVID_t .* + DF # reserved1 # MSEL # reserved15 # S1SELEXEN # reserved18 # WFI # LOCK # 2+ h* # VALUE32 # Y+ _ADI_CGU_CFG0_CTL_t + # ADI_CGU_CFG0_CTL_t 2+ ð+ PLLBPST # PLLBPCL # PLLDIS # PLLEN # reserved4 # LOCK # , r+ # VALUE32 # ?, _ADI_CGU_CFG0_PLLCTL_t ð+ # ADI_CGU_CFG0_PLLCTL_t , - PLLEN # PLLBP # PLOCK # CLKSALGN # reserved4 # OSCWDSTATFC # OSCWDSTATF # ADDRERR # LWERR # reserved18 # WDFMSERR # WDIVERR # PCFGERR #
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reserved22 #
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«- [, # VALUE32 # Ó- _ADI_CGU_CFG0_STAT_t - # ADI_CGU_CFG0_STAT_t «- «. CSEL # S0SEL # SYSSEL # S1SEL # DSEL # reserved21 #
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OSEL # ALGN # UPDT # LOCK # Ð. í- # VALUE32 # ÷. _ADI_CGU_CFG0_DIV_t «. # ADI_CGU_CFG0_DIV_t Ð. W/ CLKOUTSEL # reserved5 # LOCK # |/ / # VALUE32 # ©/ _ADI_CGU_CFG0_CLKOUTSEL_t W/ # ADI_CGU_CFG0_CLKOUTSEL_t |/ ¨0 HODF # HODEN # CNGEN # BOUF # BOUEN # FAULTEN # MONDIS # reserved16 # FAULTPINDIS # reserved24 # LOCK # Í0 È/ # VALUE32 # ù0 _ADI_CGU_CFG0_OSCWDCTL_t ¨0 # ADI_CGU_CFG0_OSCWDCTL_t Í0 1 EN # LOAD # reserved2 # TSDIV # reserved8 # LOCK # µ1 1 # VALUE32 # Þ1 _ADI_CGU_CFG0_TSCTL_t 1 # ADI_CGU_CFG0_TSCTL_t µ1 2 VALUE # :2 ù1 # VALUE32 # f2 _ADI_CGU_CFG0_TSVALUE0_t 2 # ADI_CGU_CFG0_TSVALUE0_t :2 2 VALUE # Å2 2 # VALUE32 # ñ2 _ADI_CGU_CFG0_TSVALUE1_t 2 # ADI_CGU_CFG0_TSVALUE1_t Å2 +3 VALUE # P3 3 # VALUE32 # |3 _ADI_CGU_CFG0_TSCOUNT0_t +3 # ADI_CGU_CFG0_TSCOUNT0_t P3 ¶3 VALUE # Û3 3 # VALUE32 # 4 _ADI_CGU_CFG0_TSCOUNT1_t ¶3 # ADI_CGU_CFG0_TSCOUNT1_t Û3 h4 CCBF0 # reserved1 # LOCK # 4 %4 # VALUE32 # ¹4 _ADI_CGU_CFG0_CCBF_DIS_t h4 # ADI_CGU_CFG0_CCBF_DIS_t 4 5 CCBF0 # reserved1 # .5 ×4 # VALUE32 # [5 _ADI_CGU_CFG0_CCBF_STAT_t 5 # ADI_CGU_CFG0_CCBF_STAT_t .5 û5 SCLK0BF # SCLK1BF # DCLKBF # OUTCLKBF # reserved4 # LOCK # 6 z5 # VALUE32 # L6 _ADI_CGU_CFG0_SCBF_DIS_t û5 # ADI_CGU_CFG0_SCBF_DIS_t 6 Ø6 SCLK0BF # SCLK1BF # DCLKBF # OCLKBF # reserved4 # ý6 j6 # VALUE32 # *7 _ADI_CGU_CFG0_SCBF_STAT_t Ø6 # ADI_CGU_CFG0_SCBF_STAT_t ý6 7 reserved0 # S1SELEX # reserved24 # ¹7 I7 # VALUE32 # â7 _ADI_CGU_CFG0_DIVEX_t 7 # ADI_CGU_CFG0_DIVEX_t ¹7 ?8 REV # MAJOR # reserved8 # d8 ý7 # VALUE32 # 8 _ADI_CGU_CFG0_REVID_t ?8 # ADI_CGU_CFG0_REVID_t d8 M9 DF # reserved1 # MSEL # reserved15 # S1SELEXEN # reserved18 # WFI # LOCK # r9 ¨8 # VALUE32 # 9 _ADI_CGU_CFG1_CTL_t M9 # ADI_CGU_CFG1_CTL_t r9 0: PLLBPST # PLLBPCL # PLLDIS # PLLEN # reserved4 # LOCK # U: ²9 # VALUE32 # : _ADI_CGU_CFG1_PLLCTL_t 0: # ADI_CGU_CFG1_PLLCTL_t U: ; PLLEN # PLLBP # PLOCK # CLKSALGN # reserved4 # ADDRERR # LWERR # reserved18 # WDFMSERR # WDIVERR # PCFGERR #
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reserved22 #
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¼; : # VALUE32 # ä; _ADI_CGU_CFG1_STAT_t ; # ADI_CGU_CFG1_STAT_t ¼; ´< reserved0 # SYSSEL # reserved13 # DSEL # reserved21 #
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OSEL # ALGN # UPDT # LOCK # Ù< þ; # VALUE32 # = _ADI_CGU_CFG1_DIV_t ´< # ADI_CGU_CFG1_DIV_t Ù< = reserved0 # DCLKBF # OUTCLKBF # reserved4 # LOCK # = = # VALUE32 # Ù= _ADI_CGU_CFG1_SCBF_DIS_t = # ADI_CGU_CFG1_SCBF_DIS_t = S> reserved0 # DCLKBF # OCLKBF # reserved4 # x> ÷= # VALUE32 # ¥> _ADI_CGU_CFG1_SCBF_STAT_t S> # ADI_CGU_CFG1_SCBF_STAT_t x> ? REV # MAJOR # reserved8 # +? Ä> # VALUE32 # T? _ADI_CGU_CFG1_REVID_t ? # ADI_CGU_CFG1_REVID_t +? ï? CLKO0 # CLKO1 # reserved2 # ADRERR # LWERR # reserved18 # @ o? # VALUE32 # 7@ _ADI_CDU_STAT_t ï? # ADI_CDU_STAT_t @ @ CGU1 # reserved1 # LOCK # ³@ L@ # VALUE32 # Ú@ _ADI_CDU_CLKINSEL_t @ # ADI_CDU_CLKINSEL_t ³@ 5A REV # MAJOR # reserved8 # ZA ó@ # VALUE32 # ~A _ADI_CDU_REVID_t 5A # ADI_CDU_REVID_t ZA ÖA CDU_CFG_IN0 CDU_CFG_IN1 CDU_CFG_IN2 CDU_CFG_IN3 ADI_CDU_CFG_SEL A <B EN # SEL # reserved3 # LOCK # aB ìA # VALUE32 # B _ADI_CDU_CFG_t <B # ADI_CDU_CFG_t aB ÈB reserved0 # LOCK # íB B # VALUE32 # C _ADI_DPM_CTL_t ÈB # ADI_DPM_CTL_t íB ¨C CURMODE # PRVMODE # reserved8 # ADDRERR # LWERR # reserved18 # ÍC #C # VALUE32 # ðC _ADI_DPM_STAT_t ¨C # ADI_DPM_STAT_t ÍC 2D VALUE # LOCK # WD D # VALUE32 # ~D _ADI_DPM_PER_DIS0_t 2D # ADI_DPM_PER_DIS0_t WD ÛD VALUE # reserved19 # LOCK # E D # VALUE32 # 'E _ADI_DPM_PER_DIS1_t ÛD # ADI_DPM_PER_DIS1_t E E REV # MAJOR # reserved8 # §E @E # VALUE32 # ËE _ADI_DPM_REVID_t E # ADI_DPM_REVID_t §E F EN # RST # reserved2 # EF áE # VALUE32 # hF _ADI_SWU_GCTL_t F # ADI_SWU_GCTL_t EF ñG MTCH0 # MTCH1 # MTCH2 # MTCH3 # INT0 # INT1 # INT2 # INT3 # UNDRBW0 # OVRBW0 # UNDRBW1 # OVRBW1 # UNDRBW2 # OVRBW2 # UNDRBW3 # OVRBW3 # reserved16 # ADDRERR # reserved31 # H }F # VALUE32 # :H _ADI_SWU_GSTAT_t ñG # ADI_SWU_GSTAT_t H øI EN # DIR # ACMPM # IDCMPEN # SCMPEN # reserved6 # CNTEN # CNTRPTEN # reserved10 # DBGEN # INTEN # TRGEN # reserved15 # BWEN # BLENINC # MINACT # MAXACT # STALLCNTMODE # SCALE # DATACNTMODE # reserved25 # J PH # VALUE32 # ?J _ADI_SWU_CTL_t øI # ADI_SWU_CTL_t J nJ ADDR # J SJ # VALUE32 # ´J _ADI_SWU_LA_t nJ # ADI_SWU_LA_t J âJ ADDR # K ÇJ # VALUE32 # (K _ADI_SWU_UA_t âJ # ADI_SWU_UA_t K gK ID # IDMASK # K ;K # VALUE32 # K _ADI_SWU_ID_t gK # ADI_SWU_ID_t K óK COUNT # reserved16 # L ÀK # VALUE32 # :L _ADI_SWU_CNT_t óK # ADI_SWU_CNT_t L |L BWMIN # BWMAX # ¡L NL # VALUE32 # ÄL _ADI_SWU_TARG_t |L # ADI_SWU_TARG_t ¡L M BWHIST0 # BWHIST1 # 0M ÙL # VALUE32 # SM _ADI_SWU_HIST_t M # ADI_SWU_HIST_t 0M M CURCNT # CURBW # ¼M hM # VALUE32 # ÞM _ADI_SWU_CUR_t M # ADI_SWU_CUR_t ¼M N VALUE # 3N òM # VALUE32 # aN _ADI_DMA_CFG1_DSCPTR_NXT_t N # ADI_DMA_CFG1_DSCPTR_NXT_t 3N N VALUE # ÂN N # VALUE32 # ïN _ADI_DMA_CFG1_ADDRSTART_t N # ADI_DMA_CFG1_ADDRSTART_t ÂN P EN # WNR # SYNC # CADDR # PSIZE # reserved7 # MSIZE # reserved11 # FLOW # TWAIT # NDSIZE # reserved19 # INT #
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TRIG # TOVEN # DESCIDCPY # TWOD # reserved27 # PDRF # reserved29 # ¶P O # VALUE32 # ÝP _ADI_DMA_CFG1_CFG_t P # ADI_DMA_CFG1_CFG_t ¶P Q VALUE # 7Q öP # VALUE32 # _Q _ADI_DMA_CFG1_XCNT_t Q # ADI_DMA_CFG1_XCNT_t 7Q Q VALUE u # ºQ yQ # VALUE32 u # âQ _ADI_DMA_CFG1_XMOD_t Q # ADI_DMA_CFG1_XMOD_t ºQ R VALUE # =R üQ # VALUE32 # eR _ADI_DMA_CFG1_YCNT_t R # ADI_DMA_CFG1_YCNT_t =R R VALUE u # ÀR R # VALUE32 u # èR _ADI_DMA_CFG1_YMOD_t R # ADI_DMA_CFG1_YMOD_t ÀR S VALUE # CS S # VALUE32 # qS _ADI_DMA_CFG1_DSCPTR_CUR_t S # ADI_DMA_CFG1_DSCPTR_CUR_t CS ØS PDPO # reserved1 # DESCPPREV # ýS S # VALUE32 # +T _ADI_DMA_CFG1_DSCPTR_PRV_t ØS # ADI_DMA_CFG1_DSCPTR_PRV_t ýS gT VALUE # T KT # VALUE32 # ¸T _ADI_DMA_CFG1_ADDR_CUR_t gT # ADI_DMA_CFG1_ADDR_CUR_t T õU IRQDONE # IRQERR # PIRQ # reserved3 # ERRC # reserved7 # RUN # reserved11 # PBWID # MBWID # FIFOFILL # reserved19 # TWAIT # reserved21 # V ÖT # VALUE32 # BV _ADI_DMA_CFG1_STAT_t õU # ADI_DMA_CFG1_STAT_t V xV VALUE # V \V # VALUE32 # ÉV _ADI_DMA_CFG1_XCNT_CUR_t xV # ADI_DMA_CFG1_XCNT_CUR_t V W VALUE # (W çV # VALUE32 # TW _ADI_DMA_CFG1_YCNT_CUR_t W # ADI_DMA_CFG1_YCNT_CUR_t (W ¥W VALUE # reserved16 # ÊW rW # VALUE32 # ôW _ADI_DMA_CFG1_BWLCNT_t ¥W # ADI_DMA_CFG1_BWLCNT_t ÊW CX VALUE # reserved16 # hX X # VALUE32 # X _ADI_DMA_CFG1_BWLCNT_CUR_t CX # ADI_DMA_CFG1_BWLCNT_CUR_t hX ÒX VALUE # ÷X ¶X # VALUE32 # !Y _ADI_DMA_CFG1_BWMCNT_t ÒX # ADI_DMA_CFG1_BWMCNT_t ÷X YY VALUE # ~Y =Y # VALUE32 # ¬Y _ADI_DMA_CFG1_BWMCNT_CUR_t YY # ADI_DMA_CFG1_BWMCNT_CUR_t ~Y èY VALUE # Z ÌY # VALUE32 # ;Z _ADI_DMA_CFG2_DSCPTR_NXT_t èY # ADI_DMA_CFG2_DSCPTR_NXT_t Z wZ VALUE # Z [Z # VALUE32 # ÉZ _ADI_DMA_CFG2_ADDRSTART_t wZ # ADI_DMA_CFG2_ADDRSTART_t Z k\ EN # WNR # SYNC # CADDR # PSIZE # reserved7 # MSIZE # reserved11 # FLOW # TWAIT # NDSIZE # reserved19 # INT #
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TRIG # TOVEN # DESCIDCPY # TWOD # reserved27 # PDRF # reserved29 # \ èZ # VALUE32 # ·\ _ADI_DMA_CFG2_CFG_t k\ # ADI_DMA_CFG2_CFG_t \ ì\ VALUE # ] Ð\ # VALUE32 # 9] _ADI_DMA_CFG2_XCNT_t ì\ # ADI_DMA_CFG2_XCNT_t ] o] VALUE u # ] S] # VALUE32 u # ¼] _ADI_DMA_CFG2_XMOD_t o] # ADI_DMA_CFG2_XMOD_t ] ò] VALUE # ^ Ö] # VALUE32 # ?^ _ADI_DMA_CFG2_YCNT_t ò] # ADI_DMA_CFG2_YCNT_t ^ u^ VALUE u # ^ Y^ # VALUE32 u # Â^ _ADI_DMA_CFG2_YMOD_t u^ # ADI_DMA_CFG2_YMOD_t ^ ø^ VALUE # _ Ü^ # VALUE32 # K_ _ADI_DMA_CFG2_DSCPTR_CUR_t ø^ # ADI_DMA_CFG2_DSCPTR_CUR_t _ ²_ PDPO # reserved1 # DESCPPREV # ×_ k_ # VALUE32 # ` _ADI_DMA_CFG2_DSCPTR_PRV_t ²_ # ADI_DMA_CFG2_DSCPTR_PRV_t ×_ A` VALUE # f` %` # VALUE32 # ` _ADI_DMA_CFG2_ADDR_CUR_t A` # ADI_DMA_CFG2_ADDR_CUR_t f` Ïa IRQDONE # IRQERR # PIRQ # reserved3 # ERRC # reserved7 # RUN # reserved11 # PBWID # MBWID # FIFOFILL # reserved19 # TWAIT # reserved21 # ôa °` # VALUE32 # b _ADI_DMA_CFG2_STAT_t Ïa # ADI_DMA_CFG2_STAT_t ôa Rb VALUE # wb 6b # VALUE32 # £b _ADI_DMA_CFG2_XCNT_CUR_t Rb # ADI_DMA_CFG2_XCNT_CUR_t wb Ýb VALUE # c Áb # VALUE32 # .c _ADI_DMA_CFG2_YCNT_CUR_t Ýb # ADI_DMA_CFG2_YCNT_CUR_t c c VALUE # reserved16 # ¤c Lc # VALUE32 # Îc _ADI_DMA_CFG2_BWLCNT_t c # ADI_DMA_CFG2_BWLCNT_t ¤c d VALUE # reserved16 # Bd êc # VALUE32 # pd _ADI_DMA_CFG2_BWLCNT_CUR_t d # ADI_DMA_CFG2_BWLCNT_CUR_t Bd ¬d VALUE # Ñd d # VALUE32 # ûd _ADI_DMA_CFG2_BWMCNT_t ¬d # ADI_DMA_CFG2_BWMCNT_t Ñd 3e VALUE # Xe e # VALUE32 # e _ADI_DMA_CFG2_BWMCNT_CUR_t 3e # ADI_DMA_CFG2_BWMCNT_CUR_t Xe Âe VALUE # çe ¦e # VALUE32 # f _ADI_DMA_CFG3_DSCPTR_NXT_t Âe # ADI_DMA_CFG3_DSCPTR_NXT_t çe Qf VALUE # vf 5f # VALUE32 # £f _ADI_DMA_CFG3_ADDRSTART_t Qf # ADI_DMA_CFG3_ADDRSTART_t vf Eh EN # WNR # SYNC # CADDR # PSIZE # reserved7 # MSIZE # reserved11 # FLOW # TWAIT # NDSIZE # reserved19 # INT #
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TRIG # TOVEN # DESCIDCPY # TWOD # reserved27 # PDRF # reserved29 # jh Âf # VALUE32 # h _ADI_DMA_CFG3_CFG_t Eh # ADI_DMA_CFG3_CFG_t jh Æh VALUE # ëh ªh # VALUE32 # i _ADI_DMA_CFG3_XCNT_t Æh # ADI_DMA_CFG3_XCNT_t ëh Ii VALUE u # ni -i # VALUE32 u # i _ADI_DMA_CFG3_XMOD_t Ii # ADI_DMA_CFG3_XMOD_t ni Ìi VALUE # ñi °i # VALUE32 # j _ADI_DMA_CFG3_YCNT_t Ìi # ADI_DMA_CFG3_YCNT_t ñi Oj VALUE u # tj 3j # VALUE32 u # j _ADI_DMA_CFG3_YMOD_t Oj # ADI_DMA_CFG3_YMOD_t tj Òj VALUE # ÷j ¶j # VALUE32 # %k _ADI_DMA_CFG3_DSCPTR_CUR_t Òj # ADI_DMA_CFG3_DSCPTR_CUR_t ÷j k PDPO # reserved1 # DESCPPREV # ±k Ek # VALUE32 # ßk _ADI_DMA_CFG3_DSCPTR_PRV_t k # ADI_DMA_CFG3_DSCPTR_PRV_t ±k l VALUE # @l ÿk # VALUE32 # ll _ADI_DMA_CFG3_ADDR_CUR_t l # ADI_DMA_CFG3_ADDR_CUR_t @l ©m IRQDONE # IRQERR # PIRQ # reserved3 # ERRC # reserved7 # RUN # reserved11 # PBWID # MBWID # FIFOFILL # reserved19 # TWAIT # reserved21 # Îm l # VALUE32 # öm _ADI_DMA_CFG3_STAT_t ©m # ADI_DMA_CFG3_STAT_t Îm ,n VALUE # Qn n # VALUE32 # }n _ADI_DMA_CFG3_XCNT_CUR_t ,n # ADI_DMA_CFG3_XCNT_CUR_t Qn ·n VALUE # Ün n # VALUE32 # o _ADI_DMA_CFG3_YCNT_CUR_t ·n # ADI_DMA_CFG3_YCNT_CUR_t Ün Yo VALUE # reserved16 # ~o &o # VALUE32 # ¨o _ADI_DMA_CFG3_BWLCNT_t Yo # ADI_DMA_CFG3_BWLCNT_t ~o ÷o VALUE # reserved16 # p Äo # VALUE32 # Jp _ADI_DMA_CFG3_BWLCNT_CUR_t ÷o # ADI_DMA_CFG3_BWLCNT_CUR_t p p VALUE # «p jp # VALUE32 # Õp _ADI_DMA_CFG3_BWMCNT_t p # ADI_DMA_CFG3_BWMCNT_t «p q VALUE # 2q ñp # VALUE32 # `q _ADI_DMA_CFG3_BWMCNT_CUR_t q # ADI_DMA_CFG3_BWMCNT_CUR_t 2q q VALUE # Áq q # VALUE32 # ïq _ADI_DMA_CFG4_DSCPTR_NXT_t q # ADI_DMA_CFG4_DSCPTR_NXT_t Áq +r VALUE # Pr r # VALUE32 # }r _ADI_DMA_CFG4_ADDRSTART_t +r # ADI_DMA_CFG4_ADDRSTART_t Pr t EN # WNR # SYNC # CADDR # PSIZE # reserved7 # MSIZE # reserved11 # FLOW # TWAIT # NDSIZE # reserved19 # INT #
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TRIG # TOVEN # DESCIDCPY # TWOD # reserved27 # PDRF # reserved29 # Dt r # VALUE32 # kt _ADI_DMA_CFG4_CFG_t t # ADI_DMA_CFG4_CFG_t Dt t VALUE # Åt t # VALUE32 # ít _ADI_DMA_CFG4_XCNT_t t # ADI_DMA_CFG4_XCNT_t Åt #u VALUE u # Hu u # VALUE32 u # pu _ADI_DMA_CFG4_XMOD_t #u # ADI_DMA_CFG4_XMOD_t Hu ¦u VALUE # Ëu u # VALUE32 # óu _ADI_DMA_CFG4_YCNT_t ¦u # ADI_DMA_CFG4_YCNT_t Ëu )v VALUE u # Nv v # VALUE32 u # vv _ADI_DMA_CFG4_YMOD_t )v # ADI_DMA_CFG4_YMOD_t Nv ¬v VALUE # Ñv v # VALUE32 # ÿv _ADI_DMA_CFG4_DSCPTR_CUR_t ¬v # ADI_DMA_CFG4_DSCPTR_CUR_t Ñv fw PDPO # reserved1 # DESCPPREV # w w # VALUE32 # ¹w _ADI_DMA_CFG4_DSCPTR_PRV_t fw # ADI_DMA_CFG4_DSCPTR_PRV_t w õw VALUE # x Ùw # VALUE32 # Fx _ADI_DMA_CFG4_ADDR_CUR_t õw # ADI_DMA_CFG4_ADDR_CUR_t x y IRQDONE # IRQERR # PIRQ # reserved3 # ERRC # reserved7 # RUN # reserved11 # PBWID # MBWID # FIFOFILL # reserved19 # TWAIT # reserved21 # ¨y dx # VALUE32 # Ðy _ADI_DMA_CFG4_STAT_t y # ADI_DMA_CFG4_STAT_t ¨y z VALUE # +z êy # VALUE32 # Wz _ADI_DMA_CFG4_XCNT_CUR_t z # ADI_DMA_CFG4_XCNT_CUR_t +z z VALUE # ¶z uz # VALUE32 # âz _ADI_DMA_CFG4_YCNT_CUR_t z # ADI_DMA_CFG4_YCNT_CUR_t ¶z 3{ VALUE # reserved16 # X{ { # VALUE32 # { _ADI_DMA_CFG4_BWLCNT_t 3{ # ADI_DMA_CFG4_BWLCNT_t X{ Ñ{ VALUE # reserved16 # ö{ { # VALUE32 # $| _ADI_DMA_CFG4_BWLCNT_CUR_t Ñ{ # ADI_DMA_CFG4_BWLCNT_CUR_t ö{ `| VALUE #
| D| # VALUE32 # ¯| _ADI_DMA_CFG4_BWMCNT_t `| # ADI_DMA_CFG4_BWMCNT_t
| ç| VALUE # } Ë| # VALUE32 # :} _ADI_DMA_CFG4_BWMCNT_CUR_t ç| # ADI_DMA_CFG4_BWMCNT_CUR_t } Q~ EN # reserved1 # CLK # PEN # reserved6 # LKSTAT # reserved8 # ASYRETRY # reserved13 # CTLRETRY # FCNT # reserved18 # v~ Z} # VALUE32 # ~ _ADI_MLB_CTL0_t Q~ # ADI_MLB_CTL0_t v~ È~ MCS # í~ ®~ # VALUE32 # _ADI_MLB_MS0_t È~ # ADI_MLB_MS0_t í~ = MCS # b # # VALUE32 # _ADI_MLB_MS1_t = # ADI_MLB_MS1_t b 7 RSTSYSCMD # LKSYSCMD # ULKSYSCMD # CSSYSCMD # SWSYSCMD # SERVREQ # reserved6 # \ # VALUE32 # ~ _ADI_MLB_MSS_t 7 # ADI_MLB_MSS_t \ Ü SD0 # SD1 # SD2 # SD3 # # VALUE32 # # _ADI_MLB_MSD_t Ü # ADI_MLB_MSD_t ¬ ISOCPE # ISOCBUFO # reserved2 # SYNCPE # ARXDONE # ARXPE # ARXBREAK # ATXDONE # ATXPE #
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ATXBREAK # reserved23 # CRXDONE # CRXPE # CRXBREAK # CTXDONE # CTXPE # CTXBREAK # reserved30 # Ñ 7 # VALUE32 # ô _ADI_MLB_MIEN_t ¬ # ADI_MLB_MIEN_t Ñ j reserved0 # CLKOUTEN # CLKOUTSEL # reserved3 # # VALUE32 # ² _ADI_MLB_GCTL_t j # ADI_MLB_GCTL_t 0 reserved0 # LOCK # CLKM # NDA # reserved16 # U Ç # VALUE32 # x _ADI_MLB_CTL1_t 0 # ADI_MLB_CTL1_t U õ RST0 # RST1 # reserved2 # EN # reserved16 #
# VALUE32 # =
_ADI_MLB_HCTL_t õ # ADI_MLB_HCTL_t
l
CHM #
R
# VALUE32 # µ
_ADI_MLB_HCMR0_t l
# ADI_MLB_HCMR0_t
å
CHM #
|
Ë
# VALUE32 # . _ADI_MLB_HCMR1_t å
# ADI_MLB_HCMR1_t
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_ CERR # D # VALUE32 # ¨ _ADI_MLB_HCER0_t _ # ADI_MLB_HCER0_t Ù CERR # þ ¾ # VALUE32 # " _ADI_MLB_HCER1_t Ù # ADI_MLB_HCER1_t þ R CHB # w 8 # VALUE32 # _ADI_MLB_HCBR0_t R # ADI_MLB_HCBR0_t w Ë CHB # ð ± # VALUE32 # _ADI_MLB_HCBR1_t Ë # ADI_MLB_HCBR1_t ð E DATA # j * # VALUE32 # _ADI_MLB_MDAT0_t E # ADI_MLB_MDAT0_t j ¿ DATA # ä ¤ # VALUE32 # _ADI_MLB_MDAT1_t ¿ # ADI_MLB_MDAT1_t ä 9 DATA # ^ # VALUE32 # _ADI_MLB_MDAT2_t 9 # ADI_MLB_MDAT2_t ^ ³ DATA # Ø # VALUE32 # ü _ADI_MLB_MDAT3_t ³ # ADI_MLB_MDAT3_t Ø , MSK # Q # VALUE32 # u _ADI_MLB_MDWE0_t , # ADI_MLB_MDWE0_t Q ¥ MSK # Ê # VALUE32 # î _ADI_MLB_MDWE1_t ¥ # ADI_MLB_MDWE1_t Ê MSK # C # VALUE32 # g _ADI_MLB_MDWE2_t # ADI_MLB_MDWE2_t C MSK # ¼ } # VALUE32 # à _ADI_MLB_MDWE3_t # ADI_MLB_MDWE3_t ¼ ' XCMP # reserved1 # L ö # VALUE32 # o _ADI_MLB_MCTL_t ' # ADI_MLB_MCTL_t L è ADDRL # ADDRH # reserved16 # TB # WNR # # VALUE32 # 0 _ADI_MLB_MADR_t è # ADI_MLB_MADR_t ¿ SCE # SMX # DMAMODE # reserved3 # MPB # reserved5 # ä E # VALUE32 # _ADI_MLB_ACTL_t ¿ # ADI_MLB_ACTL_t ä 6 CHS # [ # VALUE32 # _ADI_MLB_ACSR0_t 6 # ADI_MLB_ACSR0_t [ ¯ CHS # Ô # VALUE32 # ø _ADI_MLB_ACSR1_t ¯ # ADI_MLB_ACSR1_t Ô ( CHM # M # VALUE32 # q _ADI_MLB_ACMR0_t ( # ADI_MLB_ACMR0_t M ¡ CHM # Æ # VALUE32 # ê _ADI_MLB_ACMR1_t ¡ # ADI_MLB_ACMR1_t Æ 5 PREAMBLE # reserved8 # Z # VALUE32 # } _ADI_MEC_CID0_t 5 # ADI_MEC_CID0_t Z ¹ MEC_CID1_CS MEC_CID1_SYS ADI_MEC_CID1_COMPCLASS ! PREAMBLE # COMPCLASS # reserved8 # F Ö # VALUE32 # i _ADI_MEC_CID1_t ! # ADI_MEC_CID1_t F ³ PREAMBLE # reserved8 # Ø ~ # VALUE32 # û _ADI_MEC_CID2_t ³ # ADI_MEC_CID2_t Ø E PREAMBLE # reserved8 # j # VALUE32 # _ADI_MEC_CID3_t E # ADI_MEC_CID3_t j Ú MEC_EEIRQ_GCTL_UNLOCK MEC_EEIRQ_GCTL_LOCK ADI_MEC_EEIRQ_GCTL_LOCK ¢ ; VALUE # reserved1 # LOCK # ` ø # VALUE32 # _ADI_MEC_EEIRQ_GCTL_t ; # ADI_MEC_EEIRQ_GCTL_t ` á MEC_EEIRQ_GSTAT_NO_LWERR MEC_EEIRQ_GSTAT_LWERR ADI_MEC_EEIRQ_GSTAT_LWERR ¤ E VALUE # reserved1 # LWERR # j # VALUE32 # _ADI_MEC_EEIRQ_GSTAT_t E # ADI_MEC_EEIRQ_GSTAT_t j Õ MEC_ECCERR_CTL_L2CTL_ERR ADI_MEC_ECCERR_CTL_VALUE ° , MEC_ECCERR_CTL_UNLOCK MEC_ECCERR_CTL_LOCK ADI_MEC_ECCERR_CTL_LOCK ô VALUE # reserved1 # LOCK # ² J # VALUE32 # Û _ADI_MEC_ECCERR_CTL_t # ADI_MEC_ECCERR_CTL_t ² MEC_ECCERR_STAT_L2CTL_ERR ADI_MEC_ECCERR_STAT_VALUE ö y MEC_ECCERR_STAT_NO_LWERR MEC_ECCERR_STAT_LWERR ADI_MEC_ECCERR_STAT_LWERR < Ý VALUE # reserved1 # LWERR # # VALUE32 # , _ADI_MEC_ECCERR_STAT_t Ý # ADI_MEC_ECCERR_STAT_t o MEC_ECCERR_IMASK_L2CTL_ERR ADI_MEC_ECCERR_IMASK_VALUE H Ì MEC_ECCERR_IMASK_UNLOCK MEC_ECCERR_IMASK_LOCK ADI_MEC_ECCERR_IMASK_LOCK / VALUE # reserved1 # LOCK # T ì # VALUE32 # _ADI_MEC_ECCERR_IMASK_t / # ADI_MEC_ECCERR_IMASK_t T Ð CLRSTAT # reserved1 # õ # VALUE32 # _ADI_MEC_CLR_t Ð # ADI_MEC_CLR_t õ c MEC_PEIRQ_GCTL_UNLOCK MEC_PEIRQ_GCTL_LOCK ADI_MEC_PEIRQ_GCTL_LOCK + Ä VALUE # reserved2 # LOCK # é # VALUE32 # _ADI_MEC_PEIRQ_GCTL_t Ä # ADI_MEC_PEIRQ_GCTL_t é j MEC_PEIRQ_GSTAT_NO_LWERR MEC_PEIRQ_GSTAT_LWERR ADI_MEC_PEIRQ_GSTAT_LWERR - Î VALUE # reserved2 # LWERR # ó # VALUE32 # _ADI_MEC_PEIRQ_GSTAT_t Î # ADI_MEC_PEIRQ_GSTAT_t ó 6 MEC_PERR_CTL_C0_L1_PE MEC_PERR_CTL_C0_L1CH_PE MEC_PERR_CTL_BTB_PE MEC_PERR_CTL_ARC0_PE MEC_PERR_CTL_ARC1_PE MEC_PERR_CTL_ARC2_PE MEC_PERR_CTL_ARC3_PE À MEC_PERR_CTL_ARC4_PE MEC_PERR_CTL_ARC5_PE MEC_PERR_CTL_ARC6_PE MEC_PERR_CTL_ARC7_PE MEC_PERR_CTL_IIR0_PE MEC_PERR_CTL_FIR0_PE MEC_PERR_CTL_TRG0_PE À MEC_PERR_CTL_PKA0_PE MEC_PERR_CTL_SPE0_BUF_PE MEC_PERR_CTL_SPE0_ARC4_PE MEC_PERR_CTL_MLB0_DT_PE MEC_PERR_CTL_MLB0_CH_PE MEC_PERR_CTL_TMC0_PE ADI_MEC_PERR_CTL_VALUE 9 MEC_PERR_CTL_UNLOCK MEC_PERR_CTL_LOCK ADI_MEC_PERR_CTL_LOCK S ç VALUE # reserved20 # LOCK # £ # VALUE32 # 3 _ADI_MEC_PERR_CTL_t ç # ADI_MEC_PERR_CTL_t MEC_PERR_STAT_C0_L1_PE_ST MEC_PERR_STAT_C0_L1CH_PE_ST MEC_PERR_STAT_BTB_PE_ST MEC_PERR_STAT_ARC0_PE_ST MEC_PERR_STAT_ARC1_PE_ST MEC_PERR_STAT_ARC2_PE_ST MEC_PERR_STAT_ARC3_PE_ST À MEC_PERR_STAT_ARC4_PE_ST MEC_PERR_STAT_ARC5_PE_ST MEC_PERR_STAT_ARC6_PE_ST MEC_PERR_STAT_ARC7_PE_ST MEC_PERR_STAT_IIR0_PE_ST MEC_PERR_STAT_FIR0_PE_ST MEC_PERR_STAT_TRG0_PE_ST À MEC_PERR_STAT_PKA0_PE_ST MEC_PERR_STAT_SPE0_BUF_PE_ST MEC_PERR_STAT_SPE0_ARC4_PE_ST MEC_PERR_STAT_MLB0_DT_PE_ST MEC_PERR_STAT_MLB0_CH_PE_ST MEC_PERR_STAT_TMC0_PE_ST ADI_MEC_PERR_STAT_VALUE L ð MEC_PERR_STAT_NO_LWERR MEC_PERR_STAT_LWERR ADI_MEC_PERR_STAT_LWERR · S¡ VALUE # reserved20 # LWERR # x¡ ¡ # VALUE32 # ¡ _ADI_MEC_PERR_STAT_t S¡ # ADI_MEC_PERR_STAT_t x¡ ߣ MEC_PERR_IMASK_C0_L1_PE MEC_PERR_IMASK_C0_L1CH_PE MEC_PERR_IMASK_BTB_PE MEC_PERR_IMASK_ARC0_PE MEC_PERR_IMASK_ARC1_PE MEC_PERR_IMASK_ARC2_PE MEC_PERR_IMASK_ARC3_PE À MEC_PERR_IMASK_ARC4_PE MEC_PERR_IMASK_ARC5_PE MEC_PERR_IMASK_ARC6_PE MEC_PERR_IMASK_ARC7_PE MEC_PERR_IMASK_IIR0_PE MEC_PERR_IMASK_FIR0_PE MEC_PERR_IMASK_TRG0_PE À MEC_PERR_IMASK_PKA0_PE MEC_PERR_IMASK_SPE0_BUF_PE MEC_PERR_IMASK_SPE0_ARC4_PE MEC_PERR_IMASK_MLB0_DT_PE MEC_PERR_IMASK_MLB0_CH_PE MEC_PERR_IMASK_TMC0_PE ADI_MEC_PERR_IMASK_VALUE º¡ 6¤ MEC_PERR_IMASK_UNLOCK MEC_PERR_IMASK_LOCK ADI_MEC_PERR_IMASK_LOCK þ£ ¤ VALUE # reserved20 # LOCK # ½¤ T¤ # VALUE32 # æ¤ _ADI_MEC_PERR_IMASK_t ¤ # ADI_MEC_PERR_IMASK_t ½¤ G¥ JEP106CC # SIZE # reserved8 # l¥ ¥ # VALUE32 # ¥ _ADI_MEC_PID4_t G¥ # ADI_MEC_PID4_t l¥ Ú¥ FUTUREUSE # reserved8 # ÿ¥ ¤¥ # VALUE32 # "¦ _ADI_MEC_PID5_t Ú¥ # ADI_MEC_PID5_t ÿ¥ m¦ FUTUREUSE # reserved8 # ¦ 7¦ # VALUE32 # µ¦ _ADI_MEC_PID6_t m¦ # ADI_MEC_PID6_t ¦ § FUTUREUSE # reserved8 # %§ ʦ # VALUE32 # H§ _ADI_MEC_PID7_t § # ADI_MEC_PID7_t %§ § PARTNUM # reserved8 # ¶§ ]§ # VALUE32 # Ù§ _ADI_MEC_PID0_t § # ADI_MEC_PID0_t ¶§ 7¨ PARTNUM # JEP106IC # reserved8 # \¨ î§ # VALUE32 # ¨ _ADI_MEC_PID1_t 7¨ # ADI_MEC_PID1_t \¨ ï¨ JEP106IC # JEDECASGN # REV # reserved8 # © ¨ # VALUE32 # 7© _ADI_MEC_PID2_t ï¨ # ADI_MEC_PID2_t © © CUSTMOD # REVAND # reserved8 # ¸© L© # VALUE32 # Û© _ADI_MEC_PID3_t © # ADI_MEC_PID3_t ¸© Y« BLKEN # reserved1 # OPMODE # AUTOCLRZ # AUTOCLRF # reserved10 # OBRSTALL # IRRSTALL # reserved14 # BITMIRR # BYTMIRR # W16SWP # FDSEL # RSLTMIRR # POLYMIRR #
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CMPMIRR # reserved23 # ~« ð© # VALUE32 # « _ADI_CRC_CTL_t Y« # ADI_CRC_CTL_t ~« Ы VALUE # õ« ´« # VALUE32 # ¬ _ADI_CRC_DCNT_t Ы # ADI_CRC_DCNT_t õ« I¬ VALUE # n¬ -¬ # VALUE32 # ¬ _ADI_CRC_DCNTRLD_t I¬ # ADI_CRC_DCNTRLD_t n¬ Ȭ VALUE # í¬ ¬¬ # VALUE32 # _ADI_CRC_COMP_t Ȭ # ADI_CRC_COMP_t í¬ A VALUE # f % # VALUE32 # _ADI_CRC_FILLVAL_t A # ADI_CRC_FILLVAL_t f À VALUE # å ¤ # VALUE32 # ® _ADI_CRC_DFIFO_t À # ADI_CRC_DFIFO_t å V® CRC_INEN_CMPERR_MSK CRC_INEN_CMPERR_UMSK ADI_CRC_INEN_CMPERR ® ©® CRC_INEN_DCNTEXP_MSK CRC_INEN_DCNTEXP_UMSK ADI_CRC_INEN_DCNTEXP p® 7¯ reserved0 # CMPERR # reserved2 # DCNTEXP # reserved5 # \¯ Ä® # VALUE32 # ¯ _ADI_CRC_INEN_t 7¯ # ADI_CRC_INEN_t \¯ ° reserved0 # CMPERR # reserved2 # DCNTEXP # reserved5 # ,° ¯ # VALUE32 # S° _ADI_CRC_INEN_SET_t ° # ADI_CRC_INEN_SET_t ,° ß° reserved0 # CMPERR # reserved2 # DCNTEXP # reserved5 # ± l° # VALUE32 # +± _ADI_CRC_INEN_CLR_t ß° # ADI_CRC_INEN_CLR_t ± `± VALUE #
± D± # VALUE32 # ¨± _ADI_CRC_POLY_t `± # ADI_CRC_POLY_t
± ² reserved0 # CMPERR # reserved2 # DCNTEXP # reserved5 # IBR # OBR # IRR # LUTDONE # FSTAT # reserved23 # ² ½± # VALUE32 # å² _ADI_CRC_STAT_t ² # ADI_CRC_STAT_t ² ³ VALUE # ;³ ú² # VALUE32 # a³ _ADI_CRC_DCNTCAP_t ³ # ADI_CRC_DCNTCAP_t ;³ ³ VALUE # º³ y³ # VALUE32 # ã³ _ADI_CRC_RESULT_FIN_t ³ # ADI_CRC_RESULT_FIN_t º³ ´ VALUE # ?´ þ³ # VALUE32 # h´ _ADI_CRC_RESULT_CUR_t ´ # ADI_CRC_RESULT_CUR_t ?´ Ë´ DPORT_RANGE_SELECT # IPORT_RANGE_SELECT # ð´ ´ # VALUE32 # #µ _ADI_MISCREG_PFB_RANGE_SELECT_t Ë´ # ADI_MISCREG_PFB_RANGE_SELECT_t ð´ {µ FIR_CTL1_TONEAREST FIR_CTL1_TRUNCATE ADI_FIR_CTL1_RND Hµ Àµ FIR_CTL1_RELEASE FIR_CTL1_PAUSE ADI_FIR_CTL1_HALT µ
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¶ FIR_CTL1_LEGACY FIR_CTL1_AUTOCONFIG ADI_FIR_CTL1_ACM ص &· EN # CH # BURSTEN # reserved7 # DMAEN # CAI # reserved10 # CCINTR # FXD # TC # RND # reserved15 # HALT # ACM # K· !¶ # VALUE32 # n· _ADI_FIR_CTL1_t &· # ADI_FIR_CTL1_t K· Z¸ CPLD # CLD # DLD # PPGS # WRBK # WDONE # ACDONE # CURCHNL # CURITER # HALT_STAT # reserved15 # ¸ · # VALUE32 # ¥¸ _ADI_FIR_DMASTAT_t Z¸ # ADI_FIR_DMASTAT_t ¸ ~º MRZ0 # MRI0 # MINV0 # ARZ0 # ARI0 # AINV0 # MRZ1 # MRI1 # MINV1 # ARZ1 # ARI1 # AINV1 # MRZ2 # MRI2 # MINV2 # ARZ2 # ARI2 # AINV2 # MRZ3 # MRI3 # MINV3 # ARZ3 #
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ARI3 # AINV3 # reserved24 # £º ½¸ # VALUE32 # ɺ _ADI_FIR_MACSTAT_t ~º # ADI_FIR_MACSTAT_t £º i» EN # HLD # RUN # reserved3 # MEM # ADRINC # reserved6 # » Ạ# VALUE32 # ´» _ADI_FIR_DBG_CTL_t i» # ADI_FIR_DBG_CTL_t » ÿ» VALUE # reserved11 # $¼ Ì» # VALUE32 # K¼ _ADI_FIR_DBG_ADDR_t ÿ» # ADI_FIR_DBG_ADDR_t $¼ ¼ VALUE # ¥¼ d¼ # VALUE32 # ͼ _ADI_FIR_DBG_WRDAT_t ¼ # ADI_FIR_DBG_WRDAT_t ¥¼ ½ VALUE # (½ ç¼ # VALUE32 # P½ _ADI_FIR_DBG_RDDAT_t ½ # ADI_FIR_DBG_RDDAT_t (½ ¼½ FIR_CTL2_LEVEL0 FIR_CTL2_LEVEL1 FIR_CTL2_LEVEL2 FIR_CTL2_LEVEL3 ADI_FIR_CTL2_PRIO j½ ¾ FIR_CTL2_IMASK_ENA FIR_CTL2_IMASK_DIS ADI_FIR_CTL2_IMASK Ô½ I¾ FIR_CTL2_DIS FIR_CTL2_ENA ADI_FIR_CTL2_TWAIT !¾ ¾ FIR_CTL2_TMASK_EN FIR_CTL2_TMASK_DIS ADI_FIR_CTL2_TMASK b¾ \¿ TAPLEN # PRIO # WINDOW #
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IMASK # RATIO # TWAIT # SRCEN # UPSAMP # TMASK # ¿ ®¾ # VALUE32 # ¤¿ _ADI_FIR_CTL2_t \¿ # ADI_FIR_CTL2_t ¿ ì¿ VALUE # reserved30 # À ¹¿ # VALUE32 # 5À _ADI_FIR_INIDX_t ì¿ # ADI_FIR_INIDX_t À ~À VALUE # reserved16 # £À KÀ # VALUE32 # ÇÀ _ADI_FIR_INMOD_t ~À # ADI_FIR_INMOD_t £À Á VALUE # reserved16 # 5Á ÝÀ # VALUE32 # YÁ _ADI_FIR_INCNT_t Á # ADI_FIR_INCNT_t 5Á ¢Á VALUE # reserved30 # ÇÁ oÁ # VALUE32 # ìÁ _ADI_FIR_INBASE_t ¢Á # ADI_FIR_INBASE_t ÇÁ 6 VALUE # reserved30 # [  # VALUE32 #  _ADI_FIR_OUTIDX_t 6 # ADI_FIR_OUTIDX_t [ Ê VALUE # reserved16 # ï  # VALUE32 # à _ADI_FIR_OUTMOD_t Ê # ADI_FIR_OUTMOD_t ï ^à VALUE # reserved16 # à +à # VALUE32 # ¨Ã _ADI_FIR_OUTCNT_t ^à # ADI_FIR_OUTCNT_t à òà VALUE # reserved30 # Ä ¿Ã # VALUE32 # =Ä _ADI_FIR_OUTBASE_t òà # ADI_FIR_OUTBASE_t Ä Ä VALUE # reserved30 # Ä UÄ # VALUE32 # ÓÄ _ADI_FIR_COEFIDX_t Ä # ADI_FIR_COEFIDX_t Ä Å VALUE # reserved16 # CÅ ëÄ # VALUE32 # iÅ _ADI_FIR_COEFMOD_t Å # ADI_FIR_COEFMOD_t CÅ ³Å CCNT # reserved16 # ØÅ Å # VALUE32 # þÅ _ADI_FIR_COEFCNT_t ³Å # ADI_FIR_COEFCNT_t ØÅ IÆ VALUE # reserved30 # nÆ Æ # VALUE32 # Æ _ADI_FIR_CHNPTR_t IÆ # ADI_FIR_CHNPTR_t nÆ ÆÆ VALUE # ëÆ ªÆ # VALUE32 # Ç _ADI_FIR_SCTL1_t ÆÆ # ADI_FIR_SCTL1_t ëÆ AÇ VALUE # fÇ %Ç # VALUE32 # Ç _ADI_FIR_SCTL2_t AÇ # ADI_FIR_SCTL2_t fÇ È reserved0 # FXD # TC # RND # reserved15 # +È Ç # VALUE32 # OÈ _ADI_FIR_SGCTL_t È # ADI_FIR_SGCTL_t +È È IIR_CTL1_LEGACY IIR_CTL1_AUTOCONFIG ADI_IIR_CTL1_ACM eÈ âÉ EN # CH # reserved6 # DMAEN # CAI # SS # CCINTR # FORTYBIT # reserved13 # RND # reserved15 # BURSTEN # reserved18 # SSESEL # HALT # ACM # Ê ®È # VALUE32 # *Ê _ADI_IIR_CTL1_t âÉ # ADI_IIR_CTL1_t Ê Ë CPLD # CDKLD # PPGS # WRBK # SVDK # WDONE # ACDONE # CURCHNL # HALT_STAT # reserved13 # *Ë ?Ê # VALUE32 # PË _ADI_IIR_DMASTAT_t Ë # ADI_IIR_DMASTAT_t *Ë êË MRZ # MRI # MINV # ARZ # ARI # AINV # reserved6 # Ì hË # VALUE32 # 5Ì _ADI_IIR_MACSTAT_t êË # ADI_IIR_MACSTAT_t Ì ÕÌ EN # HLD # RUN # reserved3 # MEM # ADRINC # reserved6 # úÌ MÌ # VALUE32 # Í _ADI_IIR_DBG_CTL_t ÕÌ # ADI_IIR_DBG_CTL_t úÌ kÍ VALUE # reserved11 # Í 8Í # VALUE32 # ·Í _ADI_IIR_DBG_ADDR_t kÍ # ADI_IIR_DBG_ADDR_t Í ìÍ VALUE # Î ÐÍ # VALUE32 # <Î _ADI_IIR_DBG_WRDAT_LO_t ìÍ # ADI_IIR_DBG_WRDAT_LO_t Î Î VALUE # reserved8 # °Î YÎ # VALUE32 # ÛÎ _ADI_IIR_DBG_WRDAT_HI_t Î # ADI_IIR_DBG_WRDAT_HI_t °Î Ï VALUE # 9Ï øÎ # VALUE32 # dÏ _ADI_IIR_DBG_RDDAT_LO_t Ï # ADI_IIR_DBG_RDDAT_LO_t 9Ï ³Ï VALUE # reserved8 # ØÏ Ï # VALUE32 # Ð _ADI_IIR_DBG_RDDAT_HI_t ³Ï # ADI_IIR_DBG_RDDAT_HI_t ØÏ rÐ IIR_CTL2_LEVEL0 IIR_CTL2_LEVEL1 IIR_CTL2_LEVEL2 IIR_CTL2_LEVEL3 ADI_IIR_CTL2_PRIO Ð ¾Ð IIR_CTL2_IMASK_ENA IIR_CTL2_IMASK_DIS ADI_IIR_CTL2_IMASK Ð Ñ IIR_CTL2_TWAIT_DIS IIR_CTL2_TWAIT_ENA ADI_IIR_CTL2_TWAIT ×Ð XÑ IIR_CTL2_TMASK_ENA IIR_CTL2_TMASK_DIS ADI_IIR_CTL2_TMASK $Ñ -Ò BIQUADS # reserved6 # PRIO # WINDOW #
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IMASK # reserved25 # TWAIT # reserved29 # TMASK # RÒ qÑ # VALUE32 # uÒ _ADI_IIR_CTL2_t -Ò # ADI_IIR_CTL2_t RÒ ½Ò VALUE # reserved30 # âÒ Ò # VALUE32 # Ó _ADI_IIR_INIDX_t ½Ò # ADI_IIR_INIDX_t âÒ OÓ VALUE # reserved16 # tÓ Ó # VALUE32 # Ó _ADI_IIR_INMOD_t OÓ # ADI_IIR_INMOD_t tÓ áÓ VALUE # reserved16 # Ô ®Ó # VALUE32 # *Ô _ADI_IIR_INLEN_t áÓ # ADI_IIR_INLEN_t Ô sÔ VALUE # reserved30 # Ô @Ô # VALUE32 # ½Ô _ADI_IIR_INBASE_t sÔ # ADI_IIR_INBASE_t Ô Õ VALUE # reserved30 # ,Õ ÔÔ # VALUE32 # QÕ _ADI_IIR_OUTIDX_t Õ # ADI_IIR_OUTIDX_t ,Õ Õ VALUE # reserved16 # ÀÕ hÕ # VALUE32 # åÕ _ADI_IIR_OUTMOD_t Õ # ADI_IIR_OUTMOD_t ÀÕ /Ö VALUE # reserved16 # TÖ üÕ # VALUE32 # yÖ _ADI_IIR_OUTLEN_t /Ö # ADI_IIR_OUTLEN_t TÖ ÃÖ VALUE # reserved30 # èÖ Ö # VALUE32 # × _ADI_IIR_OUTBASE_t ÃÖ # ADI_IIR_OUTBASE_t èÖ Y× VALUE # reserved30 # ~× &× # VALUE32 # ¤× _ADI_IIR_COEFIDX_t Y× # ADI_IIR_COEFIDX_t ~× ï× VALUE # reserved16 # Ø ¼× # VALUE32 # :Ø _ADI_IIR_COEFMOD_t ï× # ADI_IIR_COEFMOD_t Ø
Ø VALUE # reserved16 # ªØ RØ # VALUE32 # ÐØ _ADI_IIR_COEFLEN_t
Ø # ADI_IIR_COEFLEN_t ªØ Ù VALUE # reserved30 # @Ù èØ # VALUE32 # eÙ _ADI_IIR_CHNPTR_t Ù # ADI_IIR_CHNPTR_t @Ù Ù VALUE # ½Ù |Ù # VALUE32 # áÙ _ADI_IIR_SCTL1_t Ù # ADI_IIR_SCTL1_t ½Ù Ú VALUE # 8Ú ÷Ù # VALUE32 # \Ú _ADI_IIR_SCTL2_t Ú # ADI_IIR_SCTL2_t 8Ú 5Û reserved0 #
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SS # reserved11 # FORTYBIT # reserved13 # RND # reserved15 # SSESEL # reserved30 # ZÛ rÚ # VALUE32 # ~Û _ADI_IIR_SGCTL_t 5Û # ADI_IIR_SGCTL_t ZÛ bÝ HARDMUTE0 # AUTOMUTE0 # SMODEIN0 # BYP0 # DEEMPHASIS0 # SOFTMUTE0 # DITHER0 # SMODEOUT0 # LENOUT0 # MPHASE0 # EN0 # HARDMUTE1 # AUTOMUTE1 # SMODEIN1 # BYP1 #
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DEEMPHASIS1 # SOFTMUTE1 # DITHER1 # SMODEOUT1 # LENOUT1 # MPHASE1 # EN1 # Ý Û # VALUE32 # ¬Ý _ADI_ASRC_CTL01_t bÝ # ADI_ASRC_CTL01_t Ý ß HARDMUTE2 # AUTOMUTE2 # SMODEIN2 # BYP2 # DEEMPHASIS2 # SOFTMUTE2 # DITHER2 # SMODEOUT2 # LENOUT2 # MPHASE2 # EN2 # HARDMUTE3 # AUTOMUTE3 # SMODEIN3 # BYP3 #
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DEEMPHASIS3 # SOFTMUTE3 # DITHER3 # SMODEOUT3 # LENOUT3 # MPHASE3 # EN3 # ¶ß ÃÝ # VALUE32 # Ûß _ADI_ASRC_CTL23_t ß # ADI_ASRC_CTL23_t ¶ß Zà MUTE0 # MUTE1 # MUTE2 # MUTE3 # reserved4 # à òß # VALUE32 # £à _ADI_ASRC_MUTE_t Zà # ADI_ASRC_MUTE_t à á RATIO0 # MUTEOUT0 # RATIO1 # MUTEOUT1 # 8á ¹à # VALUE32 # ]á _ADI_ASRC_RAT01_t á # ADI_ASRC_RAT01_t 8á Îá RATIO2 # MUTEOUT2 # RATIO3 # MUTEOUT3 # óá tá # VALUE32 # â _ADI_ASRC_RAT23_t Îá # ADI_ASRC_RAT23_t óá °â IN0 # IN1 # IN2 # IN3 # IN4 # IN5 # reserved30 # Õâ /â # VALUE32 # øâ _ADI_DAI_CLK0_t °â # ADI_DAI_CLK0_t Õâ ã IN0 # IN1 # IN2 # IN3 # IN4 # IN5 # reserved30 # ³ã ã # VALUE32 # Öã _ADI_DAI_CLK1_t ã # ADI_DAI_CLK1_t ³ã <ä IN0 # IN1 # IN2 # reserved15 # aä ëã # VALUE32 # ä _ADI_DAI_CLK2_t <ä # ADI_DAI_CLK2_t aä àä reserved0 # IN5 # reserved30 # å ä # VALUE32 # (å _ADI_DAI_CLK3_t àä # ADI_DAI_CLK3_t å Åå IN0 # IN1 # reserved10 # IN3 # IN4 # IN5 # reserved30 # êå =å # VALUE32 # æ _ADI_DAI_CLK4_t Åå # ADI_DAI_CLK4_t êå cæ IN0 # IN1 # reserved10 # æ "æ # VALUE32 # «æ _ADI_DAI_CLK5_t cæ # ADI_DAI_CLK5_t æ 1ç IN0 # IN1 # IN2 # IN3 # IN4 # reserved30 # Vç Àæ # VALUE32 # yç _ADI_DAI_DAT0_t 1ç # ADI_DAI_DAT0_t Vç ÿç IN0 # IN1 # IN2 # IN3 # IN4 # reserved30 # $è ç # VALUE32 # Gè _ADI_DAI_DAT1_t ÿç # ADI_DAI_DAT1_t $è Íè IN0 # IN1 # IN2 # IN3 # IN4 # reserved30 # òè \è # VALUE32 # é _ADI_DAI_DAT2_t Íè # ADI_DAI_DAT2_t òè é IN0 # IN1 # IN2 # IN3 # IN4 # reserved30 # Àé *é # VALUE32 # ãé _ADI_DAI_DAT3_t é # ADI_DAI_DAT3_t Àé (ê IN0 # reserved6 # Mê øé # VALUE32 # pê _ADI_DAI_DAT4_t (ê # ADI_DAI_DAT4_t Mê Ìê reserved0 # IN4 # reserved30 # ñê
ê # VALUE32 # ë _ADI_DAI_DAT5_t Ìê # ADI_DAI_DAT5_t ñê ë IN0 # IN1 # IN2 # IN3 # IN4 # reserved30 # ¿ë )ë # VALUE32 # âë _ADI_DAI_DAT6_t ë # ADI_DAI_DAT6_t ¿ë xì IN0 # IN1 # IN2 # IN3 # IN4 # IN5 # reserved30 # ì ÷ë # VALUE32 # ¿ì _ADI_DAI_FS0_t xì # ADI_DAI_FS0_t ì Tí IN0 # IN1 # IN2 # IN3 # IN4 # IN5 # reserved30 # yí Óì # VALUE32 # í _ADI_DAI_FS1_t Tí # ADI_DAI_FS1_t yí î IN0 # IN1 # IN2 # reserved15 # %î ¯í # VALUE32 # Gî _ADI_DAI_FS2_t î # ADI_DAI_FS2_t %î î IN0 # IN1 # reserved10 # Áî [î # VALUE32 # ãî _ADI_DAI_FS4_t î # ADI_DAI_FS4_t Áî \ï PB01 # PB02 # PB03 # PB04 # reserved28 # ï ÷î # VALUE32 # ¤ï _ADI_DAI_PIN0_t \ï # ADI_DAI_PIN0_t ï ð PB05 # PB06 # PB07 # PB08 # reserved28 # Cð ¹ï # VALUE32 # fð _ADI_DAI_PIN1_t ð # ADI_DAI_PIN1_t Cð àð PB09 # PB10 # PB11 # PB12 # reserved28 # ñ {ð # VALUE32 # (ñ _ADI_DAI_PIN2_t àð # ADI_DAI_PIN2_t ñ ºñ reserved0 # PB19 # PB20 # INV19 # INV20 # reserved30 # ßñ =ñ # VALUE32 # ò _ADI_DAI_PIN4_t ºñ # ADI_DAI_PIN4_t ßñ §ò IN6 # IN7 # IN8 # IN9 # IN10 # IN11 # INV10 # INV11 # Ìò ò # VALUE32 # ðò _ADI_DAI_MISC0_t §ò # ADI_DAI_MISC0_t Ìò ó IN0 # IN1 # IN2 # IN3 # IN4 # IN5 # reserved30 # ¬ó ó # VALUE32 # Ðó _ADI_DAI_MISC1_t ó # ADI_DAI_MISC1_t ¬ó \ô PB01 # PB02 # PB03 # PB04 # PB05 # reserved30 # ô æó # VALUE32 # ¥ô _ADI_DAI_PBEN0_t \ô # ADI_DAI_PBEN0_t ô 1õ PB06 # PB07 # PB08 # PB09 # PB10 # reserved30 # Võ »ô # VALUE32 # zõ _ADI_DAI_PBEN1_t 1õ # ADI_DAI_PBEN1_t Võ Óõ PB11 # PB12 # reserved12 # øõ õ # VALUE32 # ö _ADI_DAI_PBEN2_t Óõ # ADI_DAI_PBEN2_t øõ ö reserved0 # PB19 # PB20 # reserved30 # °ö 2ö # VALUE32 # Ôö _ADI_DAI_PBEN3_t ö # ADI_DAI_PBEN3_t °ö ø RXVALID # RXLOCK # RXLOSSOFLOCK # reserved3 # RXNONAUDIO # reserved5 # SRC0MUTE # SRC1MUTE # SRC2MUTE # SRC3MUTE #
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MISCINT0 # MISCINT1 # MISCINT2 # MISCINT3 # MISCINT4 # MISCINT5 # MISCINT6 # MISCINT7 # MISCINT8 # MISCINT9 # Âø êö # VALUE32 # èø _ADI_DAI_IMSK_FE_t ø # ADI_DAI_IMSK_FE_t Âø ³ú RXVALID # RXLOCK # RXLOSSOFLOCK # reserved3 # RXNONAUDIO # reserved5 # SRC0MUTE # SRC1MUTE # SRC2MUTE # SRC3MUTE #
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MISCINT0 # MISCINT1 # MISCINT2 # MISCINT3 # MISCINT4 # MISCINT5 # MISCINT6 # MISCINT7 # MISCINT8 # MISCINT9 # Øú ù # VALUE32 # þú _ADI_DAI_IMSK_RE_t ³ú # ADI_DAI_IMSK_RE_t Øú Éü RXVALID # RXLOCK # RXLOSSOFLOCK # reserved3 # RXNONAUDIO # reserved5 # SRC0MUTE # SRC1MUTE # SRC2MUTE # SRC3MUTE #
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MISCINT0 # MISCINT1 # MISCINT2 # MISCINT3 # MISCINT4 # MISCINT5 # MISCINT6 # MISCINT7 # MISCINT8 # MISCINT9 # îü û # VALUE32 # ý _ADI_DAI_IMSK_PRI_t Éü # ADI_DAI_IMSK_PRI_t îü áþ RXVALID # RXLOCK # RXLOSSOFLOCK # reserved3 # RXNONAUDIO # reserved5 # SRC0MUTE # SRC1MUTE # SRC2MUTE # SRC3MUTE #
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MISCINT0 # MISCINT1 # MISCINT2 # MISCINT3 # MISCINT4 # MISCINT5 # MISCINT6 # MISCINT7 # MISCINT8 # MISCINT9 # ÿ .ý # VALUE32 # ,ÿ _ADI_DAI_IRPTL_H_t áþ # ADI_DAI_IRPTL_H_t ÿ ÷ RXVALID # RXLOCK # RXLOSSOFLOCK # reserved3 # RXNONAUDIO # reserved5 # SRC0MUTE # SRC1MUTE # SRC2MUTE # SRC3MUTE #
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MISCINT0 # MISCINT1 # MISCINT2 # MISCINT3 # MISCINT4 # MISCINT5 # MISCINT6 # MISCINT7 # MISCINT8 # MISCINT9 # Dÿ # VALUE32 # B _ADI_DAI_IRPTL_L_t ÷ # ADI_DAI_IRPTL_L_t RXVALID # RXLOCK # RXLOSSOFLOCK # reserved3 # RXNONAUDIO # reserved5 # SRC0MUTE # SRC1MUTE # SRC2MUTE # SRC3MUTE #
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MISCINT0 # MISCINT1 # MISCINT2 # MISCINT3 # MISCINT4 # MISCINT5 # MISCINT6 # MISCINT7 # MISCINT8 # MISCINT9 # 2 Z # VALUE32 # Y _ADI_DAI_IRPTL_HS_t # ADI_DAI_IRPTL_HS_t 2 % RXVALID # RXLOCK # RXLOSSOFLOCK # reserved3 # RXNONAUDIO # reserved5 # SRC0MUTE # SRC1MUTE # SRC2MUTE # SRC3MUTE #
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MISCINT0 # MISCINT1 # MISCINT2 # MISCINT3 # MISCINT4 # MISCINT5 # MISCINT6 # MISCINT7 # MISCINT8 # MISCINT9 # J r # VALUE32 # q _ADI_DAI_IRPTL_LS_t % # ADI_DAI_IRPTL_LS_t J ° PB01 # PB02 # PB03 # PB04 # PB05 # PB06 # PB07 # PB08 # PB09 # PB10 # PB11 # PB12 # reserved12 # PB19 # PB20 # reserved20 # Õ # VALUE32 # ü _ADI_DAI_PIN_STAT_t ° # ADI_DAI_PIN_STAT_t Õ J GBL_SP_EN # GBL_SPEN_DAIX # GBL_SPEN_GRP0 # GBL_SPEN_GRP1 # GBL_SP0A_PC_EN # GBL_SP0A_SC_EN # GBL_SP0B_PC_EN # GBL_SP0B_SC_EN # GBL_SP1A_PC_EN # GBL_SP1A_SC_EN # GBL_SP1B_PC_EN # GBL_SP1B_SC_EN # GBL_SP2A_PC_EN # GBL_SP2A_SC_EN # GBL_SP2B_PC_EN # GBL_SP2B_SC_EN # GBL_SP3A_PC_EN # GBL_SP3A_SC_EN # GBL_SP3B_PC_EN # GBL_SP3B_SC_EN # reserved20 # o # VALUE32 # _ADI_DAI_GBL_SP_EN_t J # ADI_DAI_GBL_SP_EN_t o ò GRP0_SP0AINT_EN # GRP0_SP0BINT_EN # GRP0_SP1AINT_EN # GRP0_SP1BINT_EN # GRP0_SP2AINT_EN # GRP0_SP2BINT_EN # GRP0_SP3AINT_EN # GRP0_SP3BINT_EN # GRP1_SP0AINT_EN # GRP1_SP0BINT_EN # GRP1_SP1AINT_EN # GRP1_SP1BINT_EN # GRP1_SP2AINT_EN # GRP1_SP2BINT_EN # GRP1_SP3AINT_EN # GRP1_SP3BINT_EN # GRP0_INT_EN # GRP1_INT_EN # GRP0_TRG_EN # GRP1_TRG_EN # reserved20 # ± # VALUE32 # @ _ADI_DAI_GBL_INT_EN_t ò # ADI_DAI_GBL_INT_EN_t ° FSDIV # FSPHASEHI #
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FSEN # CLKEN # Õ [ # VALUE32 # ù _ADI_PCG_CTLA0_t ° # ADI_PCG_CTLA0_t Õ g CLKDIV # FSPHASELO #
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FSSRC # CLKSRC # # VALUE32 # ° _ADI_PCG_CTLA1_t g # ADI_PCG_CTLA1_t FSDIV # FSPHASEHI #
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FSEN # CLKEN # @ Æ # VALUE32 # d _ADI_PCG_CTLB0_t # ADI_PCG_CTLB0_t @ Ò CLKDIV # FSPHASELO #
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FSSRC # CLKSRC # ÷ z # VALUE32 # _ADI_PCG_CTLB1_t Ò # ADI_PCG_CTLB1_t ÷ [ FSA # FSB # 1 # VALUE32 # ¢ _ADI_PCG_PW1_t [ # ADI_PCG_PW1_t ã FSA # CLKA # CLKASRC # FSASRC # CLKA_CLKINSEL # FSA_CLKINSEL # reserved6 #
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FSB # CLKB # CLKBSRC # FSBSRC # CLKB_CLKINSEL # FSB_CLKINSEL #
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reserved22 #
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¶ # VALUE32 # , _ADI_PCG_SYNC1_t ã # ADI_PCG_SYNC1_t FSDIV # FSPHASEHI #
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FSEN # CLKEN # ¼ B # VALUE32 # à _ADI_PCG_CTLC0_t # ADI_PCG_CTLC0_t ¼ N CLKDIV # FSPHASELO #
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FSSRC # CLKSRC # s ö # VALUE32 # _ADI_PCG_CTLC1_t N # ADI_PCG_CTLC1_t s FSDIV # FSPHASEHI #
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FSEN # CLKEN # ' # VALUE32 # K _ADI_PCG_CTLD0_t # ADI_PCG_CTLD0_t ' ¹ CLKDIV # FSPHASELO #
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FSSRC # CLKSRC # Þ a # VALUE32 # _ADI_PCG_CTLD1_t ¹ # ADI_PCG_CTLD1_t Þ B FSC # FSD # g # VALUE32 # _ADI_PCG_PW2_t B # ADI_PCG_PW2_t g Ê FSC # CLKC # CLKCSRC # FSCSRC # CLKC_CLKINSEL # FSC_CLKINSEL # reserved6 #
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FSD # CLKD # CLKDSRC # FSDSRC # CLKD_CLKINSEL # FSD_CLKINSEL #
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reserved22 #
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ï # VALUE32 # _ADI_PCG_SYNC2_t Ê # ADI_PCG_SYNC2_t ï M EN # MUTE # FREQ # SCDF # SCDFLR # SMODEIN # AUTO # VALIDL # VALIDR # BLKSTART # USRPEND # reserved14 # EXTSYNC # BYTE0A # BYTE0B # r ) # VALUE32 # _ADI_SPDIF_TX_CTL_t M # ADI_SPDIF_TX_CTL_t r BYTE1 # BYTE2 # BYTE3 # BYTE4 # ) ² # VALUE32 # T _ADI_SPDIF_TX_STAT_A0_t # ADI_SPDIF_TX_STAT_A0_t ) à BYTE1 # BYTE2 # BYTE3 # BYTE4 # è q # VALUE32 # _ADI_SPDIF_TX_STAT_B0_t à # ADI_SPDIF_TX_STAT_B0_t è d SPDIF_RX_CTL_STRONG SPDIF_RX_CTL_WEAK ADI_SPDIF_RX_CTL_STRENGTH 0 ¸ SPDIF_RX_CTL_NORMAL SPDIF_RX_CTL_FAST ADI_SPDIF_RX_CTL_FASTLOCK ¬ EN # STRENGTH # FASTLOCK # RSTRTAUDIO # RST # reserved5 # TDMSEL # reserved12 # INVTDM # reserved14 # Ñ Ø # VALUE32 # ø _ADI_SPDIF_RX_CTL_t ¬ # ADI_SPDIF_RX_CTL_t Ñ Ñ AUDIOTYPE # COMPTYPE # VALID # LOCK # LOCKLOSS # reserved5 # WLCHANA # WLCHANB # COMPMODE # ö # VALUE32 # _ADI_SPDIF_RX_STAT_t Ñ # ADI_SPDIF_RX_STAT_t ö BYTE0 # BYTE1 # BYTE2 # BYTE3 # ¯ 8 # VALUE32 # Ú _ADI_SPDIF_RX_STAT0_A_t # ADI_SPDIF_RX_STAT0_A_t ¯ I BYTE0 # BYTE1 # BYTE2 # BYTE3 # n ÷ # VALUE32 # _ADI_SPDIF_RX_STAT0_B_t I # ADI_SPDIF_RX_STAT0_B_t n è BYTE4 # reserved8 # ¶ # VALUE32 # 8 _ADI_SPDIF_RX_STAT1_A_t è # ADI_SPDIF_RX_STAT1_A_t BYTE4 # reserved8 # ¬ U # VALUE32 # × _ADI_SPDIF_RX_STAT1_B_t # ADI_SPDIF_RX_STAT1_B_t ¬ F BYTE5 # BYTE6 # BYTE7 # BYTE8 # k ô # VALUE32 # _ADI_SPDIF_TX_STAT_A1_t F # ADI_SPDIF_TX_STAT_A1_t k BYTE9 # BYTE10 # BYTE11 # BYTE12 # - ³ # VALUE32 # X _ADI_SPDIF_TX_STAT_A2_t # ADI_SPDIF_TX_STAT_A2_t - Ë BYTE13 # BYTE14 # BYTE15 # BYTE16 # ð u # VALUE32 # ! _ADI_SPDIF_TX_STAT_A3_t Ë # ADI_SPDIF_TX_STAT_A3_t ð ! BYTE17 # BYTE18 # BYTE19 # BYTE20 # ³! 8! # VALUE32 # Þ! _ADI_SPDIF_TX_STAT_A4_t ! # ADI_SPDIF_TX_STAT_A4_t ³! U" BYTE21 # BYTE22 # BYTE23 # reserved24 # z" û! # VALUE32 # ¥" _ADI_SPDIF_TX_STAT_A5_t U" # ADI_SPDIF_TX_STAT_A5_t z" # BYTE5 # BYTE6 # BYTE7 # BYTE8 # 9# Â" # VALUE32 # d# _ADI_SPDIF_TX_STAT_B1_t # # ADI_SPDIF_TX_STAT_B1_t 9# Ö# BYTE9 # BYTE10 # BYTE11 # BYTE12 # û# # # VALUE32 # &$ _ADI_SPDIF_TX_STAT_B2_t Ö# # ADI_SPDIF_TX_STAT_B2_t û# $ BYTE13 # BYTE14 # BYTE15 # BYTE16 # ¾$ C$ # VALUE32 # é$ _ADI_SPDIF_TX_STAT_B3_t $ # ADI_SPDIF_TX_STAT_B3_t ¾$ \% BYTE17 # BYTE18 # BYTE19 # BYTE20 # % % # VALUE32 # ¬% _ADI_SPDIF_TX_STAT_B4_t \% # ADI_SPDIF_TX_STAT_B4_t % #& BYTE21 # BYTE22 # BYTE23 # reserved24 # H& É% # VALUE32 # s& _ADI_SPDIF_TX_STAT_B5_t #& # ADI_SPDIF_TX_STAT_B5_t H& â& BYTE0 # BYTE1 # BYTE2 # BYTE3 # ' & # VALUE32 # 3' _ADI_SPDIF_TX_UBUFF_A0_t â& # ADI_SPDIF_TX_UBUFF_A0_t ' £' BYTE4 # BYTE5 # BYTE6 # BYTE7 # È' Q' # VALUE32 # ô' _ADI_SPDIF_TX_UBUFF_A1_t £' # ADI_SPDIF_TX_UBUFF_A1_t È' f( BYTE8 # BYTE9 # BYTE10 # BYTE11 # ( ( # VALUE32 # ·( _ADI_SPDIF_TX_UBUFF_A2_t f( # ADI_SPDIF_TX_UBUFF_A2_t ( +) BYTE12 # BYTE13 # BYTE14 # BYTE15 # P) Õ( # VALUE32 # |) _ADI_SPDIF_TX_UBUFF_A3_t +) # ADI_SPDIF_TX_UBUFF_A3_t P) ð) BYTE16 # BYTE17 # BYTE18 # BYTE19 # * ) # VALUE32 # A* _ADI_SPDIF_TX_UBUFF_A4_t ð) # ADI_SPDIF_TX_UBUFF_A4_t * µ* BYTE20 # BYTE21 # BYTE22 # BYTE23 # Ú* _* # VALUE32 # + _ADI_SPDIF_TX_UBUFF_A5_t µ* # ADI_SPDIF_TX_UBUFF_A5_t Ú* v+ BYTE0 # BYTE1 # BYTE2 # BYTE3 # + $+ # VALUE32 # Ç+ _ADI_SPDIF_TX_UBUFF_B0_t v+ # ADI_SPDIF_TX_UBUFF_B0_t + 7, BYTE4 # BYTE5 # BYTE6 # BYTE7 # \, å+ # VALUE32 # , _ADI_SPDIF_TX_UBUFF_B1_t 7, # ADI_SPDIF_TX_UBUFF_B1_t \, ú, BYTE8 # BYTE9 # BYTE10 # BYTE11 # - ¦, # VALUE32 # K- _ADI_SPDIF_TX_UBUFF_B2_t ú, # ADI_SPDIF_TX_UBUFF_B2_t - ¿- BYTE12 # BYTE13 # BYTE14 # BYTE15 # ä- i- # VALUE32 # . _ADI_SPDIF_TX_UBUFF_B3_t ¿- # ADI_SPDIF_TX_UBUFF_B3_t ä- . BYTE16 # BYTE17 # BYTE18 # BYTE19 # ©. .. # VALUE32 # Õ. _ADI_SPDIF_TX_UBUFF_B4_t . # ADI_SPDIF_TX_UBUFF_B4_t ©. I/ BYTE20 # BYTE21 # BYTE22 # BYTE23 # n/ ó. # VALUE32 # / _ADI_SPDIF_TX_UBUFF_B5_t I/ # ADI_SPDIF_TX_UBUFF_B5_t n/ ç/ EN # reserved1 # 0 ¸/ # VALUE32 # 70 _ADI_SPDIF_TX_USRUPDT_t ç/ # ADI_SPDIF_TX_USRUPDT_t 0 {1 HOSTRDY # PERDY # reserved2 # INITARC4 # HASHFINAL # reserved5 # PRNGMD # PADVAL # AUTHERR # PADERR # SQNMERR # EXTERR # EXTERRCD # PADCTLSTAT # 1 T0 # VALUE32 # È1 _ADI_PKTE_CTL_STAT_t {1 # ADI_PKTE_CTL_STAT_t 1 þ1 VALUE # #2 â1 # VALUE32 # K2 _ADI_PKTE_SRC_ADDR_t þ1 # ADI_PKTE_SRC_ADDR_t #2 2 VALUE # ¦2 e2 # VALUE32 # Ï2 _ADI_PKTE_DEST_ADDR_t 2 # ADI_PKTE_DEST_ADDR_t ¦2 3 VALUE # +3 ê2 # VALUE32 # R3 _ADI_PKTE_SA_ADDR_t 3 # ADI_PKTE_SA_ADDR_t +3 3 VALUE # ¬3 k3 # VALUE32 # Ö3 _ADI_PKTE_STATE_ADDR_t 3 # ADI_PKTE_STATE_ADDR_t ¬3 4 VALUE # 34 ò3 # VALUE32 # a4 _ADI_PKTE_ARC4STATE_ADDR_t 4 # ADI_PKTE_ARC4STATE_ADDR_t 34 4 VALUE # Â4 4 # VALUE32 # è4 _ADI_PKTE_USERID_t 4 # ADI_PKTE_USERID_t Â4 m5 TOTLEN # reserved20 #
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HSTRDY # PEDONE # BYPASS # 5 5 # VALUE32 # µ5 _ADI_PKTE_LEN_t m5 # ADI_PKTE_LEN_t 5 æ5 VALUE # 6 Ê5 # VALUE32 # 76 _ADI_PKTE_CDRBASE_ADDR_t æ5 # ADI_PKTE_CDRBASE_ADDR_t 6 q6 VALUE # 6 U6 # VALUE32 # Â6 _ADI_PKTE_RDRBASE_ADDR_t q6 # ADI_PKTE_RDRBASE_ADDR_t 6 *7 RINGSZ #
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reserved10 # ENEXTTRIG # O7 à6 # VALUE32 # w7 _ADI_PKTE_RING_CFG_t *7 # ADI_PKTE_RING_CFG_t O7 8 CDRTHRSH #
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reserved10 # RDRTHRSH #
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RDTO # reserved30 # TOEN # :8 7 # VALUE32 # e8 _ADI_PKTE_RING_THRESH_t 8 # ADI_PKTE_RING_THRESH_t :8 µ8 VALUE # reserved11 # Ú8 8 # VALUE32 # 9 _ADI_PKTE_CDSC_CNT_t µ8 # ADI_PKTE_CDSC_CNT_t Ú8 N9 VALUE # reserved8 # s9 9 # VALUE32 # 9 _ADI_PKTE_CDSC_INCR_t N9 # ADI_PKTE_CDSC_INCR_t s9 ê9 VALUE # reserved11 # : ·9 # VALUE32 # 7: _ADI_PKTE_RDSC_CNT_t ê9 # ADI_PKTE_RDSC_CNT_t : : VALUE # reserved8 # ¨: Q: # VALUE32 # Ñ: _ADI_PKTE_RDSC_DECR_t : # ADI_PKTE_RDSC_DECR_t ¨: J; CDRPTR #
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reserved10 # RDRPTR #
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reserved26 # o; ì: # VALUE32 # ; _ADI_PKTE_RING_PTR_t J; # ADI_PKTE_RING_PTR_t o; ù; CDROVFL # RDRUNFL # reserved2 # < ±; # VALUE32 # G< _ADI_PKTE_RING_STAT_t ù; # ADI_PKTE_RING_STAT_t < ¬< PKTE_CFG_HOST PKTE_CFG_TCM0 PKTE_CFG_TCM1 PKTE_CFG_AUTO ADI_PKTE_CFG_MODE b< = RSTPE # RSTRING # reserved2 # MODE # ENCDRUPDT # reserved11 # SWPCDRD # SWPSA # SWPDAT # reserved19 # ½= Ä< # VALUE32 # à= _ADI_PKTE_CFG_t = # ADI_PKTE_CFG_t ½= ? INPTDN # OUTPTDN # ENCRYPTDN # INHSHDN # OUTHSHDN # AUTHERR # PADERR # SNUMERR # EXTERR # OPDN # IBUFREQ # OBUFREQ # IBUFEMPTYCNT #
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OBUFFULLCNT #
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B? õ= # VALUE32 # f? _ADI_PKTE_STAT_t ? # ADI_PKTE_STAT_t B? Ø? INBUF # reserved8 # OUTBUF # reserved24 # ý? |? # VALUE32 # '@ _ADI_PKTE_BUF_THRESH_t Ø? # ADI_PKTE_BUF_THRESH_t ý? u@ VALUE # reserved9 # @ C@ # VALUE32 # Ã@ _ADI_PKTE_INBUF_CNT_t u@ # ADI_PKTE_INBUF_CNT_t @ A VALUE # reserved9 # 5A Þ@ # VALUE32 # _A _ADI_PKTE_INBUF_INCR_t A # ADI_PKTE_INBUF_INCR_t 5A A VALUE # reserved9 # ÒA {A # VALUE32 # üA _ADI_PKTE_OUTBUF_CNT_t A # ADI_PKTE_OUTBUF_CNT_t ÒA JB VALUE # reserved9 # oB B # VALUE32 # B _ADI_PKTE_OUTBUF_DECR_t JB # ADI_PKTE_OUTBUF_DECR_t oB C INBUF # reserved8 # OUTBUF # reserved24 # 8C ·B # VALUE32 # _C _ADI_PKTE_BUF_PTR_t C # ADI_PKTE_BUF_PTR_t 8C D MXBRSTSZ # reserved4 # MSTRBIGEND # reserved17 # INCR # IDLE # reserved21 # 9D xC # VALUE32 # `D _ADI_PKTE_DMA_CFG_t D # ADI_PKTE_DMA_CFG_t 9D ÙD MSTRBSWP # reserved8 # TGTBSWP # reserved24 # þD yD # VALUE32 # (E _ADI_PKTE_ENDIAN_CFG_t ÙD # ADI_PKTE_ENDIAN_CFG_t þD ÊE EN # RDCD # RDSA # HWRDAT # WRSA # WRRD # reserved6 # ïE DE # VALUE32 # F _ADI_PKTE_HLT_CTL_t ÊE # ADI_PKTE_HLT_CTL_t ïE
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G EN # RDCD # RDSA # WRDAT # WRSA # WRRD # reserved6 #
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MNSTATE # RDSASTATE # DATSTATE # reserved27 # /G /F # VALUE32 # WG _ADI_PKTE_HLT_STAT_t
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G # ADI_PKTE_HLT_STAT_t /G G VALUE # ²G qG # VALUE32 # ÖG _ADI_PKTE_CONT_t G # ADI_PKTE_CONT_t ²G uH ENPECLK # ENDESCLK # ENAESCLK # ENARC4CLK # ENHSHCLK # reserved5 # H ìG # VALUE32 # ÁH _ADI_PKTE_CLK_CTL_t uH # ADI_PKTE_CLK_CTL_t H ÙI CDRTHRSH # RDRTHRSH # reserved2 # OPDN # IBUFTHRSH # OBUFTHRSH # reserved12 # HLT # RINGERR # PROCERR # IFERR # reserved19 # þI ÚH # VALUE32 # (J _ADI_PKTE_IUMSK_STAT_t ÙI # ADI_PKTE_IUMSK_STAT_t þI CK CDRTHRSH # RDRTHRSH # reserved2 # OPDN # IBUFTHRSH # OBUFTHRSH # reserved12 # HLT # RINGERR # PROCERR # IFERR # reserved19 # hK DJ # VALUE32 # K _ADI_PKTE_IMSK_STAT_t CK # ADI_PKTE_IMSK_STAT_t hK «L CDRTHRSH # RDRTHRSH # reserved2 # OPDN # IBUFTHRSH # OBUFTHRSH # reserved12 # HLT # RINGERR # PROCERR # IFERR # reserved19 # ÐL ¬K # VALUE32 # ÷L _ADI_PKTE_INT_CLR_t «L # ADI_PKTE_INT_CLR_t ÐL N CDRTHRSH # RDRTHRSH # reserved2 # OPDN # IBUFTHRSH # OBUFTHRSH # reserved12 # HLT # RINGERR # PROCERR # IFERR # reserved19 # 4N M # VALUE32 # ZN _ADI_PKTE_INT_EN_t N # ADI_PKTE_INT_EN_t 4N ¸N TYPE # PULSECLR # reserved2 # ÝN rN # VALUE32 # O _ADI_PKTE_INT_CFG_t ¸N # ADI_PKTE_INT_CFG_t ÝN P CDRTHRSH # RDRTHRSH # reserved2 # OPDN # IBUFTHRSH # OBUFTHRSH # reserved12 # HLT # RINGERR # PROCERR # IFERR # reserved19 # AP O # VALUE32 # hP _ADI_PKTE_IMSK_EN_t P # ADI_PKTE_IMSK_EN_t AP Q CDRTHRSH # RDRTHRSH # reserved2 # OPDN # IBUFTHRSH # OBUFTHRSH # reserved12 # HLT # RINGERR # PROCERR # IFERR # reserved19 # ¥Q P # VALUE32 # ÍQ _ADI_PKTE_IMSK_DIS_t Q # ADI_PKTE_IMSK_DIS_t ¥Q #S OPCD # DIR # OPGRP # PADTYPE # CIPHER # HASH # reserved16 # SCPAD # EXTPAD # HDRPROC # DIGESTLEN # IVSRC # HASHSRC # SVIV # SVHASH # reserved30 # HS çQ # VALUE32 # oS _ADI_PKTE_SA_CMD0_t #S # ADI_PKTE_SA_CMD0_t HS ùT CPYDGST # CPYHDR # CPYPAYLD # CPYPAD # reserved4 # CIPHERMD # reserved10 # SSLMAC # HMAC # BYTEOFFST # reserved14 # HSHCOFFST # AESKEYLEN # reserved27 # AESDECKEY # ENSQNCHK # reserved30 # U S # VALUE32 # EU _ADI_PKTE_SA_CMD1_t ùT # ADI_PKTE_SA_CMD1_t U zU VALUE # U ^U # VALUE32 # ÅU _ADI_PKTE_SA_SPI_t zU # ADI_PKTE_SA_SPI_t U V IPTR # JPTR # reserved16 # EV ÝU # VALUE32 # qV _ADI_PKTE_SA_ARC4IJPTR_t V # ADI_PKTE_SA_ARC4IJPTR_t EV «V VALUE # ÐV V # VALUE32 # øV _ADI_PKTE_SA_NONCE_t «V # ADI_PKTE_SA_NONCE_t ÐV .W VALUE # SW W # VALUE32 # yW _ADI_PKTE_SA_RDY_t .W # ADI_PKTE_SA_RDY_t SW W VALUE # ÒW W # VALUE32 # ÿW _ADI_PKTE_ARC4STATE_BUF_t W # ADI_PKTE_ARC4STATE_BUF_t ÒW :X VALUE # _X X # VALUE32 # X _ADI_PKTE_DATAIO_BUF_t :X # ADI_PKTE_DATAIO_BUF_t _X ÁX VALUE # æX ¥X # VALUE32 # Y _ADI_PKTE_SA_IDIGEST_t ÁX # ADI_PKTE_SA_IDIGEST_t æX HY VALUE # mY ,Y # VALUE32 # Y _ADI_PKTE_SA_KEY_t HY # ADI_PKTE_SA_KEY_t mY ÇY VALUE # ìY «Y # VALUE32 # Z _ADI_PKTE_SA_ODIGEST_t ÇY # ADI_PKTE_SA_ODIGEST_t ìY NZ VALUE # sZ 2Z # VALUE32 # Z _ADI_PKTE_SA_SEQNUM_t NZ # ADI_PKTE_SA_SEQNUM_t sZ ÓZ VALUE # øZ ·Z # VALUE32 # %[ _ADI_PKTE_SA_SEQNUM_MSK_t ÓZ # ADI_PKTE_SA_SEQNUM_MSK_t øZ `[ VALUE #
[ D[ # VALUE32 # ³[ _ADI_PKTE_STATE_BYTE_CNT_t `[ # ADI_PKTE_STATE_BYTE_CNT_t
[ ï[ VALUE # \ Ó[ # VALUE32 # A\ _ADI_PKTE_STATE_IDIGEST_t ï[ # ADI_PKTE_STATE_IDIGEST_t \ |\ VALUE # ¡\ `\ # VALUE32 # É\ _ADI_PKTE_STATE_IV_t |\ # ADI_PKTE_STATE_IV_t ¡\ ] OPENRDGATE # reserved8 # ?] ã\ # VALUE32 # e] _ADI_TRNG_INTACK_t ] # ADI_TRNG_INTACK_t ?] ^ RDY # SHDNOVR # STUCKOUT # NOISEFAIL # RUNFAIL # LRUNFAIL # PKRFAIL # MBITFAIL # TSTRDY # reserved9 # BLKAVAIL # NEEDCLK # reserved25 # ¶^ }] # VALUE32 # Ú^ _ADI_TRNG_STAT_t ^ # ADI_TRNG_STAT_t ¶^ \` RDYMSK # SHDNOVRMSK # STUCKOUTMSK # NOISEFAILMSK # RUNFAILMSK # LRUNFAILMSK # PKRFAILMSK # MBITFAILMSK # TSTMODE # reserved9 # TRNGEN # reserved11 # PPROCEN # reserved13 # RESEED # STARTUPCYC # ` ð^ # VALUE32 # ¤` _ADI_TRNG_CTL_t \` # ADI_TRNG_CTL_t ` a MINREFCYC # SAMPLEDIV # RDTIMEOUT # MAXREFCYC # @a ¹` # VALUE32 # ca _ADI_TRNG_CFG_t a # ADI_TRNG_CFG_t @a 5b ALMTHRESH # reserved8 # STALLRUNPKR # SHDNTHRESH # reserved21 # SHDNFATAL # SHDNCNT # reserved30 # Zb xa # VALUE32 # b _ADI_TRNG_ALMCNT_t 5b # ADI_TRNG_ALMCNT_t Zb Éb FROS # reserved8 # îb b # VALUE32 # c _ADI_TRNG_FROEN_t Éb # ADI_TRNG_FROEN_t îb [c FROS # reserved8 # c *c # VALUE32 # ©c _ADI_TRNG_FRODETUNE_t [c # ADI_TRNG_FRODETUNE_t c õc FROS # reserved8 # d Äc # VALUE32 # @d _ADI_TRNG_ALMMSK_t õc # ADI_TRNG_ALMMSK_t d d FROS # reserved8 # ®d Xd # VALUE32 # Ôd _ADI_TRNG_ALMSTP_t d # ADI_TRNG_ALMSTP_t ®d e VALUE # -e ìd # VALUE32 # Se _ADI_TRNG_LFSR_L_t e # ADI_TRNG_LFSR_L_t -e e VALUE # ¬e ke # VALUE32 # Òe _ADI_TRNG_LFSR_M_t e # ADI_TRNG_LFSR_M_t ¬e f VALUE # reserved17 # Bf êe # VALUE32 # hf _ADI_TRNG_LFSR_H_t f # ADI_TRNG_LFSR_H_t Bf ³f VALUE # reserved24 # Øf f # VALUE32 # ûf _ADI_TRNG_CNT_t ³f # ADI_TRNG_CNT_t Øf g TSTCNT # STATE # LENCNT #
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reserved22 # LENMAX # reserved30 # ¸g g # VALUE32 # Þg _ADI_TRNG_RUNCNT_t g # ADI_TRNG_RUNCNT_t ¸g )h VALUE # reserved17 # Nh ög # VALUE32 # xh _ADI_TRNG_MONOBITCNT_t )h # ADI_TRNG_MONOBITCNT_t Nh i ENOUT # PATTFRO # PATTDET # NOLFSRFB # CONTPKR # RUNPKR # PPROC # reserved7 # SEL # reserved13 # PATTERN # reserved28 # IRQ # Ãi h # VALUE32 # çi _ADI_TRNG_TEST_t i # ADI_TRNG_TEST_t Ãi /j reserved0 # VALUE # Tj ýi # VALUE32 # zj _ADI_TRNG_BLKCNT_t /j # ADI_TRNG_BLKCNT_t Tj ®j VALUE # Ój j # VALUE32 # øj _ADI_TRNG_INPUT_t ®j # ADI_TRNG_INPUT_t Ój +k VALUE # Pk k # VALUE32 # sk _ADI_TRNG_KEY_t +k # ADI_TRNG_KEY_t Pk ¤k VALUE # Ék k # VALUE32 # ïk _ADI_TRNG_OUTPUT_t ¤k # ADI_TRNG_OUTPUT_t Ék Ul CNT0 # CNT1 # CNT2 # CNT3 # zl l # VALUE32 # l _ADI_TRNG_POKER_t Ul # ADI_TRNG_POKER_t zl m CNTZEROS # reserved12 # CNTONES # reserved28 # <m ¶l # VALUE32 # _m _ADI_TRNG_RUN_t m # ADI_TRNG_RUN_t <m m VALUE # µm tm # VALUE32 # Öm _ADI_TRNG_V_t m # ADI_TRNG_V_t µm n VALUE # reserved11 # An ém # VALUE32 # dn _ADI_PKA_APTR_t n # ADI_PKA_APTR_t An ¬n VALUE # reserved11 # Ñn yn # VALUE32 # ôn _ADI_PKA_BPTR_t ¬n # ADI_PKA_BPTR_t Ñn ;o CPTR # reserved11 # `o o # VALUE32 # o _ADI_PKA_CPTR_t ;o # ADI_PKA_CPTR_t `o Ëo VALUE # reserved11 # ðo o # VALUE32 # p _ADI_PKA_DPTR_t Ëo # ADI_PKA_DPTR_t ðo Zp VALUE # reserved9 # p (p # VALUE32 # ¢p _ADI_PKA_ALEN_t Zp # ADI_PKA_ALEN_t p ép VALUE # reserved9 # q ·p # VALUE32 # 1q _ADI_PKA_BLEN_t ép # ADI_PKA_BLEN_t q xq VALUE # reserved5 # q Fq # VALUE32 # Áq _ADI_PKA_SHIFT_t xq # ADI_PKA_SHIFT_t q s MULT # ADDSUB # reserved2 # MSONE # ADD # SUB # RSHFT # LSHFT # DIV # MODULO # CMP # CPY # SEQOPS # RUN # reserved16 # STALLRSLT # reserved25 # @s ×q # VALUE32 # cs _ADI_PKA_FUNC_t s # ADI_PKA_FUNC_t @s Ës AEQB # ALTB # AGTB # reserved3 # ðs xs # VALUE32 # t _ADI_PKA_COMPARE_t Ës # ADI_PKA_COMPARE_t ðs t ADDR # reserved11 # ZERO # reserved16 # t .t # VALUE32 # Õt _ADI_PKA_RESULTMSW_t t # ADI_PKA_RESULTMSW_t t Iu ADDR # reserved11 # ZERO # reserved16 # nu ït # VALUE32 # u _ADI_PKA_DIVMSW_t Iu # ADI_PKA_DIVMSW_t nu Æu VALUE # ëu ªu # VALUE32 # v _ADI_PKA_RAM_t Æu # ADI_PKA_RAM_t ëu Àv reserved0 # PKAINT1 # reserved2 # TRNGINT # reserved4 # SLERRINT # reserved6 # åv !v # VALUE32 # w _ADI_PKIC_POL_CTL_t Àv # ADI_PKIC_POL_CTL_t åv Äw reserved0 # PKAINT1 # reserved2 # TRNGINT # reserved4 # SLERRINT # reserved6 # éw %w # VALUE32 # x _ADI_PKIC_TYPE_CTL_t Äw # ADI_PKIC_TYPE_CTL_t éw Êx reserved0 # PKAINT1 # reserved2 # TRNGINT # reserved4 # SLERRINT # reserved6 # ïx +x # VALUE32 # y _ADI_PKIC_EN_CTL_t Êx # ADI_PKIC_EN_CTL_t ïx Ìy reserved0 # PKAINT1 # reserved2 # TRNGINT # reserved4 # SLERRINT # reserved6 # ñy -y # VALUE32 # z _ADI_PKIC_EN_SET_t Ìy # ADI_PKIC_EN_SET_t ñy Îz reserved0 # PKAINT1 # reserved2 # TRNGINT # reserved4 # SLERRINT # reserved6 # óz /z # VALUE32 # { _ADI_PKIC_RAW_STAT_t Îz # ADI_PKIC_RAW_STAT_t óz Ô{ reserved0 # PKAINT1 # reserved2 # TRNGINT # reserved4 # SLERRINT # reserved6 # ù{ 5{ # VALUE32 # | _ADI_PKIC_ACK_t Ô{ # ADI_PKIC_ACK_t ù{ Ð| reserved0 # PKAINT1 # reserved2 # TRNGINT # reserved4 # SLERRINT # reserved6 # õ| 1| # VALUE32 # } _ADI_PKIC_EN_STAT_t Ð| # ADI_PKIC_EN_STAT_t õ| Ô} reserved0 # PKAINT1 # reserved2 # TRNGINT # reserved4 # SLERRINT # reserved6 # ù} 5} # VALUE32 # ~ _ADI_PKIC_EN_CLR_t Ô} # ADI_PKIC_EN_CLR_t ù} × EN # TRAN # CHEN # DLEN # CBEN # DFLSH # reserved6 # WRBEN # OFCEN # TLEN # reserved10 # INTDONE0 # reserved13 # DFS # reserved18 # DMAS0 # CHS #
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TLS # WBS # DMAS1 # DIRS # reserved26 # ü 7~ # VALUE32 # % _ADI_EMDMA_CFG0_CTL_t × # ADI_EMDMA_CFG0_CTL_t ü s VALUE # reserved30 # @ # VALUE32 # Ã _ADI_EMDMA_CFG0_INDX1_t s # ADI_EMDMA_CFG0_INDX1_t VALUE # reserved27 # 8 à # VALUE32 # b _ADI_EMDMA_CFG0_MOD1_t # ADI_EMDMA_CFG0_MOD1_t 8 CNT1 # ¾ ~ # VALUE32 # è _ADI_EMDMA_CFG0_CNT1_t # ADI_EMDMA_CFG0_CNT1_t ¾ 7 VALUE # reserved30 # \ # VALUE32 # _ADI_EMDMA_CFG0_INDX0_t 7 # ADI_EMDMA_CFG0_INDX0_t \ × VALUE # reserved16 # ü ¤ # VALUE32 # & _ADI_EMDMA_CFG0_MOD0_t × # ADI_EMDMA_CFG0_MOD0_t ü ^ VALUE # B # VALUE32 # _ADI_EMDMA_CFG0_CNT0_t ^ # ADI_EMDMA_CFG0_CNT0_t ADDR # PCI # CPDR # * É # VALUE32 # V _ADI_EMDMA_CFG0_CHNPTR_t # ADI_EMDMA_CFG0_CHNPTR_t * ¦ ADDR # reserved30 # Ë t # VALUE32 # õ _ADI_EMDMA_CFG0_BASE_t ¦ # ADI_EMDMA_CFG0_BASE_t Ë D
VALUE # reserved30 # i
# VALUE32 #
_ADI_EMDMA_CFG0_TPTR_t D
# ADI_EMDMA_CFG0_TPTR_t i
á
CLEN # reserved26 # ¯
# VALUE32 # 2 _ADI_EMDMA_CFG0_BUFLEN_t á
# ADI_EMDMA_CFG0_BUFLEN_t l VALUE # P # VALUE32 # » _ADI_EMDMA_CFG0_TCNT_t l # ADI_EMDMA_CFG0_TCNT_t w EN # TRAN # CHEN # DLEN # CBEN # DFLSH # reserved6 # WRBEN # OFCEN # TLEN # reserved10 # INTDONE0 # reserved13 # DFS # reserved18 # DMAS0 # CHS #
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TLS # WBS # DMAS1 # DIRS # reserved26 # × # VALUE32 # Å _ADI_EMDMA_CFG1_CTL_t w # ADI_EMDMA_CFG1_CTL_t VALUE # reserved30 # 8 à # VALUE32 # c _ADI_EMDMA_CFG1_INDX1_t # ADI_EMDMA_CFG1_INDX1_t 8 ³ VALUE # reserved27 # Ø # VALUE32 # _ADI_EMDMA_CFG1_MOD1_t ³ # ADI_EMDMA_CFG1_MOD1_t Ø 9 CNT1 # ^ # VALUE32 # _ADI_EMDMA_CFG1_CNT1_t 9 # ADI_EMDMA_CFG1_CNT1_t ^ × VALUE # reserved30 # ü ¤ # VALUE32 # ' _ADI_EMDMA_CFG1_INDX0_t × # ADI_EMDMA_CFG1_INDX0_t ü w VALUE # reserved16 # D # VALUE32 # Æ _ADI_EMDMA_CFG1_MOD0_t w # ADI_EMDMA_CFG1_MOD0_t þ VALUE # # â # VALUE32 # M _ADI_EMDMA_CFG1_CNT0_t þ # ADI_EMDMA_CFG1_CNT0_t # ¥ ADDR # PCI # CPDR # Ê i # VALUE32 # ö _ADI_EMDMA_CFG1_CHNPTR_t ¥ # ADI_EMDMA_CFG1_CHNPTR_t Ê F ADDR # reserved30 # k # VALUE32 # _ADI_EMDMA_CFG1_BASE_t F # ADI_EMDMA_CFG1_BASE_t k ä VALUE # reserved30 # ± # VALUE32 # 3 _ADI_EMDMA_CFG1_TPTR_t ä # ADI_EMDMA_CFG1_TPTR_t CLEN # reserved26 # ¦ O # VALUE32 # Ò _ADI_EMDMA_CFG1_BUFLEN_t # ADI_EMDMA_CFG1_BUFLEN_t ¦ VALUE # 1 ð # VALUE32 # [ _ADI_EMDMA_CFG1_TCNT_t # ADI_EMDMA_CFG1_TCNT_t 1 ROMENTRY00 # ½ w # VALUE32 # é _ADI_DAPROM_ROMENTRY00_t # ADI_DAPROM_ROMENTRY00_t ½ ( ROMENTRY01 # M # VALUE32 # y _ADI_DAPROM_ROMENTRY01_t ( # ADI_DAPROM_ROMENTRY01_t M ¸ ROMENTRY02 # Ý # VALUE32 # _ADI_DAPROM_ROMENTRY02_t ¸ # ADI_DAPROM_ROMENTRY02_t Ý H ROMENTRY03 # m ' # VALUE32 # _ADI_DAPROM_ROMENTRY03_t H # ADI_DAPROM_ROMENTRY03_t m Ø ROMENTRY04 # ý · # VALUE32 # ) _ADI_DAPROM_ROMENTRY04_t Ø # ADI_DAPROM_ROMENTRY04_t ý h ROMENTRY05 # G # VALUE32 # ¹ _ADI_DAPROM_ROMENTRY05_t h # ADI_DAPROM_ROMENTRY05_t ø ROMENTRY06 # × # VALUE32 # I _ADI_DAPROM_ROMENTRY06_t ø # ADI_DAPROM_ROMENTRY06_t ROMENTRY07 # g # VALUE32 # Ù _ADI_DAPROM_ROMENTRY07_t # ADI_DAPROM_ROMENTRY07_t ROMENTRY08 # = ÷ # VALUE32 # i _ADI_DAPROM_ROMENTRY08_t # ADI_DAPROM_ROMENTRY08_t = ¨ ROMENTRY09 # Í # VALUE32 # ù _ADI_DAPROM_ROMENTRY09_t ¨ # ADI_DAPROM_ROMENTRY09_t Í 8 ROMENTRY10 # ] # VALUE32 # _ADI_DAPROM_ROMENTRY10_t 8 # ADI_DAPROM_ROMENTRY10_t ] È ROMENTRY11 # í § # VALUE32 # _ADI_DAPROM_ROMENTRY11_t È # ADI_DAPROM_ROMENTRY11_t í X ROMENTRY12 # } 7 # VALUE32 # © _ADI_DAPROM_ROMENTRY12_t X # ADI_DAPROM_ROMENTRY12_t } è ROMENTRY13 # Ç # VALUE32 # 9 _ADI_DAPROM_ROMENTRY13_t è # ADI_DAPROM_ROMENTRY13_t CTI_CTICONTROL_DIS CTI_CTICONTROL_EN ADI_CTI_CTICONTROL_GLBEN W Û GLBEN # reserved1 # © # VALUE32 # ) _ADI_CTI_CTICONTROL_t Û # ADI_CTI_CTICONTROL_t w INTACK # reserved8 # D # VALUE32 # Ä _ADI_CTI_CTIINTACK_t w # ADI_CTI_CTIINTACK_t APPSET # reserved4 # 6 Þ # VALUE32 # ^ _ADI_CTI_CTIAPPSET_t # ADI_CTI_CTIAPPSET_t 6 APPCLEAR # reserved4 # Ò x # VALUE32 # ü _ADI_CTI_CTIAPPCLEAR_t # ADI_CTI_CTIAPPCLEAR_t Ò Q Bit_0APPULSE # reserved4 # v # VALUE32 # _ADI_CTI_CTIAPPPULSE_t Q # ADI_CTI_CTIAPPPULSE_t v ñ TRIGINEN # reserved4 # ¼ # VALUE32 # = _ADI_CTI_CTIINEN0_t ñ # ADI_CTI_CTIINEN0_t TRIGINEN # reserved4 # ° V # VALUE32 # × _ADI_CTI_CTIINEN1_t # ADI_CTI_CTIINEN1_t ° % TRIGINEN # reserved4 # J ð # VALUE32 # q _ADI_CTI_CTIINEN2_t % # ADI_CTI_CTIINEN2_t J ¿ TRIGINEN # reserved4 # ä # VALUE32 # _ADI_CTI_CTIINEN3_t ¿ # ADI_CTI_CTIINEN3_t ä Y TRIGINEN # reserved4 # ~ $ # VALUE32 # ¥ _ADI_CTI_CTIINEN4_t Y # ADI_CTI_CTIINEN4_t ~ ó TRIGINEN # reserved4 # ¾ # VALUE32 # ? _ADI_CTI_CTIINEN5_t ó # ADI_CTI_CTIINEN5_t TRIGINEN # reserved4 # ² X # VALUE32 # Ù _ADI_CTI_CTIINEN6_t # ADI_CTI_CTIINEN6_t ² ' TRIGINEN # reserved4 # L ò # VALUE32 # s _ADI_CTI_CTIINEN7_t ' # ADI_CTI_CTIINEN7_t L  TRIGOUTEN # reserved4 # ç # VALUE32 # _ADI_CTI_CTIOUTEN0_t  # ADI_CTI_CTIOUTEN0_t ç _ TRIGOUTEN # reserved4 # ) # VALUE32 # ¬ _ADI_CTI_CTIOUTEN1_t _ # ADI_CTI_CTIOUTEN1_t ü TRIGOUTEN # reserved4 # !¡ Æ # VALUE32 # I¡ _ADI_CTI_CTIOUTEN2_t ü # ADI_CTI_CTIOUTEN2_t !¡ ¡ TRIGOUTEN # reserved4 # ¾¡ c¡ # VALUE32 # æ¡ _ADI_CTI_CTIOUTEN3_t ¡ # ADI_CTI_CTIOUTEN3_t ¾¡ 6¢ TRIGOUTEN # reserved4 # [¢ ¢ # VALUE32 # ¢ _ADI_CTI_CTIOUTEN4_t 6¢ # ADI_CTI_CTIOUTEN4_t [¢ Ó¢ TRIGOUTEN # reserved4 # ø¢ ¢ # VALUE32 # £ _ADI_CTI_CTIOUTEN5_t Ó¢ # ADI_CTI_CTIOUTEN5_t ø¢ p£ TRIGOUTEN # reserved4 # £ :£ # VALUE32 # ½£ _ADI_CTI_CTIOUTEN6_t p£ # ADI_CTI_CTIOUTEN6_t £ ¤ TRIGOUTEN # reserved4 # 2¤ ×£ # VALUE32 # Z¤ _ADI_CTI_CTIOUTEN7_t ¤ # ADI_CTI_CTIOUTEN7_t 2¤ ¤ TRIGINSTATUS # reserved8 # Ò¤ t¤ # VALUE32 # ¥ _ADI_CTI_CTITRIGINSTATUS_t ¤ # ADI_CTI_CTITRIGINSTATUS_t Ò¤ Z¥ TRIGOUTSTATUS # reserved8 # ¥ ¥ # VALUE32 # ®¥ _ADI_CTI_CTITRIGOUTSTATUS_t Z¥ # ADI_CTI_CTITRIGOUTSTATUS_t ¥ ¦ CTCHINSTATUS # reserved4 # -¦ Ï¥ # VALUE32 # Y¦ _ADI_CTI_CTICHINSTATUS_t ¦ # ADI_CTI_CTICHINSTATUS_t -¦ ±¦ CTCHOUTSTATUS # reserved4 # Ö¦ w¦ # VALUE32 # § _ADI_CTI_CTICHOUTSTATUS_t ±¦ # ADI_CTI_CTICHOUTSTATUS_t Ö¦ § CTIGATEEN0 # CTIGATEEN1 # CTIGATEEN2 # CTIGATEEN3 # reserved4 # ç "§ # VALUE32 # é§ _ADI_CTI_CTIGATE_t § # ADI_CTI_CTIGATE_t ç 5¨ ASICCTL # reserved8 # Z¨ ¨ # VALUE32 # ¨ _ADI_CTI_ASICCTL_t 5¨ # ADI_CTI_ASICCTL_t Z¨ Ψ CTCHINACK # reserved4 # ó¨ ¨ # VALUE32 # © _ADI_CTI_ITCHINACK_t Ψ # ADI_CTI_ITCHINACK_t ó¨ m© CTTRIGINACK # reserved8 # © 5© # VALUE32 # ¼© _ADI_CTI_ITTRIGINACK_t m© # ADI_CTI_ITTRIGINACK_t © ª CTCHOUT # reserved4 # 1ª Ø© # VALUE32 # Wª _ADI_CTI_ITCHOUT_t ª # ADI_CTI_ITCHOUT_t 1ª ¥ª CTTRIGOUT # reserved8 # ʪ oª # VALUE32 # òª _ADI_CTI_ITTRIGOUT_t ¥ª # ADI_CTI_ITTRIGOUT_t ʪ C« CTCHOUTACK # reserved4 # h« « # VALUE32 # « _ADI_CTI_ITCHOUTACK_t C« # ADI_CTI_ITCHOUTACK_t h« å« CTTRIGOUTACK # reserved8 #
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¬ ¬« # VALUE32 # 5¬ _ADI_CTI_ITTRIGOUTACK_t å« # ADI_CTI_ITTRIGOUTACK_t
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¬
¬ CTCHIN # reserved4 # ª¬ R¬ # VALUE32 # Ϭ _ADI_CTI_ITCHIN_t
¬ # ADI_CTI_ITCHIN_t ª¬ CTTRIGIN # reserved8 # @ æ¬ # VALUE32 # g _ADI_CTI_ITTRIGIN_t # ADI_CTI_ITTRIGIN_t @ ½ Integration_mode # reserved1 # â # VALUE32 # ® _ADI_CTI_ITCTRL_t ½ # ADI_CTI_ITCTRL_t â S® CLAIMSET # reserved4 # x® ® # VALUE32 # ® _ADI_CTI_CLAIMSET_t S® # ADI_CTI_CLAIMSET_t x® í® CLAIMCLR # reserved4 # ¯ ¸® # VALUE32 # 9¯ _ADI_CTI_CLAIMCLR_t í® # ADI_CTI_CLAIMCLR_t ¯ o¯ WACODE # ¯ R¯ # VALUE32 # ¶¯ _ADI_CTI_LAR_t o¯ # ADI_CTI_LAR_t ¯ ° LOCK # ACCESS # reserved2 # 3° ʯ # VALUE32 # U° _ADI_CTI_LSR_t ° # ADI_CTI_LSR_t 3° Û° IDBG_CTL # IDBG_EN # NDBG_CTL # NDBG_EN # reserved4 # ± i° # VALUE32 # )± _ADI_CTI_AUTHSTATUS_t Û° # ADI_CTI_AUTHSTATUS_t ± w± DEVID # reserved20 # ± D± # VALUE32 # À± _ADI_CTI_DEVID_t w± # ADI_CTI_DEVID_t ±
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² DEVTYPE # reserved8 # /² Ö± # VALUE32 # U² _ADI_CTI_DEVTYPE_t
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² # ADI_CTI_DEVTYPE_t /² ² PID4 # reserved8 # ò m² # VALUE32 # ë² _ADI_CTI_PERIPHID4_t ² # ADI_CTI_PERIPHID4_t ò 6³ PID5 # reserved8 # [³ ³ # VALUE32 # ³ _ADI_CTI_PERIPHID5_t 6³ # ADI_CTI_PERIPHID5_t [³ γ PID6 # reserved8 # ó³ ³ # VALUE32 # ´ _ADI_CTI_PERIPHID6_t γ # ADI_CTI_PERIPHID6_t ó³ f´ PID7 # reserved8 # ´ 5´ # VALUE32 # ³´ _ADI_CTI_PERIPHID7_t f´ # ADI_CTI_PERIPHID7_t ´ þ´ PID0 # reserved8 # #µ Í´ # VALUE32 # Kµ _ADI_CTI_PERIPHID0_t þ´ # ADI_CTI_PERIPHID0_t #µ µ PID1 # reserved8 # »µ eµ # VALUE32 # ãµ _ADI_CTI_PERIPHID1_t µ # ADI_CTI_PERIPHID1_t »µ .¶ PID2 # reserved8 # S¶ ýµ # VALUE32 # {¶ _ADI_CTI_PERIPHID2_t .¶ # ADI_CTI_PERIPHID2_t S¶ ƶ PID3 # reserved8 # ë¶ ¶ # VALUE32 # · _ADI_CTI_PERIPHID3_t ƶ # ADI_CTI_PERIPHID3_t ë¶ ]· ID0 # reserved8 # · -· # VALUE32 # ¨· _ADI_CTI_COMPID0_t ]· # ADI_CTI_COMPID0_t · ð· ID1 # reserved8 # ¸ À· # VALUE32 # ;¸ _ADI_CTI_COMPID1_t ð· # ADI_CTI_COMPID1_t ¸ ¸ ID2 # reserved8 # ¨¸ S¸ # VALUE32 # θ _ADI_CTI_COMPID2_t ¸ # ADI_CTI_COMPID2_t ¨¸ ¹ ID3 # reserved8 # ;¹ æ¸ # VALUE32 # a¹ _ADI_CTI_COMPID3_t ¹ # ADI_CTI_COMPID3_t ;¹ «¹ GLBEN # reserved1 # й y¹ # VALUE32 # þ¹ _ADI_CTI_CFG0_CTICONTROL_t «¹ # ADI_CTI_CFG0_CTICONTROL_t й Qº INTACK # reserved8 # vº º # VALUE32 # £º _ADI_CTI_CFG0_CTIINTACK_t Qº # ADI_CTI_CFG0_CTIINTACK_t vº õº APPSET # reserved4 # » º # VALUE32 # G» _ADI_CTI_CFG0_CTIAPPSET_t õº # ADI_CTI_CFG0_CTIAPPSET_t » » APPCLEAR # reserved4 # À» f» # VALUE32 # ï» _ADI_CTI_CFG0_CTIAPPCLEAR_t » # ADI_CTI_CFG0_CTIAPPCLEAR_t À» I¼ Bit_0APPULSE # reserved4 # n¼ ¼ # VALUE32 # ¼ _ADI_CTI_CFG0_CTIAPPPULSE_t I¼ # ADI_CTI_CFG0_CTIAPPPULSE_t n¼ ó¼ TRIGINEN # reserved4 # ½ ¾¼ # VALUE32 # D½ _ADI_CTI_CFG0_CTIINEN0_t ó¼ # ADI_CTI_CFG0_CTIINEN0_t ½ ½ TRIGINEN # reserved4 # ¼½ b½ # VALUE32 # è½ _ADI_CTI_CFG0_CTIINEN1_t ½ # ADI_CTI_CFG0_CTIINEN1_t ¼½ ;¾ TRIGINEN # reserved4 # `¾ ¾ # VALUE32 # ¾ _ADI_CTI_CFG0_CTIINEN2_t ;¾ # ADI_CTI_CFG0_CTIINEN2_t `¾ ß¾ TRIGINEN # reserved4 # ¿ ª¾ # VALUE32 # 0¿ _ADI_CTI_CFG0_CTIINEN3_t ß¾ # ADI_CTI_CFG0_CTIINEN3_t ¿ ¿ TRIGINEN # reserved4 # ¨¿ N¿ # VALUE32 # Ô¿ _ADI_CTI_CFG0_CTIINEN4_t ¿ # ADI_CTI_CFG0_CTIINEN4_t ¨¿ 'À TRIGINEN # reserved4 # LÀ ò¿ # VALUE32 # xÀ _ADI_CTI_CFG0_CTIINEN5_t 'À # ADI_CTI_CFG0_CTIINEN5_t LÀ ËÀ TRIGINEN # reserved4 # ðÀ À # VALUE32 # Á _ADI_CTI_CFG0_CTIINEN6_t ËÀ # ADI_CTI_CFG0_CTIINEN6_t ðÀ oÁ TRIGINEN # reserved4 # Á :Á # VALUE32 # ÀÁ _ADI_CTI_CFG0_CTIINEN7_t oÁ # ADI_CTI_CFG0_CTIINEN7_t Á  TRIGOUTEN # reserved4 # 9 ÞÁ # VALUE32 # f _ADI_CTI_CFG0_CTIOUTEN0_t  # ADI_CTI_CFG0_CTIOUTEN0_t 9 »Â TRIGOUTEN # reserved4 # àÂ
 # VALUE32 # à _ADI_CTI_CFG0_CTIOUTEN1_t »Â # ADI_CTI_CFG0_CTIOUTEN1_t à bà TRIGOUTEN # reserved4 # à ,à # VALUE32 # ´Ã _ADI_CTI_CFG0_CTIOUTEN2_t bà # ADI_CTI_CFG0_CTIOUTEN2_t Ã Ä TRIGOUTEN # reserved4 # .Ä Óà # VALUE32 # [Ä _ADI_CTI_CFG0_CTIOUTEN3_t Ä # ADI_CTI_CFG0_CTIOUTEN3_t .Ä °Ä TRIGOUTEN # reserved4 # ÕÄ zÄ # VALUE32 # Å _ADI_CTI_CFG0_CTIOUTEN4_t °Ä # ADI_CTI_CFG0_CTIOUTEN4_t ÕÄ WÅ TRIGOUTEN # reserved4 # |Å !Å # VALUE32 # ©Å _ADI_CTI_CFG0_CTIOUTEN5_t WÅ # ADI_CTI_CFG0_CTIOUTEN5_t |Å þÅ TRIGOUTEN # reserved4 # #Æ ÈÅ # VALUE32 # PÆ _ADI_CTI_CFG0_CTIOUTEN6_t þÅ # ADI_CTI_CFG0_CTIOUTEN6_t #Æ ¥Æ TRIGOUTEN # reserved4 # ÊÆ oÆ # VALUE32 # ÷Æ _ADI_CTI_CFG0_CTIOUTEN7_t ¥Æ # ADI_CTI_CFG0_CTIOUTEN7_t ÊÆ OÇ TRIGINSTATUS # reserved8 # tÇ Ç # VALUE32 # §Ç _ADI_CTI_CFG0_CTITRIGINSTATUS_t OÇ # ADI_CTI_CFG0_CTITRIGINSTATUS_t tÇ È TRIGOUTSTATUS # reserved8 # +È ÌÇ # VALUE32 # _È _ADI_CTI_CFG0_CTITRIGOUTSTATUS_t È # ADI_CTI_CFG0_CTITRIGOUTSTATUS_t +È ¾È CTCHINSTATUS # reserved4 # ãÈ
È # VALUE32 # É _ADI_CTI_CFG0_CTICHINSTATUS_t ¾È # ADI_CTI_CFG0_CTICHINSTATUS_t ãÈ qÉ CTCHOUTSTATUS # reserved4 # É 7É # VALUE32 # ÈÉ _ADI_CTI_CFG0_CTICHOUTSTATUS_t qÉ # ADI_CTI_CFG0_CTICHOUTSTATUS_t É hÊ CTIGATEEN0 # CTIGATEEN1 # CTIGATEEN2 # CTIGATEEN3 # reserved4 # Ê ìÉ # VALUE32 # ¸Ê _ADI_CTI_CFG0_CTIGATE_t hÊ # ADI_CTI_CFG0_CTIGATE_t Ê Ë ASICCTL # reserved8 # .Ë ÕÊ # VALUE32 # YË _ADI_CTI_CFG0_ASICCTL_t Ë # ADI_CTI_CFG0_ASICCTL_t .Ë ¬Ë CTCHINACK # reserved4 # ÑË vË # VALUE32 # þË _ADI_CTI_CFG0_ITCHINACK_t ¬Ë # ADI_CTI_CFG0_ITCHINACK_t ÑË UÌ CTTRIGINACK # reserved8 # zÌ Ì # VALUE32 # ©Ì _ADI_CTI_CFG0_ITTRIGINACK_t UÌ # ADI_CTI_CFG0_ITTRIGINACK_t zÌ þÌ CTCHOUT # reserved4 # #Í ÊÌ # VALUE32 # NÍ _ADI_CTI_CFG0_ITCHOUT_t þÌ # ADI_CTI_CFG0_ITCHOUT_t #Í ¡Í CTTRIGOUT # reserved8 # ÆÍ kÍ # VALUE32 # óÍ _ADI_CTI_CFG0_ITTRIGOUT_t ¡Í # ADI_CTI_CFG0_ITTRIGOUT_t ÆÍ IÎ CTCHOUTACK # reserved4 # nÎ Î # VALUE32 # Î _ADI_CTI_CFG0_ITCHOUTACK_t IÎ # ADI_CTI_CFG0_ITCHOUTACK_t nÎ õÎ CTTRIGOUTACK # reserved8 # Ï ¼Î # VALUE32 # JÏ _ADI_CTI_CFG0_ITTRIGOUTACK_t õÎ # ADI_CTI_CFG0_ITTRIGOUTACK_t Ï Ï CTCHIN # reserved4 # ÄÏ lÏ # VALUE32 # îÏ _ADI_CTI_CFG0_ITCHIN_t Ï # ADI_CTI_CFG0_ITCHIN_t ÄÏ ?Ð CTTRIGIN # reserved8 # dÐ
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Ð # VALUE32 # Ð _ADI_CTI_CFG0_ITTRIGIN_t ?Ð # ADI_CTI_CFG0_ITTRIGIN_t dÐ ëÐ Integration_mode # reserved1 # Ñ ®Ð # VALUE32 # :Ñ _ADI_CTI_CFG0_ITCTRL_t ëÐ # ADI_CTI_CFG0_ITCTRL_t Ñ Ñ CLAIMSET # reserved4 # °Ñ VÑ # VALUE32 # ÜÑ _ADI_CTI_CFG0_CLAIMSET_t Ñ # ADI_CTI_CFG0_CLAIMSET_t °Ñ /Ò CLAIMCLR # reserved4 # TÒ úÑ # VALUE32 # Ò _ADI_CTI_CFG0_CLAIMCLR_t /Ò # ADI_CTI_CFG0_CLAIMCLR_t TÒ »Ò WACODE # àÒ Ò # VALUE32 # Ó _ADI_CTI_CFG0_LAR_t »Ò # ADI_CTI_CFG0_LAR_t àÒ dÓ LOCK # ACCESS # reserved2 # Ó Ó # VALUE32 # °Ó _ADI_CTI_CFG0_LSR_t dÓ # ADI_CTI_CFG0_LSR_t Ó ;Ô IDBG_CTL # IDBG_EN # NDBG_CTL # NDBG_EN # reserved4 # `Ô ÉÓ # VALUE32 # Ô _ADI_CTI_CFG0_AUTHSTATUS_t ;Ô # ADI_CTI_CFG0_AUTHSTATUS_t `Ô áÔ DEVID # reserved20 # Õ ®Ô # VALUE32 # /Õ _ADI_CTI_CFG0_DEVID_t áÔ # ADI_CTI_CFG0_DEVID_t Õ ~Õ DEVTYPE # reserved8 # £Õ JÕ # VALUE32 # ÎÕ _ADI_CTI_CFG0_DEVTYPE_t ~Õ # ADI_CTI_CFG0_DEVTYPE_t £Õ Ö PID4 # reserved8 # AÖ ëÕ # VALUE32 # nÖ _ADI_CTI_CFG0_PERIPHID4_t Ö # ADI_CTI_CFG0_PERIPHID4_t AÖ ¾Ö PID5 # reserved8 # ãÖ Ö # VALUE32 # × _ADI_CTI_CFG0_PERIPHID5_t ¾Ö # ADI_CTI_CFG0_PERIPHID5_t ãÖ `× PID6 # reserved8 #
× /× # VALUE32 # ²× _ADI_CTI_CFG0_PERIPHID6_t `× # ADI_CTI_CFG0_PERIPHID6_t
× Ø PID7 # reserved8 # 'Ø Ñ× # VALUE32 # TØ _ADI_CTI_CFG0_PERIPHID7_t Ø # ADI_CTI_CFG0_PERIPHID7_t 'Ø ¤Ø PID0 # reserved8 # ÉØ sØ # VALUE32 # öØ _ADI_CTI_CFG0_PERIPHID0_t ¤Ø # ADI_CTI_CFG0_PERIPHID0_t ÉØ FÙ PID1 # reserved8 # kÙ Ù # VALUE32 # Ù _ADI_CTI_CFG0_PERIPHID1_t FÙ # ADI_CTI_CFG0_PERIPHID1_t kÙ èÙ PID2 # reserved8 # Ú ·Ù # VALUE32 # :Ú _ADI_CTI_CFG0_PERIPHID2_t èÙ # ADI_CTI_CFG0_PERIPHID2_t Ú Ú PID3 # reserved8 # ¯Ú YÚ # VALUE32 # ÜÚ _ADI_CTI_CFG0_PERIPHID3_t Ú # ADI_CTI_CFG0_PERIPHID3_t ¯Ú +Û ID0 # reserved8 # PÛ ûÚ # VALUE32 # {Û _ADI_CTI_CFG0_COMPID0_t +Û # ADI_CTI_CFG0_COMPID0_t PÛ ÈÛ ID1 # reserved8 # íÛ Û # VALUE32 # Ü _ADI_CTI_CFG0_COMPID1_t ÈÛ # ADI_CTI_CFG0_COMPID1_t íÛ eÜ ID2 # reserved8 # Ü 5Ü # VALUE32 # µÜ _ADI_CTI_CFG0_COMPID2_t eÜ # ADI_CTI_CFG0_COMPID2_t Ü Ý ID3 # reserved8 # 'Ý ÒÜ # VALUE32 # RÝ _ADI_CTI_CFG0_COMPID3_t Ý # ADI_CTI_CFG0_COMPID3_t 'Ý Þ CSPFT_A CSPFT_NOT_A CSPFT_A_AND_B CSPFT_NOT_A_AND_B CSPFT_NOT_A_AND_NOT_B CSPFT_A_OR_B CSPFT_NOT_A_OR_B CSPFT_NOT_A_OR_NOT_B FUNC oÝ íà CSPFT_ADDR_COMP0 CSPFT_ADDR_COMP1 CSPFT_ADDR_COMP2 CSPFT_ADDR_COMP3 CSPFT_ADDR_COMP4 CSPFT_ADDR_COMP5 CSPFT_ADDR_COMP6 CSPFT_ADDR_COMP7 CSPFT_ADDR_COMP8 CSPFT_ADDR_COMP9 CSPFT_ADDR_COMP10
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CSPFT_ADDR_COMP11 CSPFT_ADDR_COMP12 CSPFT_ADDR_COMP13 CSPFT_ADDR_COMP14 CSPFT_ADDR_COMP15 CSPFT_ADDR_RANGE0 CSPFT_ADDR_RANGE1 CSPFT_ADDR_RANGE2 CSPFT_ADDR_RANGE3 CSPFT_ADDR_RANGE4 CSPFT_ADDR_RANGE5 CSPFT_ADDR_RANGE6 CSPFT_ADDR_RANGE7 CSPFT_CNT0_ZERO À CSPFT_CNT1_ZERO Á CSPFT_CNT2_ZERO Â CSPFT_CNT3_ZERO Ã CSPFT_CID_COMP0 Ø CSPFT_CID_COMP1 Ù CSPFT_CID_COMP2 Ú CSPFT_TSS ß CSPFT_EXT_INP0 à CSPFT_EXT_INP1 á CSPFT_EXT_INP2 â CSPFT_EXT_INP3 ã CSPFT_TRC_PROHIB î CSPFT_TRUE ï RESA Þ vá reserved0 #
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TSI # RSI # reserved24 # VEI # reserved27 # á øà # VALUE32 # Àá _ADI_CSPFT_CCER_t vá # ADI_CSPFT_CCER_t á
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â COMPID # reserved8 # /â ×á # VALUE32 # Tâ _ADI_CSPFT_CID0_t
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â # ADI_CSPFT_CID0_t /â â COMPID # reserved8 # Ãâ kâ # VALUE32 # èâ _ADI_CSPFT_CID1_t â # ADI_CSPFT_CID1_t Ãâ 2ã COMPID # reserved8 # Wã ÿâ # VALUE32 # |ã _ADI_CSPFT_CID2_t 2ã # ADI_CSPFT_CID2_t Wã Æã COMPID # reserved8 # ëã ã # VALUE32 # ä _ADI_CSPFT_CID3_t Æã # ADI_CSPFT_CID3_t ëã Xä TAGS # reserved4 # }ä 'ä # VALUE32 # ¦ä _ADI_CSPFT_CLAIMSET_t Xä # ADI_CSPFT_CLAIMSET_t }ä òä TAGS # reserved4 # å Áä # VALUE32 # @å _ADI_CSPFT_CLAIMCLR_t òä # ADI_CSPFT_CLAIMCLR_t å wå VALUE # å [å # VALUE32 # Àå _ADI_CSPFT_LAR_t wå # ADI_CSPFT_LAR_t å æ CSPFT_LSR_NOLOCK CSPFT_LSR_LOCKREQ ADI_CSPFT_LSR_LOCKEN Öå Tæ CSPFT_LSR_UNLOCKED CSPFT_LSR_LOCKED ADI_CSPFT_LSR_LOCKED "æ µæ LOCKEN # LOCKED # reserved2 # Úæ oæ # VALUE32 # þæ _ADI_CSPFT_LSR_t µæ # ADI_CSPFT_LSR_t Úæ lç reserved0 # DBGEN # ONE # reserved8 # ç ç # VALUE32 # ¼ç _ADI_CSPFT_AUTHSTATUS_t lç # ADI_CSPFT_AUTHSTATUS_t ç è TYPE # STYPE # reserved8 # Aè Ùç # VALUE32 # iè _ADI_CSPFT_DEVTYPE_t è # ADI_CSPFT_DEVTYPE_t Aè Êè JEOP106CC # SIZE # reserved8 # ïè è # VALUE32 # é _ADI_CSPFT_PID4_t Êè # ADI_CSPFT_PID4_t ïè _é PARTNUM # reserved8 # é +é # VALUE32 # ©é _ADI_CSPFT_PID0_t _é # ADI_CSPFT_PID0_t é ê PARTNUM # JEP106 # reserved8 # ,ê Àé # VALUE32 # Qê _ADI_CSPFT_PID1_t ê # ADI_CSPFT_PID1_t ,ê Áê JEP106 # JEDECASGN # REV # reserved8 # æê hê # VALUE32 # ë _ADI_CSPFT_PID2_t Áê # ADI_CSPFT_PID2_t æê ië CUSTMOD # REVAND # reserved8 # ë "ë # VALUE32 # ³ë _ADI_CSPFT_PID3_t ië # ADI_CSPFT_PID3_t ë åë ADDR #
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ì Êë # VALUE32 # /ì _ADI_CSPFT_ACVR_t åë # ADI_CSPFT_ACVR_t
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ì ì reserved0 # CIDCTRL # reserved10 # ¶ì Fì # VALUE32 # Ûì _ADI_CSPFT_ACTR_t ì # ADI_CSPFT_ACTR_t ¶ì ²í reserved0 # BBRAN # reserved9 # PB # reserved11 # CIDSZ # reserved16 # RSENA # reserved30 # ×í òì # VALUE32 # ûí _ADI_CSPFT_CTL_t ²í # ADI_CSPFT_CTL_t ×í Îî NACMP # reserved4 # NCNTR # reserved16 # NEXI # NEXO # reserved23 # NCIDC # reserved26 # óî î # VALUE32 # ï _ADI_CSPFT_HWFEAT_t Îî # ADI_CSPFT_HWFEAT_t óî ï RESA # RESB # FUNC # reserved17 # ¬ï 3ï # VALUE32 # Ôï _ADI_CSPFT_TRIGGER_t ï # ADI_CSPFT_TRIGGER_t ¬ï Mð OF # PB # TSS # TRIG # reserved4 # rð îï # VALUE32 # ð _ADI_CSPFT_STAT_t Mð # ADI_CSPFT_STAT_t rð Ûð START # STOP # ñ ®ð # VALUE32 # 'ñ _ADI_CSPFT_TSSCTL_t Ûð # ADI_CSPFT_TSSCTL_t ñ ñ RESA # RESB # FUNC # reserved17 # ¹ñ @ñ # VALUE32 # áñ _ADI_CSPFT_TEEVENT_t ñ # ADI_CSPFT_TEEVENT_t ¹ñ -ò CSPFT_TECTL_TRINC CSPFT_TECTL_TREXC ADI_CSPFT_TECTL_EXCL ûñ |ò CSPFT_TECTL_TSSDIS CSPFT_TECTL_TSSENA ADI_CSPFT_TECTL_TSSCENA Hò ó ARCS # reserved8 # EXCL # TSSCENA # reserved26 # ,ó ò # VALUE32 # Ró _ADI_CSPFT_TECTL_t ó # ADI_CSPFT_TECTL_t ,ó ¾ó RESA # RESB # FUNC # reserved17 # ãó jó # VALUE32 # ô _ADI_CSPFT_EXTOUTEVR_t ¾ó # ADI_CSPFT_EXTOUTEVR_t ãó Eô VALUE # jô )ô # VALUE32 # ô _ADI_CSPFT_CIDCVR_t Eô # ADI_CSPFT_CIDCVR_t jô Åô MASK # êô ªô # VALUE32 # õ _ADI_CSPFT_CIDCMR_t Åô # ADI_CSPFT_CIDCMR_t êô ]õ SFREQ # reserved12 # õ *õ # VALUE32 # ©õ _ADI_CSPFT_SYNCFR_t ]õ # ADI_CSPFT_SYNCFR_t õ òõ TID # reserved7 # ö Âõ # VALUE32 # @ö _ADI_CSPFT_TRACEIDR_t òõ # ADI_CSPFT_TRACEIDR_t ö ö VALUE # reserved16 # ³ö [ö # VALUE32 # Üö _ADI_CSPFT_CNTRLDVR_t ö # ADI_CSPFT_CNTRLDVR_t ³ö K÷ RESA # RESB # FUNC # reserved17 # p÷ ÷ö # VALUE32 # ÷ _ADI_CSPFT_CNTENR_t K÷ # ADI_CSPFT_CNTENR_t p÷ ø RESA # RESB # FUNC # reserved17 # )ø °÷ # VALUE32 # Sø _ADI_CSPFT_CNTRLDEVR_t ø # ADI_CSPFT_CNTRLDEVR_t )ø ¢ø VALUE # reserved16 # Çø oø # VALUE32 # íø _ADI_CSPFT_CNTVR_t ¢ø # ADI_CSPFT_CNTVR_t Çø Rù reserved0 # FlushMan_R # reserved7 # wù ù # VALUE32 # ù _ADI_CSTMC_FFCR_t Rù # ADI_CSTMC_FFCR_t wù ú reserved0 # FlushMan_R # reserved7 # %ú ³ù # VALUE32 # Oú _ADI_CSTMC_CFG0_FFCR_t ú # ADI_CSTMC_CFG0_FFCR_t %ú ¸ú reserved0 # FlushMan_R # reserved7 # Ýú kú # VALUE32 # û _ADI_CSTMC_CFG1_FFCR_t ¸ú # ADI_CSTMC_CFG1_FFCR_t Ýú Uû GLBEN # reserved1 # zû #û # VALUE32 # ¨û _ADI_CTI_CFG1_CTICONTROL_t Uû # ADI_CTI_CFG1_CTICONTROL_t zû ûû INTACK # reserved8 # ü Èû # VALUE32 # Mü _ADI_CTI_CFG1_CTIINTACK_t ûû # ADI_CTI_CFG1_CTIINTACK_t ü ü APPSET # reserved4 # Äü lü # VALUE32 # ñü _ADI_CTI_CFG1_CTIAPPSET_t ü # ADI_CTI_CFG1_CTIAPPSET_t Äü Eý APPCLEAR # reserved4 # jý ý # VALUE32 # ý _ADI_CTI_CFG1_CTIAPPCLEAR_t Eý # ADI_CTI_CFG1_CTIAPPCLEAR_t jý óý Bit_0APPULSE # reserved4 # þ ºý # VALUE32 # Gþ _ADI_CTI_CFG1_CTIAPPPULSE_t óý # ADI_CTI_CFG1_CTIAPPPULSE_t þ þ TRIGINEN # reserved4 # Âþ hþ # VALUE32 # îþ _ADI_CTI_CFG1_CTIINEN0_t þ # ADI_CTI_CFG1_CTIINEN0_t Âþ Aÿ TRIGINEN # reserved4 # fÿ ÿ # VALUE32 # ÿ _ADI_CTI_CFG1_CTIINEN1_t Aÿ # ADI_CTI_CFG1_CTIINEN1_t fÿ åÿ TRIGINEN # reserved4 #
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°ÿ # VALUE32 # 6 _ADI_CTI_CFG1_CTIINEN2_t åÿ # ADI_CTI_CFG1_CTIINEN2_t
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TRIGINEN # reserved4 # ® T # VALUE32 # Ú _ADI_CTI_CFG1_CTIINEN3_t # ADI_CTI_CFG1_CTIINEN3_t ® - TRIGINEN # reserved4 # R ø # VALUE32 # ~ _ADI_CTI_CFG1_CTIINEN4_t - # ADI_CTI_CFG1_CTIINEN4_t R Ñ TRIGINEN # reserved4 # ö # VALUE32 # " _ADI_CTI_CFG1_CTIINEN5_t Ñ # ADI_CTI_CFG1_CTIINEN5_t ö u TRIGINEN # reserved4 # @ # VALUE32 # Æ _ADI_CTI_CFG1_CTIINEN6_t u # ADI_CTI_CFG1_CTIINEN6_t TRIGINEN # reserved4 # > ä # VALUE32 # j _ADI_CTI_CFG1_CTIINEN7_t # ADI_CTI_CFG1_CTIINEN7_t > ¾ TRIGOUTEN # reserved4 # ã # VALUE32 # _ADI_CTI_CFG1_CTIOUTEN0_t ¾ # ADI_CTI_CFG1_CTIOUTEN0_t ã e TRIGOUTEN # reserved4 # / # VALUE32 # · _ADI_CTI_CFG1_CTIOUTEN1_t e # ADI_CTI_CFG1_CTIOUTEN1_t TRIGOUTEN # reserved4 # 1 Ö # VALUE32 # ^ _ADI_CTI_CFG1_CTIOUTEN2_t # ADI_CTI_CFG1_CTIOUTEN2_t 1 ³ TRIGOUTEN # reserved4 # Ø } # VALUE32 # _ADI_CTI_CFG1_CTIOUTEN3_t ³ # ADI_CTI_CFG1_CTIOUTEN3_t Ø Z TRIGOUTEN # reserved4 # $ # VALUE32 # ¬ _ADI_CTI_CFG1_CTIOUTEN4_t Z # ADI_CTI_CFG1_CTIOUTEN4_t TRIGOUTEN # reserved4 # & Ë # VALUE32 # S _ADI_CTI_CFG1_CTIOUTEN5_t # ADI_CTI_CFG1_CTIOUTEN5_t & ¨ TRIGOUTEN # reserved4 # Í r # VALUE32 # ú _ADI_CTI_CFG1_CTIOUTEN6_t ¨ # ADI_CTI_CFG1_CTIOUTEN6_t Í O TRIGOUTEN # reserved4 # t # VALUE32 # ¡ _ADI_CTI_CFG1_CTIOUTEN7_t O # ADI_CTI_CFG1_CTIOUTEN7_t t ù TRIGINSTATUS # reserved8 # À # VALUE32 # Q _ADI_CTI_CFG1_CTITRIGINSTATUS_t ù # ADI_CTI_CFG1_CTITRIGINSTATUS_t ° TRIGOUTSTATUS # reserved8 # Õ v # VALUE32 #
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_ADI_CTI_CFG1_CTITRIGOUTSTATUS_t ° # ADI_CTI_CFG1_CTITRIGOUTSTATUS_t Õ h
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CTCHINSTATUS # reserved4 #
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/
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# VALUE32 # ¾
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_ADI_CTI_CFG1_CTICHINSTATUS_t h
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# ADI_CTI_CFG1_CTICHINSTATUS_t
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CTCHOUTSTATUS # reserved4 # @ á
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# VALUE32 # r _ADI_CTI_CFG1_CTICHOUTSTATUS_t # ADI_CTI_CFG1_CTICHOUTSTATUS_t @ CTIGATEEN0 # CTIGATEEN1 # CTIGATEEN2 # CTIGATEEN3 # reserved4 # 7 # VALUE32 # b _ADI_CTI_CFG1_CTIGATE_t # ADI_CTI_CFG1_CTIGATE_t 7 ³ ASICCTL # reserved8 # Ø # VALUE32 # _ADI_CTI_CFG1_ASICCTL_t ³ # ADI_CTI_CFG1_ASICCTL_t Ø V CTCHINACK # reserved4 # { # VALUE32 # ¨ _ADI_CTI_CFG1_ITCHINACK_t V # ADI_CTI_CFG1_ITCHINACK_t { ÿ CTTRIGINACK # reserved8 # $ Ç # VALUE32 # S _ADI_CTI_CFG1_ITTRIGINACK_t ÿ # ADI_CTI_CFG1_ITTRIGINACK_t $ ¨ CTCHOUT # reserved4 # Í t # VALUE32 # ø _ADI_CTI_CFG1_ITCHOUT_t ¨ # ADI_CTI_CFG1_ITCHOUT_t Í K CTTRIGOUT # reserved8 # p # VALUE32 # _ADI_CTI_CFG1_ITTRIGOUT_t K # ADI_CTI_CFG1_ITTRIGOUT_t p ó CTCHOUTACK # reserved4 # ¼ # VALUE32 # F _ADI_CTI_CFG1_ITCHOUTACK_t ó # ADI_CTI_CFG1_ITCHOUTACK_t CTTRIGOUTACK # reserved8 # Ä f # VALUE32 # ô _ADI_CTI_CFG1_ITTRIGOUTACK_t # ADI_CTI_CFG1_ITTRIGOUTACK_t Ä I CTCHIN # reserved4 # n # VALUE32 # _ADI_CTI_CFG1_ITCHIN_t I # ADI_CTI_CFG1_ITCHIN_t n é CTTRIGIN # reserved8 # ´ # VALUE32 # : _ADI_CTI_CFG1_ITTRIGIN_t é # ADI_CTI_CFG1_ITTRIGIN_t Integration_mode # reserved1 # º X # VALUE32 # ä _ADI_CTI_CFG1_ITCTRL_t # ADI_CTI_CFG1_ITCTRL_t º 5 CLAIMSET # reserved4 # Z # VALUE32 # _ADI_CTI_CFG1_CLAIMSET_t 5 # ADI_CTI_CFG1_CLAIMSET_t Z Ù CLAIMCLR # reserved4 # þ ¤ # VALUE32 # * _ADI_CTI_CFG1_CLAIMCLR_t Ù # ADI_CTI_CFG1_CLAIMCLR_t þ e WACODE # H # VALUE32 # ± _ADI_CTI_CFG1_LAR_t e # ADI_CTI_CFG1_LAR_t LOCK # ACCESS # reserved2 # 3 Ê # VALUE32 # Z _ADI_CTI_CFG1_LSR_t # ADI_CTI_CFG1_LSR_t 3 å IDBG_CTL # IDBG_EN # NDBG_CTL # NDBG_EN # reserved4 #
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s # VALUE32 # 8 _ADI_CTI_CFG1_AUTHSTATUS_t å # ADI_CTI_CFG1_AUTHSTATUS_t
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DEVID # reserved20 # ° X # VALUE32 # Ù _ADI_CTI_CFG1_DEVID_t # ADI_CTI_CFG1_DEVID_t ° ( DEVTYPE # reserved8 # M ô # VALUE32 # x _ADI_CTI_CFG1_DEVTYPE_t ( # ADI_CTI_CFG1_DEVTYPE_t M Æ PID4 # reserved8 # ë # VALUE32 # _ADI_CTI_CFG1_PERIPHID4_t Æ # ADI_CTI_CFG1_PERIPHID4_t ë h PID5 # reserved8 # 7 # VALUE32 # º _ADI_CTI_CFG1_PERIPHID5_t h # ADI_CTI_CFG1_PERIPHID5_t
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PID6 # reserved8 # / Ù # VALUE32 # \ _ADI_CTI_CFG1_PERIPHID6_t
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# ADI_CTI_CFG1_PERIPHID6_t / ¬ PID7 # reserved8 # Ñ { # VALUE32 # þ _ADI_CTI_CFG1_PERIPHID7_t ¬ # ADI_CTI_CFG1_PERIPHID7_t Ñ N PID0 # reserved8 # s # VALUE32 # _ADI_CTI_CFG1_PERIPHID0_t N # ADI_CTI_CFG1_PERIPHID0_t s ð PID1 # reserved8 # ¿ # VALUE32 # B _ADI_CTI_CFG1_PERIPHID1_t ð # ADI_CTI_CFG1_PERIPHID1_t PID2 # reserved8 # · a # VALUE32 # ä _ADI_CTI_CFG1_PERIPHID2_t # ADI_CTI_CFG1_PERIPHID2_t · 4 PID3 # reserved8 # Y # VALUE32 # _ADI_CTI_CFG1_PERIPHID3_t 4 # ADI_CTI_CFG1_PERIPHID3_t Y Õ ID0 # reserved8 # ú ¥ # VALUE32 # % _ADI_CTI_CFG1_COMPID0_t Õ # ADI_CTI_CFG1_COMPID0_t ú r ID1 # reserved8 # B # VALUE32 # Â _ADI_CTI_CFG1_COMPID1_t r # ADI_CTI_CFG1_COMPID1_t ID2 # reserved8 # 4 ß # VALUE32 # _ _ADI_CTI_CFG1_COMPID2_t # ADI_CTI_CFG1_COMPID2_t 4 ¬ ID3 # reserved8 # Ñ | # VALUE32 # ü _ADI_CTI_CFG1_COMPID3_t ¬ # ADI_CTI_CFG1_COMPID3_t Ñ K GLBEN # reserved1 # p # VALUE32 # _ADI_CTI_CFG2_CTICONTROL_t K # ADI_CTI_CFG2_CTICONTROL_t p ñ INTACK # reserved8 # ¾ # VALUE32 # C _ADI_CTI_CFG2_CTIINTACK_t ñ # ADI_CTI_CFG2_CTIINTACK_t APPSET # reserved4 # º b # VALUE32 # ç _ADI_CTI_CFG2_CTIAPPSET_t # ADI_CTI_CFG2_CTIAPPSET_t º ;! APPCLEAR # reserved4 # `! ! # VALUE32 # ! _ADI_CTI_CFG2_CTIAPPCLEAR_t ;! # ADI_CTI_CFG2_CTIAPPCLEAR_t `! é! Bit_0APPULSE # reserved4 # " °! # VALUE32 # =" _ADI_CTI_CFG2_CTIAPPPULSE_t é! # ADI_CTI_CFG2_CTIAPPPULSE_t " " TRIGINEN # reserved4 # ¸" ^" # VALUE32 # ä" _ADI_CTI_CFG2_CTIINEN0_t " # ADI_CTI_CFG2_CTIINEN0_t ¸" 7# TRIGINEN # reserved4 # \# # # VALUE32 # # _ADI_CTI_CFG2_CTIINEN1_t 7# # ADI_CTI_CFG2_CTIINEN1_t \# Û# TRIGINEN # reserved4 # $ ¦# # VALUE32 # ,$ _ADI_CTI_CFG2_CTIINEN2_t Û# # ADI_CTI_CFG2_CTIINEN2_t $ $ TRIGINEN # reserved4 # ¤$ J$ # VALUE32 # Ð$ _ADI_CTI_CFG2_CTIINEN3_t $ # ADI_CTI_CFG2_CTIINEN3_t ¤$ #% TRIGINEN # reserved4 # H% î$ # VALUE32 # t% _ADI_CTI_CFG2_CTIINEN4_t #% # ADI_CTI_CFG2_CTIINEN4_t H% Ç% TRIGINEN # reserved4 # ì% % # VALUE32 # & _ADI_CTI_CFG2_CTIINEN5_t Ç% # ADI_CTI_CFG2_CTIINEN5_t ì% k& TRIGINEN # reserved4 # & 6& # VALUE32 # ¼& _ADI_CTI_CFG2_CTIINEN6_t k& # ADI_CTI_CFG2_CTIINEN6_t & ' TRIGINEN # reserved4 # 4' Ú& # VALUE32 # `' _ADI_CTI_CFG2_CTIINEN7_t ' # ADI_CTI_CFG2_CTIINEN7_t 4' ´' TRIGOUTEN # reserved4 # Ù' ~' # VALUE32 # ( _ADI_CTI_CFG2_CTIOUTEN0_t ´' # ADI_CTI_CFG2_CTIOUTEN0_t Ù' [( TRIGOUTEN # reserved4 # ( %( # VALUE32 # ( _ADI_CTI_CFG2_CTIOUTEN1_t [( # ADI_CTI_CFG2_CTIOUTEN1_t ( ) TRIGOUTEN # reserved4 # ') Ì( # VALUE32 # T) _ADI_CTI_CFG2_CTIOUTEN2_t ) # ADI_CTI_CFG2_CTIOUTEN2_t ') ©) TRIGOUTEN # reserved4 # Î) s) # VALUE32 # û) _ADI_CTI_CFG2_CTIOUTEN3_t ©) # ADI_CTI_CFG2_CTIOUTEN3_t Î) P* TRIGOUTEN # reserved4 # u* * # VALUE32 # ¢* _ADI_CTI_CFG2_CTIOUTEN4_t P* # ADI_CTI_CFG2_CTIOUTEN4_t u* ÷* TRIGOUTEN # reserved4 # + Á* # VALUE32 # I+ _ADI_CTI_CFG2_CTIOUTEN5_t ÷* # ADI_CTI_CFG2_CTIOUTEN5_t + + TRIGOUTEN # reserved4 # Ã+ h+ # VALUE32 # ð+ _ADI_CTI_CFG2_CTIOUTEN6_t + # ADI_CTI_CFG2_CTIOUTEN6_t Ã+ E, TRIGOUTEN # reserved4 # j, , # VALUE32 # , _ADI_CTI_CFG2_CTIOUTEN7_t E, # ADI_CTI_CFG2_CTIOUTEN7_t j, ï, TRIGINSTATUS # reserved8 # - ¶, # VALUE32 # G- _ADI_CTI_CFG2_CTITRIGINSTATUS_t ï, # ADI_CTI_CFG2_CTITRIGINSTATUS_t - ¦- TRIGOUTSTATUS # reserved8 # Ë- l- # VALUE32 # ÿ- _ADI_CTI_CFG2_CTITRIGOUTSTATUS_t ¦- # ADI_CTI_CFG2_CTITRIGOUTSTATUS_t Ë- ^. CTCHINSTATUS # reserved4 # . %. # VALUE32 # ´. _ADI_CTI_CFG2_CTICHINSTATUS_t ^. # ADI_CTI_CFG2_CTICHINSTATUS_t . / CTCHOUTSTATUS # reserved4 # 6/ ×. # VALUE32 # h/ _ADI_CTI_CFG2_CTICHOUTSTATUS_t / # ADI_CTI_CFG2_CTICHOUTSTATUS_t 6/ 0 CTIGATEEN0 # CTIGATEEN1 # CTIGATEEN2 # CTIGATEEN3 # reserved4 # -0 / # VALUE32 # X0 _ADI_CTI_CFG2_CTIGATE_t 0 # ADI_CTI_CFG2_CTIGATE_t -0 ©0 ASICCTL # reserved8 # Î0 u0 # VALUE32 # ù0 _ADI_CTI_CFG2_ASICCTL_t ©0 # ADI_CTI_CFG2_ASICCTL_t Î0 L1 CTCHINACK # reserved4 # q1 1 # VALUE32 # 1 _ADI_CTI_CFG2_ITCHINACK_t L1 # ADI_CTI_CFG2_ITCHINACK_t q1 õ1 CTTRIGINACK # reserved8 # 2 ½1 # VALUE32 # I2 _ADI_CTI_CFG2_ITTRIGINACK_t õ1 # ADI_CTI_CFG2_ITTRIGINACK_t 2 2 CTCHOUT # reserved4 # Ã2 j2 # VALUE32 # î2 _ADI_CTI_CFG2_ITCHOUT_t 2 # ADI_CTI_CFG2_ITCHOUT_t Ã2 A3 CTTRIGOUT # reserved8 # f3 3 # VALUE32 # 3 _ADI_CTI_CFG2_ITTRIGOUT_t A3 # ADI_CTI_CFG2_ITTRIGOUT_t f3 é3 CTCHOUTACK # reserved4 # 4 ²3 # VALUE32 # <4 _ADI_CTI_CFG2_ITCHOUTACK_t é3 # ADI_CTI_CFG2_ITCHOUTACK_t 4 4 CTTRIGOUTACK # reserved8 # º4 \4 # VALUE32 # ê4 _ADI_CTI_CFG2_ITTRIGOUTACK_t 4 # ADI_CTI_CFG2_ITTRIGOUTACK_t º4 ?5 CTCHIN # reserved4 # d5 5 # VALUE32 # 5 _ADI_CTI_CFG2_ITCHIN_t ?5 # ADI_CTI_CFG2_ITCHIN_t d5 ß5 CTTRIGIN # reserved8 # 6 ª5 # VALUE32 # 06 _ADI_CTI_CFG2_ITTRIGIN_t ß5 # ADI_CTI_CFG2_ITTRIGIN_t 6 6 Integration_mode # reserved1 # °6 N6 # VALUE32 # Ú6 _ADI_CTI_CFG2_ITCTRL_t 6 # ADI_CTI_CFG2_ITCTRL_t °6 +7 CLAIMSET # reserved4 # P7 ö6 # VALUE32 # |7 _ADI_CTI_CFG2_CLAIMSET_t +7 # ADI_CTI_CFG2_CLAIMSET_t P7 Ï7 CLAIMCLR # reserved4 # ô7 7 # VALUE32 # 8 _ADI_CTI_CFG2_CLAIMCLR_t Ï7 # ADI_CTI_CFG2_CLAIMCLR_t ô7 [8 WACODE # 8 >8 # VALUE32 # §8 _ADI_CTI_CFG2_LAR_t [8 # ADI_CTI_CFG2_LAR_t 8 9 LOCK # ACCESS # reserved2 # )9 À8 # VALUE32 # P9 _ADI_CTI_CFG2_LSR_t 9 # ADI_CTI_CFG2_LSR_t )9 Û9 IDBG_CTL # IDBG_EN # NDBG_CTL # NDBG_EN # reserved4 # : i9 # VALUE32 # .: _ADI_CTI_CFG2_AUTHSTATUS_t Û9 # ADI_CTI_CFG2_AUTHSTATUS_t : : DEVID # reserved20 # ¦: N: # VALUE32 # Ï: _ADI_CTI_CFG2_DEVID_t : # ADI_CTI_CFG2_DEVID_t ¦: ; DEVTYPE # reserved8 # C; ê: # VALUE32 # n; _ADI_CTI_CFG2_DEVTYPE_t ; # ADI_CTI_CFG2_DEVTYPE_t C; ¼; PID4 # reserved8 # á; ; # VALUE32 # < _ADI_CTI_CFG2_PERIPHID4_t ¼; # ADI_CTI_CFG2_PERIPHID4_t á; ^< PID5 # reserved8 # < -< # VALUE32 # °< _ADI_CTI_CFG2_PERIPHID5_t ^< # ADI_CTI_CFG2_PERIPHID5_t < = PID6 # reserved8 # %= Ï< # VALUE32 # R= _ADI_CTI_CFG2_PERIPHID6_t = # ADI_CTI_CFG2_PERIPHID6_t %= ¢= PID7 # reserved8 # Ç= q= # VALUE32 # ô= _ADI_CTI_CFG2_PERIPHID7_t ¢= # ADI_CTI_CFG2_PERIPHID7_t Ç= D> PID0 # reserved8 # i> > # VALUE32 # > _ADI_CTI_CFG2_PERIPHID0_t D> # ADI_CTI_CFG2_PERIPHID0_t i> æ> PID1 # reserved8 # ? µ> # VALUE32 # 8? _ADI_CTI_CFG2_PERIPHID1_t æ> # ADI_CTI_CFG2_PERIPHID1_t ? ? PID2 # reserved8 # ? W? # VALUE32 # Ú? _ADI_CTI_CFG2_PERIPHID2_t ? # ADI_CTI_CFG2_PERIPHID2_t ? *@ PID3 # reserved8 # O@ ù? # VALUE32 # |@ _ADI_CTI_CFG2_PERIPHID3_t *@ # ADI_CTI_CFG2_PERIPHID3_t O@ Ë@ ID0 # reserved8 # ð@ @ # VALUE32 # A _ADI_CTI_CFG2_COMPID0_t Ë@ # ADI_CTI_CFG2_COMPID0_t ð@ hA ID1 # reserved8 # A 8A # VALUE32 # ¸A _ADI_CTI_CFG2_COMPID1_t hA # ADI_CTI_CFG2_COMPID1_t A B ID2 # reserved8 # *B ÕA # VALUE32 # UB _ADI_CTI_CFG2_COMPID2_t B # ADI_CTI_CFG2_COMPID2_t *B ¢B ID3 # reserved8 # ÇB rB # VALUE32 # òB _ADI_CTI_CFG2_COMPID3_t ¢B # ADI_CTI_CFG2_COMPID3_t ÇB `C LSB # MNFID # JTAGID # REVID #
C C # VALUE32 # «C _ADI_TAPC_IDCODE_t `C # ADI_TAPC_IDCODE_t
C ßC VALUE # D ÃC # VALUE32 # ,D _ADI_TAPC_USERCODE_t ßC # ADI_TAPC_USERCODE_t D xD VALID # reserved1 # D FD # VALUE32 # ÈD _ADI_TAPC_SDBGKEY_CTL_t xD # ADI_TAPC_SDBGKEY_CTL_t D 'E PASS # FAIL # reserved2 # LE åD # VALUE32 # xE _ADI_TAPC_SDBGKEY_STAT_t 'E # ADI_TAPC_SDBGKEY_STAT_t LE ²E VALUE # ×E E # VALUE32 # ÿE _ADI_TAPC_SDBGKEY0_t ²E # ADI_TAPC_SDBGKEY0_t ×E 5F VALUE # ZF F # VALUE32 # F _ADI_TAPC_SDBGKEY1_t 5F # ADI_TAPC_SDBGKEY1_t ZF ¸F VALUE # ÝF F # VALUE32 # G _ADI_TAPC_SDBGKEY2_t ¸F # ADI_TAPC_SDBGKEY2_t ÝF ;G VALUE # `G G # VALUE32 # G _ADI_TAPC_SDBGKEY3_t ;G # ADI_TAPC_SDBGKEY3_t `G æH SPIDENDAP # reserved1 # DBGENC0 # reserved6 # DBGENSTM # NIDENSTM # SPNIDENSTM # SPIDENSTM # DBGENCTISYS # NIDENCTISYS # DBGENTRACE # NIDENTRACE # SPIDENTRACE # reserved16 # I ¢G # VALUE32 # 1I _ADI_TAPC_DBGCTL_t æH # ADI_TAPC_DBGCTL_t I ADI_SMPU_CTL_PBEDIS ¼¸ ADI_SMPU_CTL_PBETYPE ¹ ADI_SMPU_CTL_PINTEN X¹ ADI_SMPU_CTL_RSDIS q¸ ADI_SMPU_BDTLS_SECURE À ADI_SMPU_BDTLS_RNW QÀ ADI_SMPU_STAT_IOVR äº ADI_SMPU_STAT_LWERR ¼ ADI_SMPU_STAT_IRQ º ADI_SMPU_STAT_BERR 0» ADI_SMPU_STAT_BEOVR ~» ADI_SMPU_STAT_ADRERR Ï» ADI_SMPU_IDTLS_SECURE ¾ ADI_SMPU_IDTLS_RNW S¾ ADI_SMPU_RCTL_RPROTEN qÆ ADI_SMPU_RCTL_WPROTEN ÅÆ ADI_SMPU_SECURECTL_SBEDIS ) ADI_SMPU_SECURECTL_SBETYPE  ADI_SMPU_SECURECTL_SINTEN é ADI_SMPU_SECURECTL_RLOCK Kà ADI_SMPU_SECURECTL_RNSEN ¨Ã ADI_SMPU_SECURECTL_RSECDIS Ä ADI_SMPU_SECURECTL_WNSEN fÄ ADI_SMPU_SECURECTL_WSECDIS ÅÄ ADI_SMPU_SECURERCTL_RNSEN @Ë ADI_SMPU_SECURERCTL_RSECDIS ¢Ë ADI_SMPU_SECURERCTL_WNSEN Ì ADI_SMPU_SECURERCTL_WSECDIS fÌ e_ _ADI_SCB0_TypeDef Â0 L ¨L L  ÿÁ RESERVED0 L # SP0A_READ_QOS »L #ÂSP0A_WRITE_QOS »L #ÂM L ø ÷ RESERVED1 óL #ÂSP0B_READ_QOS »L #âSP0B_WRITE_QOS »L #â[M L ø ÷ RESERVED2 KM #âSP1A_READ_QOS »L #SP1A_WRITE_QOS »L #³M L ø ÷ RESERVED3 £M #SP1B_READ_QOS »L #¢SP1B_WRITE_QOS »L #¢ N L ø ÷ RESERVED4 ûM #¢SP2A_READ_QOS »L #ÂSP2A_WRITE_QOS »L #ÂcN L ø ÷ RESERVED5 SN #ÂSP2B_READ_QOS »L #âSP2B_WRITE_QOS »L #â»N L ø ÷ RESERVED6 «N #âSP3A_READ_QOS »L #SP3A_WRITE_QOS »L #O L ø ÷ RESERVED7 O #SP3B_READ_QOS »L #¢SP3B_WRITE_QOS »L #¢kO L ø ÷ RESERVED8 [O #¢CRC0_CH0_READ_QOS »L #ÂCRC0_CH0_WRITE_QOS »L #ÂËO L ø ÷ RESERVED9 »O #ÂCRC0_CH1_READ_QOS »L #âCRC0_CH1_WRITE_QOS »L #â+P L ø ÷ RESERVED10 P #âCRC1_CH0_READ_QOS »L #CRC1_CH0_WRITE_QOS »L #P L ø ÷ RESERVED11 |P #CRC1_CH1_READ_QOS »L #¢CRC1_CH1_WRITE_QOS »L #¢íP L ø ÷ RESERVED12 ÝP #¢UART2_RX_READ_QOS »L #ÂUART2_RX_WRITE_QOS »L #ÂNQ L ø ÷ RESERVED13 >Q #ÂSH0_DPORT_READ_QOS »L #âSH0_DPORT_WRITE_QOS »L #â±Q L ø ÷ RESERVED14 ¡Q #âSH0_IPORT_READ_QOS »L #SH0_IPORT_WRITE_QOS »L #R L ø ÷ RESERVED15 R #SP4A_READ_QOS »L #¢SP4A_WRITE_QOS »L #¢mR L ø ÷ RESERVED16 ]R #¢SP4B_READ_QOS »L #ÂSP4B_WRITE_QOS »L #ÂÆR L ø_ ÷_ RESERVED17 ¶R #ÂHSMDMA_CH0_READ_QOS »L #¢HSMDMA_CH0_WRITE_QOS »L #¢+S L ø ÷ RESERVED18 S #¢SP5A_READ_QOS »L #ÂSP5A_WRITE_QOS »L #ÂS L ø ÷ RESERVED19 tS #ÂMLB_READ_QOS »L #âMLB_WRITE_QOS »L #âÛS L ø ÷ RESERVED20 ËS #âUART0_TX_READ_QOS »L #UART0_TX_WRITE_QOS »L #<T L ø ÷ RESERVED21 ,T #UART0_RX_READ_QOS »L #¢UART0_RX_WRITE_QOS »L #¢T L ø ÷ RESERVED22 T #¢SP5B_READ_QOS »L #ÂSP5B_WRITE_QOS »L #ÂöT L ø ÷ RESERVED23 æT #ÂHSMDMA_CH1_READ_QOS »L #âHSMDMA_CH1_WRITE_QOS »L #â[U L ø ÷ RESERVED24 KU #âUART2_TX_READ_QOS »L #UART2_TX_WRITE_QOS »L #¼U L ø ÷ RESERVED25 ¬U #SPI0TX_READ_QOS »L #¢SPI0TX_WRITE_QOS »L #¢V L ø ÷ RESERVED26 V #¢SPI0RX_READ_QOS »L #ÂSPI0RX_WRITE_QOS »L #ÂvV L ø ÷ RESERVED27 fV #ÂSPI1TX_READ_QOS »L #âSPI1TX_WRITE_QOS »L #âÓV L ø ÷ RESERVED28 ÃV #âSPI1RX_READ_QOS »L #SPI1RX_WRITE_QOS »L #0W L ø ÷ RESERVED29 W #SPI2TX_READ_QOS »L #¢SPI2TX_WRITE_QOS »L #¢W L ø ÷ RESERVED30 }W #¢SPI2RX_READ_QOS »L #ÂSPI2RX_WRITE_QOS »L #ÂêW L ø ÷ RESERVED31 ÚW #ÂSP6A_READ_QOS »L #âSP6A_WRITE_QOS »L #âCX L ø ÷ RESERVED32 3X #âSP6B_READ_QOS »L #SP6B_WRITE_QOS »L #X L ø ÷ RESERVED33 X #LP0_READ_QOS »L #¢LP0_WRITE_QOS »L #¢óX L ø ÷ RESERVED34 ãX #¢SP7A_READ_QOS »L #ÂSP7A_WRITE_QOS »L #ÂLY L ø ÷ RESERVED35 <Y #ÂSP7B_READ_QOS »L #âSP7B_WRITE_QOS »L #â¥Y L ø ÷ RESERVED36 Y #âSH0_MMR_IB_READ_QOS »L #SH0_MMR_IB_WRITE_QOS »L #
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Z L ø? ÷? RESERVED37 úY #UART1_TX_READ_QOS »L #ÂUART1_TX_WRITE_QOS »L #ÂkZ L ø ÷ RESERVED38 [Z #ÂUART1_RX_READ_QOS »L #âUART1_RX_WRITE_QOS »L #âÌZ L ø? ÷? RESERVED39 ¼Z #âLP1_READ_QOS »L #¢LP1_WRITE_QOS »L #¢#[ L ø ÷ RESERVED40 [ #¢CRYPTO_READ_QOS »L #¢ CRYPTO_WRITE_QOS »L #¢ [ L ø_ ÷_ RESERVED41 p[ #¢ ACC_CH0_READ_QOS »L # ACC_CH0_WRITE_QOS »L # ß[ L ø ÷ RESERVED42 Ï[ # ACC_CH1_READ_QOS »L #¢ ACC_CH1_WRITE_QOS »L #¢ >\ L ø_ ÷_ RESERVED43 .\ #¢ DLDMA0_CH0_READ_QOS »L # DLDMA0_CH0_WRITE_QOS »L # £\ L ø ÷ RESERVED44 \ # DLDMA0_CH1_READ_QOS »L #¢ DLDMA0_CH1_WRITE_QOS »L #¢ ] L ø ÷ RESERVED45 ø\ #¢ DLDMA1_CH0_READ_QOS »L # DLDMA1_CH0_WRITE_QOS »L # m] L ø ÷ RESERVED46 ]] # DLDMA1_CH1_READ_QOS »L #â DLDMA1_CH1_WRITE_QOS »L #â Ò] L ø ÷ RESERVED47 Â] #â MSMDMA_CH0_READ_QOS »L # MSMDMA_CH0_WRITE_QOS »L # 7^ L ø ÷ RESERVED48 '^ # MSMDMA_CH1_READ_QOS »L #¢ MSMDMA_CH1_WRITE_QOS »L #¢ ^ L øß ÷ß RESERVED49 ^ #¢ DBG_READ_QOS »L #"DBG_WRITE_QOS »L #"õ^ L ø ÷ RESERVED50 å^ #"ETR_READ_QOS »L #¢"ETR_WRITE_QOS »L #¢"N_ L RESERVED51 <_ #¢" ADI_SCB0_TypeDef pL á_ _ADI_SCB3_TypeDef ¤ ª_ L RESERVED0 _ # APB_DCLK_0_IB_SYNC_MODE »L # ADI_SCB3_TypeDef |_ o` _ADI_SCB1_TypeDef ( ` L RESERVED0 ` # MST_IB_SYNC_MODE »L # [` L RESERVED1 M` #$ ADI_SCB1_TypeDef ø_ ùe _ADI_SCB4_TypeDef ²` L Ð? Ï? RESERVED0 ¢` # Å` PERIPH_ID_4 Ê` #Ð?PERIPH_ID_5 Ê` #Ô?PERIPH_ID_6 Ê` #Ø?PERIPH_ID_7 Ê` #Ü?PERIPH_ID_0 Ê` #à?PERIPH_ID_1 Ê` #ä?PERIPH_ID_2 Ê` #è?PERIPH_ID_3 Ê` #ì?COMP_ID_0 Ê` #ð?COMP_ID_1 Ê` #ô?COMP_ID_2 Ê` #ø?COMP_ID_3 Ê` #ü?áa L ¢ ÿ¡ RESERVED1 Ïa #@SHARC_DPORT_READ_QOS »L #âSHARC_DPORT_WRITE_QOS »L #âSHARC_DPORT_FN_MOD »L #âdb L ô ó RESERVED2 Tb #âFABRIC_S2PORT_IB_READ_QOS »L #FABRIC_S2PORT_IB_WRITE_QOS »L #FABRIC_S2PORT_IB_FN_MOD »L #÷b L RESERVED3 çb #FIR_CH0_IB_FN_MOD2 »L #¤ :c L Ø × RESERVED4 *c #¨ FIR_CH0_IB_READ_QOS »L #¢FIR_CH0_IB_WRITE_QOS »L #¢FIR_CH0_IB_FN_MOD »L #¢»c L RESERVED5 «c #¢FIR_CH1_IB_FN_MOD2 »L #¤Àþc L Ø × RESERVED6 îc #¨ÀFIR_CH1_IB_READ_QOS »L #ÂFIR_CH1_IB_WRITE_QOS »L #ÂFIR_CH1_IB_FN_MOD »L #Âd L RESERVED7 od #ÂIIR_CH0_IB_FN_MOD2 »L #¤àÂd L Ø × RESERVED8 ²d #¨àIIR_CH0_IB_READ_QOS »L #âIIR_CH0_IB_WRITE_QOS »L #âIIR_CH0_IB_FN_MOD »L #âCe L RESERVED9 3e #âIIR_CH1_IB_FN_MOD2 »L #¤e L Ø × RESERVED10 ve #¨IIR_CH1_IB_READ_QOS »L #IIR_CH1_IB_WRITE_QOS »L #IIR_CH1_IB_FN_MOD »L # ADI_SCB4_TypeDef ` #h _ADI_SCB5_TypeDef ÂREMAP »L # Kf L Ì? Ë? RESERVED0 ;f #PERIPH_ID_4 Ê` #Ð?PERIPH_ID_5 Ê` #Ô?PERIPH_ID_6 Ê` #Ø?PERIPH_ID_7 Ê` #Ü?PERIPH_ID_0 Ê` #à?PERIPH_ID_1 Ê` #ä?PERIPH_ID_2 Ê` #è?PERIPH_ID_3 Ê` #ì?COMP_ID_0 Ê` #ð?COMP_ID_1 Ê` #ô?COMP_ID_2 Ê` #ø?COMP_ID_3 Ê` #ü?ng L RESERVED1 ^g #@SPI2_S_IB_FN_MOD_ISS_BM »L #`´g L ü û RESERVED2 ¤g #`SPI2_S_IB_FN_MOD »L #bõg L üß ûß RESERVED3 ãg #bSPIF_M_FN_MOD »L # ADI_SCB5_TypeDef f Ûh _ADI_LP_TypeDef CTL »L # STAT »L #DIV »L #h L RESERVED0 zh # TX »L #RX »L #TXIN_SHDW Ê` #TXOUT_SHDW Ê` # ADI_LP_TypeDef :h {j _ADI_DMA_CFG0_TypeDef Pd DSCPTR_NXT i # ADDRSTART i #CFG »L #XCNT »L # u XMOD Ui #YCNT »L #YMOD Ui #i L RESERVED0 i # DSCPTR_CUR i #$DSCPTR_PRV Ê` #(ADDR_CUR i #,STAT »L #0XCNT_CUR Ê` #4YCNT_CUR Ê` #8 j L RESERVED1 j #<BWLCNT »L #@BWLCNT_CUR Ê` #DBWMCNT »L #HBWMCNT_CUR Ê` #L ADI_DMA_CFG0_TypeDef ðh Åm _ADI_TWI_TypeDef CLKDIV °j # Ój L RESERVED0 Åj #CTL °j #k L RESERVED1 ój #SLVCTL °j #2k L RESERVED2 $k #
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Ek SLVSTAT Jk # nk L RESERVED3 `k #SLVADDR °j # k L RESERVED4 k #MSTRCTL °j #Òk L RESERVED5 Äk #MSTRSTAT °j #l L RESERVED6 ÷k #MSTRADDR °j # 8l L RESERVED7 *l # ISTAT °j # hl L RESERVED8 Zl #"IMSK °j #$l L RESERVED9 l #&FIFOCTL °j #(Él L RESERVED10 »l #*FIFOSTAT Jk #,ýl L R Q RESERVED11 ïl #.TXDATA8 °j #1m L RESERVED12 #m #TXDATA16 °j #gm L RESERVED13 Ym #RXDATA8 °j #m L RESERVED14 m #RXDATA16 °j # ADI_TWI_TypeDef j p _ADI_SPORT_TypeDef CTL_A »L # DIV_A »L #MCTL_A »L #CS0_A »L # CS1_A »L #CS2_A »L #CS3_A »L #on L RESERVED0 an # ERR_A »L # MSTAT_A Ê` #$CTL2_A »L #(Àn L RESERVED1 ²n #,TXPRI_A »L #@RXPRI_A »L #DTXSEC_A »L #HRXSEC_A »L #L%o L 0 / RESERVED2 o #PCTL_B »L #DIV_B »L #MCTL_B »L #CS0_B »L #CS1_B »L #CS2_B »L #CS3_B »L #·o L RESERVED3 ©o #ERR_B »L # MSTAT_B Ê` #¤CTL2_B »L #¨ p L RESERVED4 þo #¬TXPRI_B »L #ÀRXPRI_B »L #ÄTXSEC_B »L #ÈRXSEC_B »L #Ìvp L 0 / RESERVED5 hp #Ð ADI_SPORT_TypeDef Ûm ¦q _ADI_UART_TypeDef <Ëp L RESERVED0 ½p # CTL »L #STAT »L #SCR »L # CLK »L #IMSK »L #IMSK_SET »L #IMSK_CLR »L # RBR Ê` # THR »L #$TAIP »L #(TSR Ê` #,RSR Ê` #0TXCNT Ê` #4RXCNT Ê` #8 ADI_UART_TypeDef £p *s _ADI_PORT_TypeDef FER »L # FER_SET »L #FER_CLR »L #DATA »L # DATA_SET »L #DATA_CLR »L #DIR »L #DIR_SET »L # DIR_CLR »L # INEN »L #$INEN_SET »L #(INEN_CLR »L #,MUX »L #0DATA_TGL »L #4POL »L #8POL_SET »L #<POL_CLR »L #@LOCK »L #DTRIG_TGL »L #Hs L 4 3 RESERVED0 s #L ADI_PORT_TypeDef ½q ³t _ADI_PORT_CFG0_TypeDef FER »L # FER_SET »L #FER_CLR »L #DATA »L # DATA_SET »L #DATA_CLR »L #DIR »L #DIR_SET »L # DIR_CLR »L # INEN »L #$INEN_SET »L #(INEN_CLR »L #,MUX »L #0DATA_TGL »L #4POL »L #8POL_SET »L #<POL_CLR »L #@LOCK »L #DTRIG_TGL »L #Ht L 4 3 RESERVED0 t #L ADI_PORT_CFG0_TypeDef As Av _ADI_PORT_CFG1_TypeDef FER »L # FER_SET »L #FER_CLR »L #DATA »L # DATA_SET »L #DATA_CLR »L #DIR »L #DIR_SET »L # DIR_CLR »L # INEN »L #$INEN_SET »L #(INEN_CLR »L #,MUX »L #0DATA_TGL »L #4POL »L #8POL_SET »L #<POL_CLR »L #@LOCK »L #DTRIG_TGL »L #H-v L 4 3 RESERVED0 v #L ADI_PORT_CFG1_TypeDef Ït Ïw _ADI_PORT_CFG2_TypeDef FER »L # FER_SET »L #FER_CLR »L #DATA »L # DATA_SET »L #DATA_CLR »L #DIR »L #DIR_SET »L # DIR_CLR »L # INEN »L #$INEN_SET »L #(INEN_CLR »L #,MUX »L #0DATA_TGL »L #4POL »L #8POL_SET »L #<POL_CLR »L #@LOCK »L #DTRIG_TGL »L #H»w L 4 3 RESERVED0 w #L ADI_PORT_CFG2_TypeDef ]v Çz _ADI_PADS_TypeDef àx L RESERVED0 x # PCFG0 »L #Dx L RESERVED1 6x #PORTA0_DS »L # PORTA1_DS »L #PORTB0_DS »L #PORTB1_DS »L #PORTC0_DS »L # Äx L RESERVED2 ¶x # NONPORTS_DS »L #$úx L RESERVED3 ìx #(DAI0_0_DS »L #4DAI0_1_DS »L #8Ay L RESERVED4 3y #<DAI1_0_DS »L #@DAI1_1_DS »L #Dy L RESERVED5 zy #HDAI0_IE »L #`DAI1_IE »L #dËy L RESERVED6 ½y #hìy »L PORT_PUE Þy # z L RESERVED7 ÿy #/z »L DAI_PUE !z #Oz L RESERVED8 Az # qz »L PORT_PDE cz #Àz L RESERVED9 z #Ì´z »L DAI_PDE ¦z #Ø ADI_PADS_TypeDef ëw { _ADI_PINT_TypeDef (MSK_SET »L # MSK_CLR »L #REQ »L #ASSIGN »L # EDGE_SET »L #EDGE_CLR »L #INV_SET »L #INV_CLR »L # PINSTATE Ê` # LATCH »L #$ ADI_PINT_TypeDef Þz | _ADI_WDOG_TypeDef CTL »L # CNT »L #STAT »L #WIN »L # ADI_WDOG_TypeDef ¶{ É| _ADI_CNT_TypeDef ôCFG »L # IMSK »L #STAT »L #CMD »L # DEBNCE »L #CNTR »L #MAX »L #MIN »L # µ| L Ô Ó RESERVED0 ¥| # ADI_CNT_TypeDef | $ _ADI_OTPC_TypeDef ´CTL »L # STAT »L #TIMING »L #3} L RESERVED0 %} # BOOT_SR3 Ê` #BOOT_RR0 Ê` # BOOT_RR1 Ê` # BOOT_RR2 Ê` #$} L RESERVED1 } #(SECU_STATE Ê` #,Ñ} L D C RESERVED2 Ã} #0DAP_DR »L #tDAP_OAR »L #xPMC_INST »L #|PMC_CTL »L #PMC_STAT Ê` #PMC_MODE0 »L #PMC_MODE1 »L #PMC_MODE2 »L #PMC_MODE3 »L #PMC_PGM_TMG0 »L #PMC_PGM_TMG1 »L #PMC_PGM_TMG2 »L # PMC_DAP_ADDR »L #¤PMC_PGM_CQ »L #¨ L RESERVED3 ý~ #¬DAP_RFMR »L #¸DAP_VRMR »L #¼DAP_OVLR »L #ÀDAP_IPCR »L #Äy L RESERVED4 k #ÈDAP_ORCR »L #ÌDAP_ODCR »L #ÐDAP_IPCR2 »L #ÔDAP_OCER »L #ØDAP_DPCR »L #ÜDAP_DPCR2 »L #à L P O RESERVED5 #ä ADI_OTPC_TypeDef ß| Î _ADI_HADC_TypeDef \CTL »L # CHAN_MSK »L #IMSK »L #STAT »L # Ê` DATA #º L < ; RESERVED0 ¬ # ADI_HADC_TypeDef ; < _ADI_TMU_TypeDef tCTL »L # TEMP Ê` #AVG »L #FLT_LIM_HI »L # ALRT_LIM_HI »L #FLT_LIM_LO »L #ALRT_LIM_LO »L #STAT »L # L RESERVED0 # GAIN »L #$IMSK »L #(OFFSET »L #,á L RESERVED1 Ó #0CNV_BLANK »L #4REFR_CNTR »L #8( L 8 7 RESERVED2 #< ADI_TMU_TypeDef å Ô _ADI_TIMER_TMR_TypeDef CFG »L # CNT Ê` #PER »L #WID »L # DLY »L #À L RESERVED0 ² # ADI_TIMER_TMR_TypeDef R _ADI_TIMER_TypeDef L RESERVED0 # RUN »L #RUN_SET »L #RUN_CLR »L # STOP_CFG »L #STOP_CFG_SET »L #STOP_CFG_CLR »L #DATA_IMSK »L # STAT_IMSK »L # TRG_MSK »L #$TRG_IE »L #(DATA_ILAT »L #,STAT_ILAT »L #0ERR_TYPE Ê` #4BCAST_PER »L #8BCAST_WID »L #<BCAST_DLY »L #@` L RESERVED1 R #D Ô
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TMR s #` ADI_TIMER_TypeDef ð # _ADI_DMA_TypeDef PDSCPTR_NXT i # ADDRSTART i #CFG »L #XCNT »L # XMOD Ui #YCNT »L #YMOD Ui #:
L RESERVED0 ,
# DSCPTR_CUR i #$DSCPTR_PRV Ê` #(ADDR_CUR i #,STAT »L #0XCNT_CUR Ê` #4YCNT_CUR Ê` #8Ç
L RESERVED1 ¹
#<BWLCNT »L #@BWLCNT_CUR Ê` #DBWMCNT »L #HBWMCNT_CUR Ê` #L ADI_DMA_TypeDef § ë _ADI_OSPI_TypeDef CTL »L # DRICTL »L #DWICTL »L #DLY »L # RDC »L #DSCTL »L #¸ L RESERVED0 ª #REMAPADDR »L #$MBCTL »L #(û L RESERVED1 í #,WCCTL »L #8POLLEXP »L #<ISTAT »L #@IMSK »L #DY L RESERVED2 K #HWRPROT_LWR »L #PWRPROT_UP »L #TWRPROT_CTL »L #Xµ L 0 / RESERVED3 § #\FCMCTL »L #FCCTL »L #FCA »L # L RESERVED4 ÷ #FCRD_LWR Ê` # FCRD_UP Ê` #¤FCWD_LWR »L #¨FCWD_UP »L #¬POLSTAT »L #° L , + RESERVED5 u #´OE_LWR »L #àOE_UP »L #äÆ L RESERVED6 ¸ #èMODID Ê` #ü ADI_OSPI_TypeDef 9 _ADI_SPI_TypeDef h) L RESERVED0 # CTL »L #RXCTL »L #TXCTL »L # CLK »L #DLY »L #SLVSEL »L #RWC »L # RWCR »L # TWC »L #$TWCR »L #(Õ L RESERVED1 Ç #,IMSK Ê` #0IMSK_CLR »L #4IMSK_SET »L #8( L RESERVED2 #<STAT »L #@ILAT Ê` #DILAT_CLR »L #Hw L RESERVED3 i #LRFIFO Ê` #P§ L RESERVED4 #TTFIFO »L #X× L RESERVED5 É #\MMRDH »L #`MMTOP »L #d ADI_SPI_TypeDef ì _ADI_SPI_CFG0_TypeDef \K L RESERVED0 = # CTL »L #RXCTL »L #TXCTL »L # CLK »L #DLY »L #SLVSEL »L #RWC »L # RWCR »L # TWC »L #$TWCR »L #(÷ L RESERVED1 é #,IMSK Ê` #0IMSK_CLR »L #4IMSK_SET »L #8J L RESERVED2 < #<STAT »L #@ILAT Ê` #DILAT_CLR »L #H L RESERVED3 #LRFIFO Ê` #PÉ L RESERVED4 » #TTFIFO »L #X ADI_SPI_CFG0_TypeDef Ô _ADI_SPI_CFG1_TypeDef \3 L RESERVED0 % # CTL »L #RXCTL »L #TXCTL »L # CLK »L #DLY »L #SLVSEL »L #RWC »L # RWCR »L # TWC »L #$TWCR »L #(ß L RESERVED1 Ñ #,IMSK Ê` #0IMSK_CLR »L #4IMSK_SET »L #82 L RESERVED2 $ #<STAT »L #@ILAT Ê` #DILAT_CLR »L #H L RESERVED3 s #LRFIFO Ê` #P± L RESERVED4 £ #TTFIFO »L #X ADI_SPI_CFG1_TypeDef û _ADI_SPI_CFG2_TypeDef h L RESERVED0 # CTL »L #RXCTL »L #TXCTL »L # CLK »L #DLY »L #SLVSEL »L #RWC »L # RWCR »L # TWC »L #$TWCR »L #(Ç L RESERVED1 ¹ #,IMSK Ê` #0IMSK_CLR »L #4IMSK_SET »L #8 L RESERVED2 #<STAT »L #@ILAT Ê` #DILAT_CLR »L #Hi L RESERVED3 [ #LRFIFO Ê` #P L RESERVED4 #TTFIFO »L #XÉ L RESERVED5 » #\MMRDH »L #`MMTOP »L #d ADI_SPI_CFG2_TypeDef ï z _ADI_L2CTL_TypeDef CTL »L # M L RESERVED0 ? #STAT »L #RPCR »L #WPCR »L # L RESERVED1 # INIT »L #$Ç L RESERVED2 ¹ #(ISTAT Ê` #8PCTL »L #<ERRADDR0 i #@ERRADDR1 i #DERRADDR2 i #HERRADDR3 i #LERRADDR4 i #PERRADDR5 i #TERRADDR6 i #XERRADDR7 i #\ERRADDR8 i #`§ L RESERVED3 #dET0 Ê` #EADDR0 i #ET1 Ê` #EADDR1 i # L \ [ RESERVED4 ø #SCTL »L #ìSADR i #ðSCNT »L #ôU L RESERVED5 G #øREVID Ê` #ü ADI_L2CTL_TypeDef _ADI_SMPU_CFG0_Rn_TypeDef RCTL »L # RADDR »L #RIDA »L #RIDMSKA »L # RIDB »L #RIDMSKB »L # ADI_SMPU_CFG0_Rn_TypeDef _ADI_SMPU_CFG0_TypeDef ÀCTL »L # STAT »L #IADDR Ê` #IDTLS Ê` # BADDR Ê` #BDTLS Ê` #´ L RESERVED0 ¦ #Õ Rn Ç # ñ L À ¿ RESERVED1 á #àREVID Ê` # % L Ü Û RESERVED2 #¤SECURECTL »L #[ L RESERVED3 M #} »L SECURERCTL o # ADI_SMPU_CFG0_TypeDef / ( _ADI_SMPU_Rn_TypeDef RCTL »L # RADDR »L #RIDA »L #RIDMSKA »L # RIDB »L #RIDMSKB »L # ADI_SMPU_Rn_TypeDef ¯ ¡ _ADI_SMPU_TypeDef ÀCTL »L # STAT »L #IADDR Ê` #IDTLS Ê` # BADDR Ê` #BDTLS Ê` # L RESERVED0 ´ #ã ( Rn Õ # ÿ L À ¿ RESERVED1 ï #àREVID Ê` # 3 L Ü Û RESERVED2 # #¤SECURECTL »L #i L RESERVED3 [ # »L SECURERCTL } # ADI_SMPU_TypeDef B 6 _ADI_SMPU_CFG1_Rn_TypeDef RCTL »L # RADDR »L #RIDA »L #RIDMSKA »L # RIDB »L #RIDMSKB »L # ADI_SMPU_CFG1_Rn_TypeDef ¸ ¹ _ADI_SMPU_CFG1_TypeDef ÀCTL »L # STAT »L #IADDR Ê` #IDTLS Ê` # BADDR Ê` #BDTLS Ê` #Ú L RESERVED0 Ì #û 6 Rn í # L À ¿ RESERVED1 #àREVID Ê` # K L Ü Û RESERVED2 ; #¤SECURECTL »L # L RESERVED3 s #£ »L SECURERCTL # ADI_SMPU_CFG1_TypeDef U _ADI_SEC_CB_TypeDef @CCTL »L # CSTAT »L #CPND Ê` #CACT Ê` # CPMSK »L #CGMSK »L #CPLVL »L #CSID Ê` # s L RESERVED0 e # ADI_SEC_CB_TypeDef Õ Ú _ADI_SEC_SB_TypeDef SCTL »L # SSTAT »L # ADI_SEC_SB_TypeDef W _ADI_SEC_TypeDef GCTL »L # GSTAT »L #RAISE »L #END »L # FCTL »L #FSTAT »L #FSID Ê` #FEND »L # FDLY »L # FDLY_CUR Ê` #$FSRDLY »L #(FSRDLY_CUR Ê` #,FCOPP »L #0FCOPP_CUR Ê` #4õ L È Ç RESERVED0 å #8CB #% L À ¿ RESERVED1 #ÀI Ú Á À SB 9 # ADI_SEC_TypeDef ó I _ADI_TRU_TypeDef ø »L v u SSR # ² L RESERVED0 ¢ #ØMTR »L #àâ L RESERVED1 Ô #äERRADDR »L #èSTAT »L #ì% L RESERVED2 #ðGCTL »L #ô ADI_TRU_TypeDef m ½ _ADI_SPU_TypeDef ¤CTL »L # STAT »L #¤ L ø ÷ RESERVED0 #Ç »L WP · #ä L RESERVED1 Ô #¤ SECURECTL »L #À L RESERVED2 #ÄSECURECHK Ê` #ÌR L ° ¯ RESERVED3 B #ÐSECUREC »L # L | { RESERVED4 x #ª »L SECUREP # ADI_SPU_TypeDef _ _ADI_RCU_TypeDef CTL »L # STAT »L #CRCTL »L #CRSTAT »L # 5 L RESERVED0 ' #SRRQSTAT »L #SIDIS »L # SISTAT Ê` # SVECT_LCK »L #$BCODE »L #(SVECT0 »L #,¹ L < ; RESERVED1 « #0MSG »L #lMSG_SET »L #pMSG_CLR »L #t L RESERVED2 û #x ADI_RCU_TypeDef Ó Ì¡ _ADI_CGU_TypeDef PCTL »L # PLLCTL »L #STAT »L #DIV »L # CLKOUTSEL »L #OSCWDCTL »L #TSCTL »L #TSVALUE0 »L # TSVALUE1 »L # TSCOUNT0 Ê` #$TSCOUNT1 Ê` #(CCBF_DIS »L #,CCBF_STAT Ê` #03¡ L RESERVED0 %¡ #4SCBF_DIS »L #8SCBF_STAT Ê` #<DIVEX »L #@¡ L RESERVED1 z¡ #DREVID Ê` #H¸¡ L RESERVED2 ª¡ #L ADI_CGU_TypeDef 3 £ _ADI_CGU_CFG0_TypeDef PCTL »L # PLLCTL »L #STAT »L #DIV »L # CLKOUTSEL »L #OSCWDCTL »L #TSCTL »L #TSVALUE0 »L # TSVALUE1 »L # TSCOUNT0 Ê` #$TSCOUNT1 Ê` #(CCBF_DIS »L #,CCBF_STAT Ê` #0ç¢ L RESERVED0 Ù¢ #4SCBF_DIS »L #8SCBF_STAT Ê` #<DIVEX »L #@<£ L RESERVED1 .£ #DREVID Ê` #Hl£ L RESERVED2 ^£ #L ADI_CGU_CFG0_TypeDef â¡ ¤ _ADI_CGU_CFG1_TypeDef PCTL »L # PLLCTL »L #STAT »L #DIV »L # ÿ£ L ( ' RESERVED0 ñ£ #SCBF_DIS »L #8SCBF_STAT Ê` #<E¤ L RESERVED1 7¤ #@REVID Ê` #Hu¤ L RESERVED2 g¤ #L ADI_CGU_CFG1_TypeDef £ J¥ _ADI_CDU_TypeDef Pˤ »L CFG ½¤ # æ¤ L 8 7 RESERVED0 ؤ #STAT »L #@CLKINSEL »L #DREVID Ê` #H6¥ L RESERVED1 (¥ #L ADI_CDU_TypeDef ¤¤ .¦ _ADI_DPM_TypeDef CTL »L # STAT »L #£¥ L h g RESERVED0 ¥ #PER_DIS0 »L #pPER_DIS1 »L #tè¥ L RESERVED1 Ú¥ #xREVID Ê` #¦ L RESERVED2 ¦ # ADI_DPM_TypeDef `¥ Ȧ _ADI_SWU_WB_TypeDef CTL »L # LA i #UA i #ID »L # CNT »L #TARG »L #HIST Ê` #CUR Ê` # ADI_SWU_WB_TypeDef D¦ T§ _ADI_SWU_TypeDef GCTL »L # GSTAT »L #&§ L RESERVED0 § #G§ Ȧ WB 9§ # ADI_SWU_TypeDef á¦ ë¨ _ADI_DMA_CFG1_TypeDef PDSCPTR_NXT i # ADDRSTART i #CFG »L #XCNT »L # XMOD Ui #YCNT »L #YMOD Ui #¨ L RESERVED0 ô§ # DSCPTR_CUR i #$DSCPTR_PRV Ê` #(ADDR_CUR i #,STAT »L #0XCNT_CUR Ê` #4YCNT_CUR Ê` #8¨ L RESERVED1 ¨ #<BWLCNT »L #@BWLCNT_CUR Ê` #DBWMCNT »L #HBWMCNT_CUR Ê` #L ADI_DMA_CFG1_TypeDef j§ ª _ADI_DMA_CFG2_TypeDef PDSCPTR_NXT i # ADDRSTART i #CFG »L #XCNT »L # XMOD Ui #YCNT »L #YMOD Ui #© L RESERVED0 © # DSCPTR_CUR i #$DSCPTR_PRV Ê` #(ADDR_CUR i #,STAT »L #0XCNT_CUR Ê` #4YCNT_CUR Ê` #8+ª L RESERVED1 ª #<BWLCNT »L #@BWLCNT_CUR Ê` #DBWMCNT »L #HBWMCNT_CUR Ê` #L ADI_DMA_CFG2_TypeDef © #¬ _ADI_DMA_CFG3_TypeDef PDSCPTR_NXT i # ADDRSTART i #CFG »L #XCNT »L # XMOD Ui #YCNT »L #YMOD Ui #:« L RESERVED0 ,« # DSCPTR_CUR i #$DSCPTR_PRV Ê` #(ADDR_CUR i #,STAT »L #0XCNT_CUR Ê` #4YCNT_CUR Ê` #8Ç« L RESERVED1 ¹« #<BWLCNT »L #@BWLCNT_CUR Ê` #DBWMCNT »L #HBWMCNT_CUR Ê` #L ADI_DMA_CFG3_TypeDef ¢ª ¿ _ADI_DMA_CFG4_TypeDef PDSCPTR_NXT i # ADDRSTART i #CFG »L #XCNT »L # XMOD Ui #YCNT »L #YMOD Ui #Ö¬ L RESERVED0 Ȭ # DSCPTR_CUR i #$DSCPTR_PRV Ê` #(ADDR_CUR i #,STAT »L #0XCNT_CUR Ê` #4YCNT_CUR Ê` #8c L RESERVED1 U #<BWLCNT »L #@BWLCNT_CUR Ê` #DBWMCNT »L #HBWMCNT_CUR Ê` #L ADI_DMA_CFG4_TypeDef >¬ /± _ADI_MLB_TypeDef àCTL0 »L # ® L RESERVED0 ® #MS0 »L # >® L RESERVED1 0® #MS1 »L #l® L RESERVED2 ^® #MSS »L # MSD Ê` #$§® L RESERVED3 ® #(MIEN »L #,Ö® L RESERVED4 È® #0GCTL »L #4¯ L RESERVED5 ÷® #8CTL1 »L #<4¯ L @ ? RESERVED6 &¯ #@HCTL »L #d¯ L RESERVED7 V¯ #HCMR0 »L #HCMR1 »L #HCER0 »L #HCER1 »L #HCBR0 Ê` #HCBR1 Ê` #æ¯ L RESERVED8 د # MDAT0 »L #ÀMDAT1 »L #ÄMDAT2 »L #ÈMDAT3 »L #ÌMDWE0 »L #ÐMDWE1 »L #ÔMDWE2 »L #ØMDWE3 »L #ÜMCTL »L #àMADR »L #䨰 L Ø × RESERVED9 ° #èACTL »L #ÀÙ° L RESERVED10 Ë° #ÄACSR0 »L #ÐACSR1 »L #ÔACMR0 »L #ØACMR1 »L #Ü ADI_MLB_TypeDef Ú k´ _ADI_MEC_TypeDef PEIRQ_GCTL »L # ± L RESERVED0 s± #PEIRQ_GSTAT »L #·± L , + RESERVED1 ©± #PERR_CTL »L #@ê± L < ; RESERVED2 ܱ #DPERR_STAT »L # ² L < ; RESERVED3 ² #PERR_IMASK »L #ÀV² L < ; RESERVED4 H² #ÄEEIRQ_GCTL »L #² L RESERVED5 ² #EEIRQ_GSTAT »L #Ų L , + RESERVED6 ·² #ECCERR_CTL »L #Àü² L < ; RESERVED7 î² #ÄECCERR_STAT »L #4³ L < ; RESERVED8 &³ #ECCERR_IMASK »L #Ào³ L ¼ » RESERVED9 _³ #ÄCLR »L # ¡³ L Ì Ë RESERVED10 ³ # PID4 Ê` #Ð PID5 Ê` #Ô PID6 Ê` #Ø PID7 Ê` #Ü PID0 Ê` #à PID1 Ê` #ä PID2 Ê` #è PID3 Ê` #ì CID0 Ê` #ð CID1 Ê` #ô CID2 Ê` #ø CID3 Ê` #ü ADI_MEC_TypeDef E± ¶ _ADI_CRC_TypeDef CTL »L # DCNT »L #DCNTRLD »L #Õ´ L RESERVED0 Ç´ # COMP »L #FILLVAL »L #DFIFO »L # INEN »L # INEN_SET »L #$INEN_CLR »L #(POLY »L #,dµ L RESERVED1 Vµ #0STAT »L #@DCNTCAP »L #D¤µ L RESERVED2 µ #HRESULT_FIN »L #LRESULT_CUR »L #Píµ L 0 / RESERVED3 ßµ #T ADI_CRC_TypeDef ´ p¶ _ADI_MISCREG_TypeDef DPFB_RANGE_SELECT »L # \¶ L @ ? RESERVED0 N¶ # ADI_MISCREG_TypeDef ¶ ¸ _ADI_FIR_TypeDef CTL1 »L # DMASTAT Ê` #MACSTAT Ê` #ⶠL RESERVED0 Ô¶ # DBG_CTL »L #DBG_ADDR »L #DBG_WRDAT »L #DBG_RDDAT »L # L· L RESERVED1 >· # CTL2 »L #@INIDX »L #DINMOD »L #HINCNT »L #LINBASE »L #POUTIDX »L #TOUTMOD »L #XOUTCNT »L #\OUTBASE »L #`COEFIDX »L #dCOEFMOD »L #hCOEFCNT »L #lCHNPTR »L #pSCTL1 »L #tSCTL2 »L #xSGCTL »L #|k¸ L RESERVED2 [¸ # ADI_FIR_TypeDef ¶ yº _ADI_IIR_TypeDef CTL1 »L # DMASTAT Ê` #MACSTAT Ê` #DBG_CTL »L # DBG_ADDR »L #DBG_WRDAT_LO »L #DBG_WRDAT_HI »L #DBG_RDDAT_LO Ê` # DBG_RDDAT_HI Ê` # i¹ L RESERVED0 [¹ #$CTL2 »L #@INIDX »L #DINMOD »L #HINLEN »L #LINBASE »L #POUTIDX »L #TOUTMOD »L #XOUTLEN »L #\OUTBASE »L #`COEFIDX »L #dCOEFMOD »L #hCOEFLEN »L #lCHNPTR »L #pSCTL1 »L #tSCTL2 »L #xSGCTL »L #| ADI_IIR_TypeDef ¸ ?» _ADI_ASRC_TypeDef 躺 L À ¿ RESERVED0 ªº # CTL01 »L #ÀCTL23 »L #ÄMUTE »L #È
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» L RESERVED1 üº #ÌRAT01 Ê` #àRAT23 Ê` #ä ADI_ASRC_TypeDef º
¿ _ADI_DAI_TypeDef ð» L À ¿ RESERVED0 p» # CLK0 »L #ÀCLK1 »L #ÄCLK2 »L #ÈCLK3 »L #ÌCLK4 »L #ÐCLK5 »L #Ôû» L ( ' RESERVED1 í» #ØDAT0 »L #DAT1 »L #DAT2 »L #DAT3 »L #DAT4 »L #DAT5 »L #DAT6 »L #¼ L $ # RESERVED2 x¼ #FS0 »L #ÀFS1 »L #ÄFS2 »L #ÈÒ¼ L RESERVED3 ļ #ÌFS4 »L #н L , + RESERVED4 ô¼ #ÔPIN0 »L #PIN1 »L #PIN2 »L #Q½ L RESERVED5 C½ #PIN4 »L #½ L , + RESERVED6 t½ #MISC0 »L #ÀMISC1 »L #ÄĽ L RESERVED7 ¶½ #ÈPBEN0 »L #àPBEN1 »L #äPBEN2 »L #èPBEN3 »L #ì&¾ L RESERVED8 ¾ #ðIMSK_FE »L #IMSK_RE »L #l¾ L RESERVED9 ^¾ #IMSK_PRI »L #¡¾ L RESERVED10 ¾ #IRPTL_H Ê` # IRPTL_L Ê` #¤è¾ L RESERVED11 Ú¾ #¨IRPTL_HS Ê` #°IRPTL_LS Ê` #´3¿ L ¬ « RESERVED12 #¿ #¸PIN_STAT Ê` #äGBL_SP_EN »L #èGBL_INT_EN »L #ì ADI_DAI_TypeDef V» ¹À _ADI_PCG_TypeDef &Å¿ L ÿ RESERVED0 µ¿ # CTLA0 »L #CTLA1 »L #CTLB0 »L #CTLB1 »L #PW1 »L #SYNC1 »L #FÀ L è ç RESERVED1 6À #CTLC0 »L #&CTLC1 »L #&CTLD0 »L #&CTLD1 »L #&PW2 »L #&SYNC2 »L #& ADI_PCG_TypeDef ¿ ~Ä _ADI_SPDIF_TypeDef ÀûÀ L ÿ RESERVED0 ëÀ # TX_CTL »L #TX_STAT_A0 »L #TX_STAT_B0 »L #WÁ L RESERVED1 IÁ #RX_CTL »L # RX_STAT Ê` #¤RX_STAT0_A Ê` #¨RX_STAT0_B Ê` #¬RX_STAT1_A Ê` #°RX_STAT1_B Ê` #´òÁ L RESERVED2 âÁ #¸TX_STAT_A1 »L #ÐTX_STAT_A2 »L #ÔTX_STAT_A3 »L #ØTX_STAT_A4 »L #ÜTX_STAT_A5 »L #à} L RESERVED3 o #äTX_STAT_B1 »L #èTX_STAT_B2 »L #ìTX_STAT_B3 »L #ðTX_STAT_B4 »L #ôTX_STAT_B5 »L #øà L RESERVED4 ú #üTX_UBUFF_A0 »L #TX_UBUFF_A1 »L #TX_UBUFF_A2 »L #TX_UBUFF_A3 »L #TX_UBUFF_A4 »L #TX_UBUFF_A5 »L #®Ã L RESERVED5 à #TX_UBUFF_B0 »L # TX_UBUFF_B1 »L #¤TX_UBUFF_B2 »L #¨TX_UBUFF_B3 »L #¬TX_UBUFF_B4 »L #°TX_UBUFF_B5 »L #´TÄ L RESERVED6 FÄ #¸TX_USRUPDT Ê` #¼ ADI_SPDIF_TypeDef ÏÀ ÅÄ CDSC_CNT Ê` # CDSC_INCR »L # ôÄ RDSC_CNT Ê` # RDSC_DECR »L # %Å INBUF_CNT Ê` # INBUF_INCR »L # XÅ OUTBUF_CNT Ê` # OUTBUF_DECR »L #
Å HLT_CTL »L # HLT_STAT Ê` # ³Å IMSK_STAT Ê` # INT_CLR »L # õÅ SA_ARC4IJPTR »L # SA_NONCE »L # SA_RDY »L # RË _ADI_PKTE_TypeDef CTL_STAT »L # SRC_ADDR »L #DEST_ADDR »L #SA_ADDR »L # STATE_ADDR »L #ARC4STATE_ADDR »L #USERID »L #LEN »L # ¯Æ L ` _ RESERVED0 ¡Æ # CDRBASE_ADDR »L #RDRBASE_ADDR »L #RING_CFG »L #RING_THRESH »L # Ä # ÅÄ #RING_PTR Ê` #RING_STAT »L #dÇ L ` _ RESERVED1 VÇ # CFG »L #STAT Ê` #£Ç L RESERVED2 Ç #BUF_THRESH »L # ôÄ # %Å #BUF_PTR Ê` #È L RESERVED3 ôÇ #DMA_CFG »L # 8È L ¬ « RESERVED4 (È #¤ENDIAN_CFG »L #ÐoÈ L RESERVED5 aÈ #Ô XÅ #àCONT »L #äCLK_CTL »L #è½È L RESERVED6 ¯È #ìIUMSK_STAT Ê` #
Å #INT_EN »L #INT_CFG »L #IMSK_EN »L #IMSK_DIS »L #IÉ L è ç RESERVED7 9É #SA_CMD0 »L #SA_CMD1 »L #É »L SA_KEY É #®É »L SA_IDIGEST É #¨ÑÉ »L SA_ODIGEST ÃÉ #ÈSA_SPI »L #èÊ »L SA_SEQNUM ÷É #ì'Ê »L SA_SEQNUM_MSK Ê #ô ³Å #üYÊ L RESERVED8 JÊ # {Ê »L STATE_IV mÊ #
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Ê »L STATE_BYTE_CNT Ê #
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ÃÊ »L STATE_IDIGEST µÊ #
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ëÊ L È Ç RESERVED9 ÛÊ #¸
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ARC4STATE_BUF »L #'Ë L ü û RESERVED10 Ë #DATAIO_BUF »L # ADI_PKTE_TypeDef õÅ ZÌ _ADI_PKA_TypeDef @APTR »L # BPTR »L #CPTR »L #DPTR »L # ALEN »L #BLEN »L #SHIFT »L #FUNC »L # COMPARE Ê` # RESULTMSW Ê` #$DIVMSW Ê` #(8Ì L Ô? Ó? RESERVED0 (Ì #,RAM »L #@ ADI_PKA_TypeDef iË Ì EN_SET »L # RAW_STAT Ê` # ÄÌ ACK »L # EN_STAT Ê` # [Í _ADI_PKIC_TypeDef POL_CTL »L # TYPE_CTL »L #EN_CTL »L # pÌ # Ì #EN_CLR »L #GÍ L è ç RESERVED0 7Í # ADI_PKIC_TypeDef ÄÌ ²Î _ADI_EMDMA_CFG0_TypeDef ð¡Í L 0 / RESERVED0 Í # CTL »L #0ÑÍ L RESERVED1 ÁÍ #4INDX1 »L #ÀMOD1 »L #ÄCNT1 Ê` #ÈINDX0 »L #ÌMOD0 »L #ÐCNT0 »L #ÔCHNPTR »L #ØBASE »L #ÜTPTR »L #àBUFLEN »L #äÎ L RESERVED2 Î #èTCNT »L #ì ADI_EMDMA_CFG0_TypeDef rÍ Ð _ADI_EMDMA_CFG1_TypeDef °þÎ L , + RESERVED0 ðÎ # CTL »L #,,Ï L P O RESERVED1 Ï #0INDX1 »L #MOD1 »L #CNT1 Ê` #INDX0 »L #MOD0 »L #CNT0 »L #CHNPTR »L #BASE »L #TPTR »L # BUFLEN »L #¤éÏ L RESERVED2 ÛÏ #¨TCNT »L #¬ ADI_EMDMA_CFG1_TypeDef ÏÎ Ñ _ADI_DAPROM_TypeDef ROMENTRY00 Ê` # ROMENTRY01 Ê` #ROMENTRY02 Ê` #ROMENTRY03 Ê` # ROMENTRY04 Ê` #ROMENTRY05 Ê` #ROMENTRY06 Ê` #ROMENTRY07 Ê` # ROMENTRY08 Ê` # ROMENTRY09 Ê` #$ROMENTRY10 Ê` #(ROMENTRY11 Ê` #,ROMENTRY12 Ê` #0ROMENTRY13 Ê` #4oÑ L È Ç RESERVED0 _Ñ #8 ADI_DAPROM_TypeDef *Ð ùÖ _ADI_CTI_TypeDef CTICONTROL »L # ØÑ L RESERVED0 ÊÑ #CTIINTACK »L #CTIAPPSET »L #CTIAPPCLEAR »L #CTIAPPPULSE »L # CTIINEN0 »L # CTIINEN1 »L #$CTIINEN2 »L #(CTIINEN3 »L #,CTIINEN4 »L #0CTIINEN5 »L #4CTIINEN6 »L #8CTIINEN7 »L #<ÙÒ L ` _ RESERVED1 ËÒ #@CTIOUTEN0 »L # CTIOUTEN1 »L #¤CTIOUTEN2 »L #¨CTIOUTEN3 »L #¬CTIOUTEN4 »L #°CTIOUTEN5 »L #´CTIOUTEN6 »L #¸CTIOUTEN7 »L #¼Ó L p o RESERVED2 Ó #ÀCTITRIGINSTATUS Ê` #°CTITRIGOUTSTATUS Ê` #´CTICHINSTATUS Ê` #¸CTICHOUTSTATUS Ê` #¼CTIGATE »L #ÀASICCTL »L #ÄHÔ L RESERVED3 8Ô #ÈITCHINACK »L #Ü ITTRIGINACK »L #à ITCHOUT »L #ä ITTRIGOUT »L #è ITCHOUTACK Ê` #ì ITTRIGOUTACK Ê` #ð ITCHIN Ê` #ô ITTRIGIN Ê` #ø
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Õ L RESERVED4 üÔ #ü ITCTRL »L # ?Õ L RESERVED5 /Õ # CLAIMSET »L # CLAIMCLR »L #¤ Õ L RESERVED6 yÕ #¨ LAR »L #° LSR Ê` #´ AUTHSTATUS Ê` #¸ ÚÕ L RESERVED7 ÌÕ #¼ DEVID Ê` #È DEVTYPE Ê` #Ì PERIPHID4 Ê` #Ð PERIPHID5 Ê` #Ô PERIPHID6 Ê` #Ø PERIPHID7 Ê` #Ü PERIPHID0 Ê` #à PERIPHID1 Ê` #ä PERIPHID2 Ê` #è PERIPHID3 Ê` #ì COMPID0 Ê` #ð COMPID1 Ê` #ô COMPID2 Ê` #ø COMPID3 Ê` #ü ADI_CTI_TypeDef Ñ qÜ _ADI_CTI_CFG0_TypeDef CTICONTROL »L # P× L RESERVED0 B× #CTIINTACK »L #CTIAPPSET »L #CTIAPPCLEAR »L #CTIAPPPULSE »L # CTIINEN0 »L # CTIINEN1 »L #$CTIINEN2 »L #(CTIINEN3 »L #,CTIINEN4 »L #0CTIINEN5 »L #4CTIINEN6 »L #8CTIINEN7 »L #<QØ L ` _ RESERVED1 CØ #@CTIOUTEN0 »L # CTIOUTEN1 »L #¤CTIOUTEN2 »L #¨CTIOUTEN3 »L #¬CTIOUTEN4 »L #°CTIOUTEN5 »L #´CTIOUTEN6 »L #¸CTIOUTEN7 »L #¼Ù L p o RESERVED2 Ù #ÀCTITRIGINSTATUS Ê` #°CTITRIGOUTSTATUS Ê` #´CTICHINSTATUS Ê` #¸CTICHOUTSTATUS Ê` #¼CTIGATE »L #ÀASICCTL »L #ÄÀÙ L RESERVED3 °Ù #ÈITCHINACK »L #Ü ITTRIGINACK »L #à ITCHOUT »L #ä ITTRIGOUT »L #è ITCHOUTACK Ê` #ì ITTRIGOUTACK Ê` #ð ITCHIN Ê` #ô ITTRIGIN Ê` #ø Ú L RESERVED4 tÚ #ü ITCTRL »L # ·Ú L RESERVED5 §Ú # CLAIMSET »L # CLAIMCLR »L #¤ ÿÚ L RESERVED6 ñÚ #¨ LAR »L #° LSR Ê` #´ AUTHSTATUS Ê` #¸ RÛ L RESERVED7 DÛ #¼ DEVID Ê` #È DEVTYPE Ê` #Ì PERIPHID4 Ê` #Ð PERIPHID5 Ê` #Ô PERIPHID6 Ê` #Ø PERIPHID7 Ê` #Ü PERIPHID0 Ê` #à PERIPHID1 Ê` #ä PERIPHID2 Ê` #è PERIPHID3 Ê` #ì COMPID0 Ê` #ð COMPID1 Ê` #ô COMPID2 Ê` #ø COMPID3 Ê` #ü ADI_CTI_CFG0_TypeDef × á _ADI_CSPFT_TypeDef CTL »L # HWFEAT Ê` #TRIGGER »L #äÜ L RESERVED0 ÖÜ # STAT »L #Ý L RESERVED1 Ý #TSSCTL »L #DÝ L RESERVED2 6Ý # TEEVENT »L # TECTL »L #$
Ý L RESERVED3 wÝ #(¦Ý »L ACVR Ý #@ÂÝ L 0 / RESERVED4 ´Ý #PãÝ »L ACTR ÕÝ #Þ L ° ¯ RESERVED5 òÝ #$Þ »L CNTRLDVR Þ #ÀEÞ L RESERVED6 7Þ #ÈgÞ »L CNTENR YÞ #ÐÞ L RESERVED7 xÞ #Ø¨Þ »L CNTRLDEVR Þ #àÊÞ L RESERVED8 ¼Þ #èìÞ »L CNTVR ÞÞ #ð
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ß L ( ' RESERVED9 üÞ #ø,ß »L EXTOUTEVR ß # CIDCVR »L #°_ß L RESERVED10 Qß #´CIDCMR »L #¼ß L RESERVED11
ß #ÀSYNCFR »L #àÇß L RESERVED12 ¹ß #äCCER Ê` #èùß L RESERVED13 ëß #ìTRACEIDR »L #1à L RESERVED14 !à #CLAIMSET »L # CLAIMCLR »L #¤ zà L RESERVED15 là #¨ LAR »L #° LSR Ê` #´ AUTHSTATUS Ê` #¸ Îà L RESERVED16 Àà #¼ DEVTYPE Ê` #Ì PID4 Ê` #Ð á L RESERVED17 á #Ô PID0 Ê` #à PID1 Ê` #ä PID2 Ê` #è PID3 Ê` #ì CID0 Ê` #ð CID1 Ê` #ô CID2 Ê` #ø CID3 Ê` #ü ADI_CSPFT_TypeDef Ü +â _ADI_CSTMC_TypeDef äá L RESERVED0 Ôá # FFCR »L #â L ø ÷ RESERVED1 â # ADI_CSTMC_TypeDef ¸á »â _ADI_CSTMC_CFG0_TypeDef tâ L RESERVED0 dâ # FFCR »L #¦â L ø ÷ RESERVED1 â # ADI_CSTMC_CFG0_TypeDef Câ Pã _ADI_CSTMC_CFG1_TypeDef ã L RESERVED0 ùâ # FFCR »L #;ã L ø ÷ RESERVED1 +ã # ADI_CSTMC_CFG1_TypeDef Øâ Ïè _ADI_CTI_CFG1_TypeDef CTICONTROL »L # ®ã L RESERVED0 ã #CTIINTACK »L #CTIAPPSET »L #CTIAPPCLEAR »L #CTIAPPPULSE »L # CTIINEN0 »L # CTIINEN1 »L #$CTIINEN2 »L #(CTIINEN3 »L #,CTIINEN4 »L #0CTIINEN5 »L #4CTIINEN6 »L #8CTIINEN7 »L #<¯ä L ` _ RESERVED1 ¡ä #@CTIOUTEN0 »L # CTIOUTEN1 »L #¤CTIOUTEN2 »L #¨CTIOUTEN3 »L #¬CTIOUTEN4 »L #°CTIOUTEN5 »L #´CTIOUTEN6 »L #¸CTIOUTEN7 »L #¼på L p o RESERVED2 bå #ÀCTITRIGINSTATUS Ê` #°CTITRIGOUTSTATUS Ê` #´CTICHINSTATUS Ê` #¸CTICHOUTSTATUS Ê` #¼CTIGATE »L #ÀASICCTL »L #Ä æ L RESERVED3 æ #ÈITCHINACK »L #Ü ITTRIGINACK »L #à ITCHOUT »L #ä ITTRIGOUT »L #è ITCHOUTACK Ê` #ì ITTRIGOUTACK Ê` #ð ITCHIN Ê` #ô ITTRIGIN Ê` #ø àæ L RESERVED4 Òæ #ü ITCTRL »L # ç L RESERVED5 ç # CLAIMSET »L # CLAIMCLR »L #¤ ]ç L RESERVED6 Oç #¨ LAR »L #° LSR Ê` #´ AUTHSTATUS Ê` #¸ °ç L RESERVED7 ¢ç #¼ DEVID Ê` #È DEVTYPE Ê` #Ì PERIPHID4 Ê` #Ð PERIPHID5 Ê` #Ô PERIPHID6 Ê` #Ø PERIPHID7 Ê` #Ü PERIPHID0 Ê` #à PERIPHID1 Ê` #ä PERIPHID2 Ê` #è PERIPHID3 Ê` #ì COMPID0 Ê` #ð COMPID1 Ê` #ô COMPID2 Ê` #ø COMPID3 Ê` #ü ADI_CTI_CFG1_TypeDef mã Lî _ADI_CTI_CFG2_TypeDef CTICONTROL »L # +é L RESERVED0 é #CTIINTACK »L #CTIAPPSET »L #CTIAPPCLEAR »L #CTIAPPPULSE »L # CTIINEN0 »L # CTIINEN1 »L #$CTIINEN2 »L #(CTIINEN3 »L #,CTIINEN4 »L #0CTIINEN5 »L #4CTIINEN6 »L #8CTIINEN7 »L #<,ê L ` _ RESERVED1 ê #@CTIOUTEN0 »L # CTIOUTEN1 »L #¤CTIOUTEN2 »L #¨CTIOUTEN3 »L #¬CTIOUTEN4 »L #°CTIOUTEN5 »L #´CTIOUTEN6 »L #¸CTIOUTEN7 »L #¼íê L p o RESERVED2 ßê #ÀCTITRIGINSTATUS Ê` #°CTITRIGOUTSTATUS Ê` #´CTICHINSTATUS Ê` #¸CTICHOUTSTATUS Ê` #¼CTIGATE »L #ÀASICCTL »L #Äë L RESERVED3 ë #ÈITCHINACK »L #Ü ITTRIGINACK »L #à ITCHOUT »L #ä ITTRIGOUT »L #è ITCHOUTACK Ê` #ì ITTRIGOUTACK Ê` #ð ITCHIN Ê` #ô ITTRIGIN Ê` #ø ]ì L RESERVED4 Oì #ü ITCTRL »L # ì L RESERVED5 ì # CLAIMSET »L # CLAIMCLR »L #¤ Úì L RESERVED6 Ìì #¨ LAR »L #° LSR Ê` #´ AUTHSTATUS Ê` #¸ -í L RESERVED7 í #¼ DEVID Ê` #È DEVTYPE Ê` #Ì PERIPHID4 Ê` #Ð PERIPHID5 Ê` #Ô PERIPHID6 Ê` #Ø PERIPHID7 Ê` #Ü PERIPHID0 Ê` #à PERIPHID1 Ê` #ä PERIPHID2 Ê` #è PERIPHID3 Ê` #ì COMPID0 Ê` #ð COMPID1 Ê` #ô COMPID2 Ê` #ø COMPID3 Ê` #ü ADI_CTI_CFG2_TypeDef êè Lï _ADI_TAPC_TypeDef IDCODE Ê` # USERCODE Ê` #SDBGKEY_CTL »L #SDBGKEY_STAT Ê` # SDBGKEY0 »L #SDBGKEY1 »L #SDBGKEY2 »L #SDBGKEY3 »L # 'ï L à ß RESERVED0 ï # DBGCTL »L # ADI_TAPC_TypeDef gî Üþ SEC0_ERR_IRQn CGU0_EVT_IRQn CGU1_EVT_IRQn WDOG0_EXP_IRQn WDOG1_EXP_IRQn OTPC0_ERR_IRQn TMU0_FAULT_IRQn TMU0_ALERT_IRQn TAPC_KEYFAIL_IRQn L2CTL0_ECC_ERR_IRQn L2CTL0_EVT_IRQn MEC0_EEIRQ0_IRQn MEC0_EWIRQ0_IRQn MEC0_PEIRQ0_IRQn MEC0_PEIRQ1_IRQn SYS_C0_DATA_READ_ERR_IRQn SYS_C0_DATA_WRITE_ERR_IRQn SYS_C0_INST_READ_ERR_IRQn SYS_C0_IDLE_IRQn DAI0_IRQH_IRQn DAI1_IRQH_IRQn TIMER0_TMR0_IRQn TIMER0_TMR1_IRQn TIMER0_TMR2_IRQn TIMER0_TMR3_IRQn PINT0_BLOCK_IRQn PINT1_BLOCK_IRQn PINT2_BLOCK_IRQn SYS_SOFT0_INT_IRQn SYS_SOFT1_INT_IRQn SYS_SOFT2_INT_IRQn SYS_SOFT3_INT_IRQn SYS_SOFT4_INT_IRQn ! SYS_SOFT5_INT_IRQn " SYS_SOFT6_INT_IRQn # SYS_SOFT7_INT_IRQn $ SPORT0_A_DMA_IRQn % SPORT0_A_STAT_IRQn & SPORT0_B_DMA_IRQn ' SPORT0_B_STAT_IRQn ( SPORT1_A_DMA_IRQn ) SPORT1_A_STAT_IRQn * SPORT1_B_DMA_IRQn + SPORT1_B_STAT_IRQn , SPORT2_A_DMA_IRQn - SPORT2_A_STAT_IRQn . SPORT2_B_DMA_IRQn / SPORT2_B_STAT_IRQn 0 SPORT3_A_DMA_IRQn 1 SPORT3_A_STAT_IRQn 2 SPORT3_B_DMA_IRQn 3 SPORT3_B_STAT_IRQn 4 SPORT4_A_DMA_IRQn 5 SPORT4_A_STAT_IRQn 6 SPORT4_B_DMA_IRQn 7 SPORT4_B_STAT_IRQn 8 SPORT5_A_DMA_IRQn 9 SPORT5_A_STAT_IRQn : SPORT5_B_DMA_IRQn ; SPORT5_B_STAT_IRQn < SPORT6_A_DMA_IRQn = SPORT6_A_STAT_IRQn > SPORT6_B_DMA_IRQn ? SPORT6_B_STAT_IRQn À SPORT7_A_DMA_IRQn Á SPORT7_A_STAT_IRQn  SPORT7_B_DMA_IRQn à SPORT7_B_STAT_IRQn Ä SPI2_TXDMA_IRQn Å SPI2_RXDMA_IRQn Æ SPI2_STAT_IRQn Ç SPI2_ERR_IRQn È OSPI0_INT_IRQn É TIMER0_TMR4_IRQn Ê TIMER0_TMR5_IRQn Ë TIMER0_TMR6_IRQn Ì TIMER0_TMR7_IRQn Í TIMER0_TMR8_IRQn Î TIMER0_TMR9_IRQn Ï TIMER0_STAT_IRQn Ð LP0_DMA_IRQn Ñ LP0_STAT_IRQn Ò LP1_DMA_IRQn Ó LP1_STAT_IRQn Ô SPI0_TXDMA_IRQn Õ SPI0_RXDMA_IRQn Ö SPI0_STAT_IRQn × SPI0_ERR_IRQn Ø SPI1_TXDMA_IRQn Ù SPI1_RXDMA_IRQn Ú SPI1_STAT_IRQn Û SPI1_ERR_IRQn Ü UART0_TXDMA_IRQn Ý UART0_RXDMA_IRQn Þ UART0_STAT_IRQn ß UART1_TXDMA_IRQn à UART1_RXDMA_IRQn á UART1_STAT_IRQn â UART2_TXDMA_IRQn ã UART2_RXDMA_IRQn ä UART2_STAT_IRQn å TWI0_DATA_IRQn æ TWI1_DATA_IRQn ç TWI2_DATA_IRQn è TWI3_DATA_IRQn é TWI4_DATA_IRQn ê TWI5_DATA_IRQn ë CNT0_STAT_IRQn ì CTI0_EVT0_IRQn í PKIC0_IRQ_IRQn î PKTE0_IRQ_IRQn ï TRU0_SLV0_IRQn ð TRU0_SLV1_IRQn ñ TRU0_SLV2_IRQn ò TRU0_SLV3_IRQn ó DAI0_IRQL_IRQn ô DAI1_IRQL_IRQn õ FIR0_DMA_IRQn ö FIR0_STAT_IRQn ÷ IIR0_DMA_IRQn ø IIR0_STAT_IRQn ù HADC0_EVT_IRQn ú MLB0_INT0_IRQn û MLB0_INT1_IRQn ü MLB0_STAT_IRQn ý SYS_MDMA3_SRC_IRQn þ SYS_MDMA3_DST_IRQn ÿ SYS_MDMA2_SRC_IRQn SYS_MDMA2_DST_IRQn EMDMA0_DONE_IRQn EMDMA1_DONE_IRQn SYS_MDMA0_SRC_IRQn SYS_MDMA0_DST_IRQn
SYS_MDMA1_SRC_IRQn SYS_MDMA1_DST_IRQn CRC0_DCNTEXP_IRQn CRC1_DCNTEXP_IRQn CRC0_ERR_IRQn CRC1_ERR_IRQn SPORT0_A_DMA_ERR_IRQn SPORT0_B_DMA_ERR_IRQn SPORT1_A_DMA_ERR_IRQn SPORT1_B_DMA_ERR_IRQn SPORT2_A_DMA_ERR_IRQn SPORT2_B_DMA_ERR_IRQn SPORT3_A_DMA_ERR_IRQn SPORT3_B_DMA_ERR_IRQn SPORT4_A_DMA_ERR_IRQn SPORT4_B_DMA_ERR_IRQn SPORT5_A_DMA_ERR_IRQn SPORT5_B_DMA_ERR_IRQn SPORT6_A_DMA_ERR_IRQn SPORT6_B_DMA_ERR_IRQn SPORT7_A_DMA_ERR_IRQn SPORT7_B_DMA_ERR_IRQn SPI2_TXDMA_ERR_IRQn SPI2_RXDMA_ERR_IRQn SPI0_TXDMA_ERR_IRQn SPI0_RXDMA_ERR_IRQn SPI1_TXDMA_ERR_IRQn SPI1_RXDMA_ERR_IRQn ¡ UART0_TXDMA_ERR_IRQn ¢ UART0_RXDMA_ERR_IRQn £ UART1_TXDMA_ERR_IRQn ¤ UART1_RXDMA_ERR_IRQn ¥ UART2_TXDMA_ERR_IRQn ¦ UART2_RXDMA_ERR_IRQn § LP0_DMA_ERR_IRQn ¨ LP1_DMA_ERR_IRQn © SYS_MDMA0_SRC_ERR_IRQn ª SYS_MDMA0_DST_ERR_IRQn « SYS_MDMA1_SRC_ERR_IRQn ¬ SYS_MDMA1_DST_ERR_IRQn SYS_MDMA2_SRC_ERR_IRQn ® SYS_MDMA2_DST_ERR_IRQn ¯ SYS_MDMA3_SRC_ERR_IRQn ° SYS_MDMA3_DST_ERR_IRQn ± SWU1_EVT_IRQn ³ SWU2_EVT_IRQn ´ SWU7_EVT_IRQn µ SWU8_EVT_IRQn ¶ SWU11_EVT_IRQn · SWU12_EVT_IRQn ¸ SWU13_EVT_IRQn ¹ SPU0_INT_IRQn º SYS_SMPU_AGGR_INT_IRQn » SYS_C0_DS_SLV_ACC_INTR_IRQn ¼ DAI0_GBL_SPORT_INT0_IRQn ½ DAI0_GBL_SPORT_INT1_IRQn ¾ DAI1_GBL_SPORT_INT0_IRQn ¿ DAI1_GBL_SPORT_INT1_IRQn À IRQn_Type cï SPORT0_A_DMA_CHANn SPORT0_B_DMA_CHANn SPORT1_A_DMA_CHANn SPORT1_B_DMA_CHANn SPORT2_A_DMA_CHANn SPORT2_B_DMA_CHANn SPORT3_A_DMA_CHANn SPORT3_B_DMA_CHANn SYS_MDMA0_SRC_CHANn SYS_MDMA0_DST_CHANn SPORT4_A_DMA_CHANn
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SPORT4_B_DMA_CHANn SPORT5_A_DMA_CHANn SPORT5_B_DMA_CHANn SPORT6_A_DMA_CHANn SPORT6_B_DMA_CHANn SPORT7_A_DMA_CHANn SPORT7_B_DMA_CHANn SYS_MDMA1_SRC_CHANn SYS_MDMA1_DST_CHANn UART0_TXDMA_CHANn UART0_RXDMA_CHANn SPI0_TXDMA_CHANn SPI0_RXDMA_CHANn SPI1_TXDMA_CHANn SPI1_RXDMA_CHANn SPI2_TXDMA_CHANn SPI2_RXDMA_CHANn LP0_DMA_CHANn UART1_TXDMA_CHANn " UART1_RXDMA_CHANn # LP1_DMA_CHANn $ UART2_TXDMA_CHANn % UART2_RXDMA_CHANn & SYS_MDMA2_SRC_CHANn ' SYS_MDMA2_DST_CHANn ( SYS_MDMA3_SRC_CHANn + SYS_MDMA3_DST_CHANn , DMA_CHANn_TypeDef ìþ ] / »L INPUT ! # L »L OUTPUT > #
INTACK »L # STAT Ê` # º RUNCNT Ê` # ¬ »L RUN # ß Ñ »L KEY Ã # ý
# º # = Ê` POKER # 1 »L V # # } _ADI_TRNG_TypeDef # ] #CTL »L #CFG »L #ALMCNT »L # FROEN »L # FRODETUNE »L #$ALMMSK »L #(ALMSTP »L #,LFSR_L »L #0LFSR_M »L #4LFSR_H »L #8CNT »L #< ß #@MONOBITCNT Ê` #\ ý #`TEST »L #pBLKCNT »L #ti L RESERVED1 [ #x ADI_TRNG_TypeDef = ADI_PWR_SUCCESS ADI_PWR_FAILURE ADI_PWR_INVALID_DEVICE_NUM ADI_PWR_NULL_POINTER ADI_PWR_INVALID_PARAMETER ADI_PWR_OPERATION_NOT_ALLOWED ADI_PWR_DEVICE_IN_USE ADI_PWR_DEVICE_NOTINITIALIZED ADI_PWR_PLL_NOTENABLED ADI_PWR_PLL_NOTBYPASSED ADI_PWR_PLL_BYPASSED
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ADI_PWR_PLL_NOTLOCKED ADI_PWR_PLL_NOTALIGNED ADI_PWR_CGUWRITE_NOTREQUESTED ADI_PWR_INTERRUPT_FAILED ADI_PWR_MODE_UNKNOWN ADI_PWR_INVALID_MODE ADI_PWR_INVALID_MODE_TRANSITION ADI_PWR_CDU_INIT_FAILED ADI_PWR_INIT_FAILED ADI_PWR_CLOCK_INIT_FAILED ADI_PWR_ACTIVE_FULLON_SWITCH_FAILED ADI_PWR_WRITETO_DIVCTL_FAILED ADI_PWR_RESULT ? ADI_PWR_CGU0 ADI_PWR_CGU1 ADI_PWR_CGU_DEVNUM ë
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ADI_PWR_REG_CGU0_CTL £ ADI_PWR_REG_CGU0_PLLCTL £ ADI_PWR_REG_CGU0_STAT £ ADI_PWR_REG_CGU0_DIV £ ADI_PWR_REG_CGU0_CLKOUTSEL £ ADI_PWR_REG_CGU0_OSCWDCTL £ ADI_PWR_REG_CGU0_TSCTL £ ADI_PWR_REG_CGU0_TSVALUE0 £ ADI_PWR_REG_CGU0_TSVALUE1 £ ADI_PWR_REG_CGU0_TSCOUNT0 ¤ £ ADI_PWR_REG_CGU0_TSCOUNT1 ¨ £ ADI_PWR_REG_CGU0_CCBF_DIS ¬ £ ADI_PWR_REG_CGU0_CCBF_STAT ° £ ADI_PWR_REG_CGU0_SCBF_DIS ¸ £ ADI_PWR_REG_CGU0_SCBF_STAT ¼ £ ADI_PWR_REG_CGU0_DIVEX À £ ADI_PWR_REG_CGU1_CTL À£ ADI_PWR_REG_CGU1_PLLCTL À£ ADI_PWR_REG_CGU1_STAT À£ ADI_PWR_REG_CGU1_DIV À£ ADI_PWR_REG_CGU1_SCBF_DIS ¸À£ ADI_PWR_REG_CGU1_SCBF_STAT ¼À£ ADI_PWR_REG_DPM0_CTL ¤ ADI_PWR_REG_DPM0_STAT ¤ ADI_PWR_REG_DPM0_PER_DIS0 ð¤ ADI_PWR_REG_DPM0_PER_DIS1 ô¤ ADI_PWR_REG_CDU0_STAT À࣠ADI_PWR_REG_CDU0_CLKINSEL Ä࣠ADI_PWR_REG_CDU0_CFG0 ࣠ADI_PWR_REG_CDU0_CFG1 ࣠ADI_PWR_REG X ADI_PWR_LOCK_CGU0_CTL £ ADI_PWR_LOCK_CGU0_PLLCTL £ ADI_PWR_LOCK_CGU0_DIV £ ADI_PWR_LOCK_CGU0_CLKOUTSEL £ ADI_PWR_LOCK_CGU0_OSCWDCTL £ ADI_PWR_LOCK_CGU0_TSCTL £ ADI_PWR_LOCK_CGU0_CCBF_DIS ¬ £ ADI_PWR_LOCK_CGU0_SCBF_DIS ¸ £ ADI_PWR_LOCK_REG_CGU0 ý
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ADI_PWR_LOCK_CGU1_CTL À£ ADI_PWR_LOCK_CGU1_PLLCTL À£ ADI_PWR_LOCK_CGU1_DIV À£ ADI_PWR_LOCK_CGU1_SCBF_DIS ¸À£ ADI_PWR_LOCK_REG_CGU1 ADI_PWR_LOCK_CDU0_CFG0 ࣠ADI_PWR_LOCK_CDU0_CFG1 ࣠ADI_PWR_LOCK_CDU0_CLKINSEL Ä࣠ADI_PWR_LOCK_REG_CDU » £ ADI_PWR_LOCK_DPM0_CTL ¤ ADI_PWR_LOCK_DPM0_PER_DIS0 ð¤ ADI_PWR_LOCK_DPM0_PER_DIS1 ô¤ ADI_PWR_LOCK_REG_DPM ; ö ADI_PWR_CDU_CLKOUT_0 ADI_PWR_CDU_CLKOUT_1 ADI_PWR_CDU_CLKOUT ¾ q ADI_PWR_CDU_CLKIN_0 ADI_PWR_CDU_CLKIN_1 ADI_PWR_CDU_CLKIN_2 ADI_PWR_CDU_CLKIN_3 ADI_PWR_CDU_CLKIN ± ADI_PWR_CDU_CGU_SELECT_CGU1 ADI_PWR_CDU_CGU_SELECT ø ADI_PWR_CDU_CLK_SELECT_CLKIN0 ADI_PWR_CDU_CLK_SELECT Î n ADI_PWR_MODE_FULL_ON ADI_PWR_MODE_ACTIVE ADI_PWR_MODE_ACTIVE_PLLDISABLED ADI_PWR_MODE ä ADI_PWR_DPM_PER_DIS_FIR0 ADI_PWR_DPM_PER_DIS_IIR0 ADI_PWR_DPM_PER_DIS_DAI0 ADI_PWR_DPM_PER_DIS_DAI1 ADI_PWR_DPM_PER_DIS_MLB0 ADI_PWR_DPM_PER_DIS_DLMDMA_CH0 ADI_PWR_DPM_PER_DIS_DLMDMA_CH1 ADI_PWR_DPM_PER_DIS_CRYPTO_ACCEL_0 ADI_PWR_DPM_PER_DIS_CRYPTO_ACCEL_1 ADI_PWR_DPM_PER_DIS_SMPU_SPI2 ADI_PWR_DPM_PER_DIS_SMPU_L2CTL_CL2_0 ADI_PWR_DPM_PER_DIS_SMPU_L2CTL_DL2_0 ADI_PWR_DPM_PER_DIS_DMC0 ADI_PWR_DPM_PER_DIS_TWI0 ADI_PWR_DPM_PER_DIS_TWI1 ADI_PWR_DPM_PER_DIS_TWI2 ! ADI_PWR_DPM_PER_DIS_TWI3 " ADI_PWR_DPM_PER_DIS_TWI4 # ADI_PWR_DPM_PER_DIS_TWI5 $ ADI_PWR_DPM_PER_DIS_OSPI % ADI_PWR_DPM_PER_DIS * ADI_PWR_CLKOUT_CLKIN0 ADI_PWR_CLKOUT_GND1 ADI_PWR_CLKOUT_CGU0_SYSCLK0 ADI_PWR_CLKOUT_CGU0_CCLK0 ADI_PWR_CLKOUT_CLKO1 ADI_PWR_CLKOUT_CLKO0 ADI_PWR_CLKOUT_CGU0_OCLK ADI_PWR_CLKOUT_CGU1_SYSCLK0 ADI_PWR_CLKOUT_CGU1_OCLK ADI_PWR_CLKOUT_CGU0_SCLK1 ADI_PWR_CLKOUT_CGU0_SCLK0 ADI_PWR_CLKOUT_VALUE þ ADI_PWR_CCLKBUFDIS_STATREG °& ADI_PWR_DPM_STATREG ðC ADI_PWR_CGU_STATREG $ ADI_PWR_SCLKBUFDIS_STATREG /( ADI_PWR_CDU_STATREG 7@ T fsysclk Þ # fsclk0 Þ #fsclk1 Þ #fdclk Þ # foclk Þ #fcclk Þ #fpllclk Þ # ADI_PWR_CLK_STRUCT Õ S ctl_MSEL # ctl_DF # ctl_SELEXEN # div_CSEL # div_SYSSEL # div_S0SEL #
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div_S1SEL # div_DSEL # div_OSEL #divex_S1SELEX # ADI_PWR_CGU_CLOCKREGS m cfg_SEL q # cfg_EN m # ¨ o ADI_PWR_CDU_CLOCKREGS ; clkin # enable_IDLE m #enable_SCLK1ExDiv m #clocksettings S #cgu1_clkinsel ø # ADI_PWR_CGU_PARAM_SETTINGS Ä | cdu_settings ¨ # ADI_PWR_CDU_PARAM_LIST \ Ñ (cgu0_settings ; # cgu1_settings ; # ADI_PWR_CGU_PARAM_LIST ó SH0_FIR0 m # SH0_IIR0 m #DAI0 m #DAI1 m #MLB0 m #DLMDMA_CH0 m #DLMDMA_CH1 m #CRYPTO_ACCEL_0 m #CRYPTO_ACCEL_1 m #SMPU_SPI2 m # SMPU_L2CTL_CL2_0 m #
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SMPU_L2CTL_DL2_0 m # DMC0 m # ADI_PWR_DPM_PER_DIS0 î z TWI0 m # TWI1 m #TWI2 m #TWI3 m #TWI4 m #TWI5 m #OSPI m # ADI_PWR_DPM_PER_DIS1 Á PerDis0 ó # PerDis1 z # ADI_PWR_DPM_PER_DIS_CONFIG â | adi_pwr_cfg0_init pADI_CGU_Param_List Ñ ¼ pADI_CDU_Param_List | d delay Û t ³ ö
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..\drv\ D:\project\plugscard\dsp21569\DSP-21569\system D:\project\plugscard\dsp21569\DSP-21569\lib\zlib D:\project\plugscard\dsp21569\DSP-21569\inc C:\Analog Devices\CrossCore Embedded Studio 2.11.0\SHARC\include C:\Analog Devices\CrossCore Embedded Studio 2.11.0\SHARC\include\sys\ C:\Analog Devices\CrossCore Embedded Studio 2.11.0\SHARC\include\services\int\ C:\Analog Devices\CrossCore Embedded Studio 2.11.0\SHARC\include\services\pwr\ ..\drv\pwr.c Á®×Fsys\platform.h è¿þ platform_include.h Ô¦µ>cdef21569.h Ü¿ sys\ADSP-2156x-core_cdef.h è¿×istdint.h ì¿ÿMyvals.h ä¿Ç¤ADSP-2156x-core.h è¿·
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def21569.h Ü¿Î.sys\ADSP_2156x_HPC.h æ¿ë
sys\ADSP_SC5xx_legacy.h ä¿ôßsys\def2156x_id_macros.h ä¿À9sys\ADSP_2156x_HPC_cdef.h ä¿Ä sys\internal_system_prototypes.h è¿û processor_include.h 쿱21569.h Ü¿!sys\adi_core.h 俵"sys\cache.h è¿*stdbool.h Ü¿builtins.h Ò»Äøsys\builtins_support.h è¿Ú
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stdlib.h ä¿Ustdlib_21xxx.h Ü¿ö.services\pwr\adi_pwr.h Þ¿ø services\int\adi_int.h Ü¿adi_int_id.h Ü¿ì interrupt.h ì¿ñsysreg.h Ò»Àadi_pwr_2156x.h Þ¿æ®adi_osal.h ä½åäadi_osal_arch.h ì¿adi_types.h ä¿ï stdarg.h î¿ý stdio.h Ü¿ÝCstdio_21xxx.h ä¿ADSP-2156x_device.h Ü¿èADSP-21569_device.h 俲"ADSP-21569_typedefs.h Ü¿ sys\ADSP_2156x_HPC_typedefs.h ä¿ÝØ\sys\ADSP_2156x_HPC_device.h ä¿Â
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ÿ ÿ? ÿ? ÿ+ à à+ ã3 ÿ3 À C:\Analog Devices\CrossCore Embedded Studio 2.11.0\easm21k.exe -proc ADSP-21569 -si-revision any -D__WORKAROUND_20000002 -D__WORKAROUND_20000069 -D__WORKAROUNDS_ENABLED -DCORE0=1 -I D:\project\plugscard\dsp21569\DSP-21569\system -I D:\project\plugscard\dsp21569\DSP-21569\lib\zlib -I D:\project\plugscard\dsp21569\DSP-21569\inc -char-size-8 -swc -D__SHORT_WORD_CODE__ -file-attr ProjectName=DSP-21569 -sp -no-source-dependency -o drv\pwr.doj C:\Users\86189\AppData\Local\Temp\acc61b8ec45000\acc61b8ec45001.s -I D:\project\plugscard\dsp21569\DSP-21569\Debug\..\drv -W2023 -Wsuppress 2548 -Wsuppress 2548 ProjectName DSP-21569 ProjectName DSP-21569 FuncName disable_interrupts. FuncName enable_interrupts. FuncName llabs. FuncName llmin. FuncName llmax. FuncName adi_pwr_cfg0_init. Encoding SW Content Code AU AnonADI ADSP-21569 dÿÿ 4 G { M { H è Ã
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