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Q 4 ( .strtab .symtab .attributes seg_swco .epctext fir_acc_remove. .LNfir_acc_remove. .LN0 firHead. .__constant .__operator .P34L1 .LN1 .P34L2 .LN2 .P34L5 .LN3 .LN4 .P34L6 .LN5 .LN6 .LN.fir_acc_remove..end .fir_acc_remove..end fir_acc_update_coeffs. .LNfir_acc_update_coeffs. .LN7 .P35L1 .LN8 .P35L2 .LN9 .P35L5 .LN10 .LN11 .LN12 .P35L7 .LN13 .LN14 .LN.fir_acc_update_coeffs..end .fir_acc_update_coeffs..end fir_acc_startup. .LNfir_acc_startup. .LN15 .P36L2 .LN16 .P36L4 .LN17 .P36L5 .LN18 .P36L8 .LN19 .LN20 .LCJ0 .P36L9 .LN21 .P36L11 .LN22 __memcpyDD. .LCJ1 .LN23 .LN24 .P36L12 .LN25 .LN26 .LN27 .P36L3 .LN28 .P36L14 .LN29 .LN30 .P36L15 .LN31 .LN.fir_acc_startup..end .fir_acc_startup..end fir_acc_isr. .LNfir_acc_isr. .LN32 .LN33 .LN34 .P38L2 .LN35 .LCJ2 .P38L3 .LN36 .LN.fir_acc_isr..end .fir_acc_isr..end fir_acc_init. .LNfir_acc_init. .LN37 .LN38 .LN39 .LN40 __simd_memsetD. .LCJ3 .LN41 .LN.fir_acc_init..end .fir_acc_init..end fir_acc_delete. .LNfir_acc_delete. .LN42 .LN43 .P41L1 .LN44 .P41L2 .P41L4 .LN45 .P41L5 .LN46 .LN47 .LN48 sram_free. .LCJ4 .LN49 .LN50 .LN51 .LN52 .LN53 .LN54 .LN.fir_acc_delete..end .fir_acc_delete..end fir_acc_add. .LNfir_acc_add. .LN55 .LN56 .P43L2 .LN57 .P43L4 .LN58 .P43L6 .LN59 .P43L7 .LN60 .P43L10 .LN61 .LN62 .LN63 sram_malloc. .LCJ5 .LN64 .LN65 .P43L14 .LN66 .LN67 .P43L18 .LN68 .LN69 .P43L19 .LN70 .LN71 .LN72 .LN73 .LN74 .LN75 .LN76 .LN77 .LN78 .LN79 .LN80 .LN81 .LN82 .LN83 .LN84 .LN85 .LN86 .LN87 .LN88 .LN89 .LN90 .LN91 .LN92 .LN93 .P43L22 .LN94 .LN95 .P43L23 .LN96 .P43L24 .LN97 .P43L25 .LN98 .LN99 .LN100 .LN101 .LN102 .LN103 .LN104 .LN.fir_acc_add..end .fir_acc_add..end .epctext.end seg_dmda .epcbss .epcbss.end .debug_abbrev .epcabbrev .epcabbrev.end .debug_info .epcdebug .epcline .epcdebug.end .debug_line .epcline.end .debug_pubnames .epcpubnames .epcpubnames.end .debug_aranges .epcaranges .epcaranges.end ..\drv\FIR_acc.c .rela.seg_swco .align.seg_swco .align.seg_dmda .rela..debug_info .rela..debug_line .rela..debug_pubnames .rela..debug_aranges .commandLine .adi.attributes B ñÿù & ¿ ì m A ~ ñ ú * @ y G ÿ $ ² 1 ú Y j R
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2 ' I $ I ! 7"/ 2 ' I & I .2 ' I? I 4 4 2 I ,? .2 ' ? 5 I Å ..\drv\FIR_acc.c D:\project\plugscard\dsp21569\DSP-21569\Debug C/C++ Compiler : SHARC version 8.15.0.0 (Apr 20 2022 18:13:48)
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[ce7a0e45923b14815a072ad54a672fd5bfe93d2a]
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Copyright (c) 1997-2022 Analog Devices, Inc.
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Copyright (c) 1998-2014 Edison Design Group, Inc.
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Copyright (c) 1997-1999 Edinburgh Portable Compilers, Ltd.
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bool wchar_t char signed char unsigned char short signed short unsigned short int signed int unsigned int long signed long unsigned long long long signed long long unsigned long long short _Fract áÿÿÿ_Fract áÿÿÿlong _Fract áÿÿÿunsigned short _Fract àÿÿÿunsigned _Fract àÿÿÿunsigned long _Fract àÿÿÿfloat double long double _Complex float _Complex double _Complex long double void * _Ptrdifft _Sizet _Int32t ç _Uint32t ö _Longlong 2 _ULonglong U _Wintt ß _Wchart ß va_list é _Va_list ï ? _Mbstatet _Wchar Û # _State # _Mbstatet _Sysch_t int8_t int16_t ± int32_t uint8_t uint16_t Ì uint32_t int_least8_t int_least16_t ± uint_least8_t uint_least16_t Ì int_least32_t uint_least32_t int_fast8_t int_fast16_t ± uint_fast8_t uint_fast16_t Ì int_fast32_t uint_fast32_t uintptr_t ö intptr_t ß int64_t uint64_t ½ int_least64_t uint_least64_t ½ int_fast64_t uint_fast64_t ½ intmax_t uintmax_t ½ ¬ ADI_CORE_ENABLE_SUCCESS ADI_CORE_ENABLE_INVALID_CORE ADI_CORE_ENABLE_CURRENT_CORE ADI_CORE_ENABLE_STATUS J å ADI_CORE_SHARC0 ADI_CORE_ID É k _adiCacheStatus adi_cache_success adi_cache_unsuitable_rr adi_cache_anom_rr_fail adi_cache_failure adiCacheStatus ÷ _adiRangeReg adi_cache_rr0 adi_cache_rr1 adi_cache_rr2 adi_cache_rr3 adi_cache_rr4 adi_cache_rr5
adi_cache_rr6 adi_cache_rr7 adiRangeReg Ç _adiRangeSetting adi_cache_disable_range adi_cache_noncacheable_range adi_cache_flush_range adi_cache_lock_range adi_cache_wt_range adiRangeSetting 0 õ __builtin_quad acc80 Ý size_t ptrdiff_t ß Ø
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sysreg_I6 sysreg_I7 sysreg_B6 sysreg_B7 sysreg_ASTAT sysreg_ASTATX sysreg_ASTATY sysreg_USTAT1 sysreg_USTAT3 sysreg_USTAT2 sysreg_USTAT4
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sysreg_MODE1 sysreg_MODE2 sysreg_MODE1STK sysreg_IRPTL sysreg_IMASK sysreg_IMASKP __unsupported_sysreg_2 sysreg_MMASK sysreg_FLAGS sysreg_PCSTKP sysreg_PCSTK sysreg_CURLCNTR sysreg_LADDR sysreg_STKY sysreg_STKYX sysreg_STKYY __num_SysRegs adi_dispatched_callback_t h
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adi_dispatched_handler_t f ADI_INT_SUCCESS ADI_INT_FAILURE ADI_INT_STATUS 8
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iid ¤ handlerArg h { ADI_INT_HANDLER_PTR
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é pCBParam h Event ¤ pArg h ½ ADI_CALLBACK é errno_t ß rsize_t þ ADI_STRING_S_ERR_OK ADI_STRING_S_ERR_NULL ADI_STRING_S_ERR_BOUNDS ADI_STRING_S_ERR_OVERLAP ADI_STRING_S_ERR_INVALID ADI_STRING_S_ERR_ADDRESSING ADI_STRING_S_ERR_RSIZE_MAX ADI_STRING_S_NUM_ERR_CODES s8 s16 ± s32 ß u8 u16 Ì u32 ö u64 U ufloat ubool udouble void uvoid i uvoidptr h name_t ¿ o content h ¥ acc_completely_handler ¿ wchar_t ß 3 __heap_desc base h # length #userid ß # __heap_desc_t ð l quot ß # rem ß # div_t G quot # rem # ldiv_t x Ï quot 2 # rem 2 # lldiv_t ª
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æ _t_atexit_fp Ý ß h h _t_compare_fp ù
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L msg ptr h error & constraint_handler_t L ¢ SRAM_L2 SRAM_L1 SRAM_DDR SRAM_AUTO MemoryType m ï mem_pm mem_dm1 mem_dm2 mem_heap mem_any meml1_sub_type ³ E acc_status acc_idle acc_processing acc_completely 4 FIR_tcb Xid $ # cp_update #remove O #mtap . #B ip_buff #op_buff # cf_buff #cf_temp # ï tcb á # E next ü #Lcontent h #Pcallback Å #T FIR_tcb_head status # stop O #num $ #count . #next ü # î fir_acc_remove o ID $ t fir ü x R fir_acc_update_coeffs o ID $ p cp t fir ü x ¦ fir_acc_startup o fir ü x ì fir_acc_isr sig t arg { x Y fir_acc_init o _sig . p index t offset x ¼ fir_acc_delete o fir ü t q ü x ª fir_acc_add $ ID $ d input_buffer h output_buffer l coeffs_buffer win_size $ tap $ content h cb Å fir ü p tmp ü x firHead à 4 Ä ^ ö
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..\drv\ D:\project\plugscard\dsp21569\DSP-21569\system D:\project\plugscard\dsp21569\DSP-21569\lib\zlib D:\project\plugscard\dsp21569\DSP-21569\inc C:\Analog Devices\CrossCore Embedded Studio 2.11.0\SHARC\include C:\Analog Devices\CrossCore Embedded Studio 2.11.0\SHARC\include\services\int\ C:\Analog Devices\CrossCore Embedded Studio 2.11.0\SHARC\include\sys\ ..\drv\FIR_acc.c ѱø¥û*services\int\adi_int.h Ü¿stdint.h ì¿ÿMyvals.h ä¿Ç¤stdbool.h Ü¿adi_int_id.h Ü¿ì sys\platform.h è¿þ platform_include.h Ô¦µ>cdef21569.h Ü¿ sys\ADSP-2156x-core_cdef.h è¿×iADSP-2156x-core.h è¿·
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def21569.h Ü¿Î.sys\ADSP_2156x_HPC.h æ¿ë
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interrupt.h ì¿ñsysreg.h Ò»Àstring.h ê¿ûDFIR_acc.h ½ýÀtypedefs.h ìºÅmemory.h æÚþ¥ßstdlib.h ä¿Ustdlib_21xxx.h Ü¿ö. ë
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4 àz 4 㤠4 ÿ¤ 8 ÿy < à < ày < 㤠< ÿ¤ @ ÿx D à D àx D 㤠D ÿ¤ À  C:\Analog Devices\CrossCore Embedded Studio 2.11.0\easm21k.exe -proc ADSP-21569 -si-revision any -D__WORKAROUND_20000002 -D__WORKAROUND_20000069 -D__WORKAROUNDS_ENABLED -DCORE0=1 -I D:\project\plugscard\dsp21569\DSP-21569\system -I D:\project\plugscard\dsp21569\DSP-21569\lib\zlib -I D:\project\plugscard\dsp21569\DSP-21569\inc -char-size-8 -swc -D__SHORT_WORD_CODE__ -file-attr ProjectName=DSP-21569 -sp -no-source-dependency -o drv\FIR_acc.doj C:\Users\86189\AppData\Local\Temp\accd65cec41000\accd65cec41001.s -I D:\project\plugscard\dsp21569\DSP-21569\Debug\..\drv -W2023 -Wsuppress 2548 -Wsuppress 2548 ProjectName DSP-21569 ProjectName DSP-21569 FuncName fir_acc_remove. FuncName fir_acc_update_coeffs. FuncName fir_acc_startup. FuncName llabs. FuncName llmin. FuncName llmax. FuncName disable_interrupts. FuncName enable_interrupts. FuncName fir_acc_isr. FuncName fir_acc_init. FuncName fir_acc_delete. FuncName fir_acc_add. Encoding SW Content CodeData A^ AnonADI ADSP-21569 dÿÿ 4 î " @ É b : ^ { ¨ ! £ É É Ð 1 È é Z: ñ: P S A; ¼ ýB | yE ¦ K ¼ K ° b p ÉL r p ÕL Ñ íL a NO b Þ p °P _
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