/*
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* scene.c
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*
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* Created on: 2025Äê7ÔÂ18ÈÕ
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* Author: 86189
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*/
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#include <string.h>
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#include <stdlib.h>
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#include <stdio.h>
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#include "tg_scene.h"
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#include "../protocol_internal.h"
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#include "../ModuleExport.h"
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tgScene::tgScene(hw_adapter_t* adapter):Scene(adapter)
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{
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s8 inport_str[8],outport_str[8];
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s8 ana_input_num, ana_output_num,dante_input_num,dante_output_num ;
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s16 input_num, output_num ;
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s32 n;
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s16 dual_dsp = adapter->get_system_is_dual_dsp();
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s16 dsp_index = adapter->get_dsp_index();
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adapter->get_channel_num(&ana_input_num, &ana_output_num, &dante_input_num, &dante_output_num);
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input_num = ana_input_num + dante_input_num;
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output_num = dante_input_num + dante_output_num;
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//port from 1 start.
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sprintf(inport_str, "1-%d", input_num);
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__MADD(299,PROC_INPUT,inport_str,inport_str,0, 1 ,¶meters.input, 0, ModuleInterfaceType::PHY_INPUT);
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__MADD(298,PROC_METER,inport_str,"",0,1 ,NULL,0, ModuleInterfaceType::SOFT_MODULE); //tag:0-peak,1-rms
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//The number of DSPs is 1, but the number of input and output channels is greater than 16.
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//It only processes analog input and output.
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//However, for the channels that do not need to be processed, the level offset needs to be calculated.
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if(!dual_dsp && input_num >16) {
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n = ana_input_num;
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}
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else {
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n= input_num;
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}
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//expander
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for(s32 i =0 ;i < input_num ; i++) {
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sprintf(inport_str, "%d|", i+1);
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__MADD(1+i,PROC_EXPANDER, inport_str, inport_str, 0, 0, ¶meters.in1[i], 0, ModuleInterfaceType::SOFT_MODULE);
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}
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//compresser
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for(s32 i =0 ;i < input_num ; i++) {
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sprintf(inport_str, "%d|", i+1);
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__MADD(33+i,PROC_COMPRESS, inport_str, inport_str, 0, 0, ¶meters.in2[i], 0, ModuleInterfaceType::SOFT_MODULE);
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}
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//agc
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for(s32 i =0 ;i < input_num ; i++) {
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sprintf(inport_str, "%d|", i+1);
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__MADD(65+i,PROC_AGC, inport_str, inport_str, 0, 0, ¶meters.in3[i], 0, ModuleInterfaceType::SOFT_MODULE);
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}
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//eq
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for(s32 i =0 ;i < input_num ; i++) {
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sprintf(inport_str, "%d|", i+1);
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__MADD(97+i,PROC_EQ, inport_str, inport_str, 0, 0, ¶meters.in4[i], 8, ModuleInterfaceType::SOFT_MODULE);
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}
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//nhs
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for(s32 i =0 ;i < input_num ; i++) {
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sprintf(inport_str, "%d|", i+1);
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__MADD(129+i,PROC_FEEDBACK, inport_str, inport_str, 0, 0, ¶meters.in5[i], 8, ModuleInterfaceType::SOFT_MODULE);
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}
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//am
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sprintf(inport_str, "1-%d", input_num);
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sprintf(outport_str, "1-%d", input_num+1);
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__MADD(161,PROC_AUTOMIXER,inport_str, outport_str,0, 0, ¶meters.automixer, 0, ModuleInterfaceType::SOFT_MODULE); //¿ÉÌæ»»
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//aec selector
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sprintf(inport_str, "1-%d", input_num+ 2);//+1 add usb
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sprintf(outport_str, "%d|%d|", input_num+ 3, input_num+ 4);
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__MADD(162,PROC_SELECTOR, inport_str,outport_str, 0, 1, ¶meters.aec_selector, 0, ModuleInterfaceType::SOFT_MODULE); //add usb
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//aec
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sprintf(inport_str, "%d|%d", input_num+ 3, input_num+ 4);
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sprintf(outport_str, "%d|", input_num+ 3);
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__MADD(163,PROC_AEC,inport_str, outport_str ,0, 1, ¶meters.aec, 256, ModuleInterfaceType::SOFT_MODULE);
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//ans selector
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sprintf(inport_str, "0-%d", input_num+ 3);
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sprintf(outport_str, "%d|", input_num+ 4);
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__MADD(164,PROC_SELECTOR,inport_str,outport_str, 1, 1 ,¶meters.ans_selector, 0, ModuleInterfaceType::SOFT_MODULE);
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//ans
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sprintf(inport_str, "%d|", input_num+ 4);
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sprintf(outport_str, "%d|", input_num+ 4);
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__MADD(165,PROC_ANS,inport_str,outport_str, 1, 0 ,¶meters.afc_ns,0, ModuleInterfaceType::SOFT_MODULE);
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//mixer
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sprintf(inport_str, "1-%d", input_num+ 4);
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sprintf(outport_str, "1-%d", output_num+1);
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__MADD(166,PROC_MIXER,"0-35","0-32",1, 1 ,¶meters.mixer, 0, ModuleInterfaceType::SOFT_MODULE);
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//crossover
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for(s32 i =0 ;i < output_num ; i++) {
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sprintf(outport_str, "%d|", i+1);
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__MADD(167,PROC_CROSSOVER,outport_str, outport_str,1, 0, ¶meters.out1[i],2, ModuleInterfaceType::SOFT_MODULE);
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}
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//eq
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for(s32 i =0 ;i < output_num ; i++) {
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sprintf(outport_str, "%d|", i+1);
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__MADD(199,PROC_EQ,outport_str, outport_str,1, 0, ¶meters.out2[i], 8, ModuleInterfaceType::SOFT_MODULE);
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}
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//delay
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for(s32 i =0 ;i < output_num ; i++) {
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sprintf(outport_str, "%d|", i+1);
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__MADD(231,PROC_DELAY,outport_str, outport_str,1, 0, ¶meters.out3[i], 1200, ModuleInterfaceType::SOFT_MODULE);
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}
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//limit
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for(s32 i =0 ;i < output_num ; i++) {
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sprintf(outport_str, "%d|", i+1);
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__MADD(263,PROC_LIMIT,outport_str, outport_str,1, 0, ¶meters.out4[i],0, ModuleInterfaceType::SOFT_MODULE);
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}
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//output
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sprintf(outport_str, "0-%d", output_num);
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__MADD(295,PROC_OUTPUT,outport_str,outport_str,1, 1, ¶meters.output,0, ModuleInterfaceType::SOFT_MODULE);
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//sysctrl
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__MADD(296,PROC_SYSCTL,outport_str,outport_str,1, 1, ¶meters.sysctl,0, ModuleInterfaceType::PHY_OUTPUT);
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//meter
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__MADD(297,PROC_METER,outport_str,"",1, 1, NULL, 0, ModuleInterfaceType::SOFT_MODULE);
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};
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s32 tgScene::set_parameters_content(uvoid* param, s32 size)
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{
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tag_parameters* pp = (tag_parameters*)param;
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if(pp->magic != 0xb34c && size != sizeof(tag_parameters)) {
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//basic check.
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return -1;
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}
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memcpy(¶meters, param, sizeof(tag_parameters));
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return 0;
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}
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s32 tgScene::update_dynmodule_tag(s32 proc_type,struct proc_field* proc)
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{
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switch(proc_type) {
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case ModuleType::PROC_EQ:{
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ptag_module pmodule = (ptag_module)proc->parameters;
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ptag_geq geq = (ptag_geq)pmodule->proc_ins;
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proc->tag = geq->nsections;
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}
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break;
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case ModuleType::PROC_GEQ:{
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ptag_module pmodule = (ptag_module)proc->parameters;
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ptag_eq eq = (ptag_eq)pmodule->proc_ins;
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proc->tag = eq->nsection;
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}
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break;
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case ModuleType::PROC_GATING:
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case ModuleType::PROC_EXPANDER:
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proc->tag =0;
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break;
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case ModuleType::PROC_COMPRESS:
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case ModuleType::PROC_LIMIT:
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proc->tag =0;
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break;
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case ModuleType::PROC_DELAY:
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proc->tag =1200;
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break;
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case ModuleType::PROC_CROSSOVER:
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proc->tag =2;
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break;
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case ModuleType::PROC_FEEDBACK:{
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ptag_module pmodule = (ptag_module)proc->parameters;
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ptag_feedback nhs = (ptag_feedback)pmodule->proc_ins;
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proc->tag = nhs->fbc_num;
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}
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break;
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case ModuleType::PROC_AGC:
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proc->tag =0;
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break;
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case ModuleType::PROC_CONTINUNOUS_SPL:
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proc->tag =0;
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break;
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case ModuleType::PROC_DUCKER:
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proc->tag =0;
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break;
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case ModuleType::PROC_FIR:
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proc->tag = 1024;
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break;
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default:
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proc->tag =0 ;
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break;
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}
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proc->proc_type = proc_type;
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return 0;
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}
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s32 tgScene::update_module()
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{
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u8 port_number[16];
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s8 ana_input_num, ana_output_num,dante_input_num,dante_output_num ;
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s16 input_num, output_num ;
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s16 dual_dsp = hw_adapter->get_system_is_dual_dsp();
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s16 dsp_index = hw_adapter->get_dsp_index();
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hw_adapter->get_channel_num(&ana_input_num, &ana_output_num, &dante_input_num, &dante_output_num);
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input_num = ana_input_num + dante_input_num;
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output_num = dante_input_num + dante_output_num;
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for(auto& iter: proc_list){
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//update dynamic module info.
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if(iter.fixed == 0) {
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ptag_module pmodule = (ptag_module)iter.parameters;
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if(pmodule->proc_type >= ModuleType::PROC_COUNT || pmodule->proc_type < ModuleType::PROC_NONE) {
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pmodule->proc_type = ModuleType::PROC_NONE;
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}
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update_dynmodule_tag(pmodule->proc_type, &iter);
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// if(iter.dsp_index == 0) {
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// s32 n = input_num;
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// s32 ninports = str_delim((const s8*)iter.inportstr, port_number);
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//
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// //Consider PCM model&& PCM channel don't process.
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// if(dual_dsp == 0 && input_num >16){
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// n = ana_input_num;
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// }
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//
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// if(ninports == 1 && port_number[0] >= n){
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// iter.proc_type = ModuleType::PROC_NONE;//±ãÓÚ½âÎö³¡¾°¹ýÂË
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// //even though module not to process, but the pc has level offset.
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// if(port_number[0] >= input_num) {
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//
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// }
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// }
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// }
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// else {
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// s32 n = output_num;
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// s32 ninports = str_delim(iter.inportstr, port_number);
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//
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// if(dual_dsp == 0 && output_num >16){
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// n = ana_output_num;
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// }
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//
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// if(ninports==1 && port_number[0] >= n){
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// iter.proc_type = ModuleType::PROC_NONE; //±ãÓÚ½âÎö³¡¾°¹ýÂË
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// //even though module not to process, but the pc has level offset.
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// if(port_number[0] >= output_num) {
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//
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// }
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// }
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// }
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}
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}
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return 0;
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}
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uvoid* tgScene::get_module_param_ptr(uvoid *param, s32 fixed)
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{
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uvoid *ptr = param;
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if(fixed == 0){
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ptag_module pmod = (ptag_module)param;
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ptr = (void*)pmod->proc_ins;
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}
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return ptr;
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}
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u32 tgScene::get_module_id(u32 mid, s32 mtype , u32 pid)
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{
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if(mtype == PROC_INPUT && (pid == INPUT_TYPE || pid == INPUT_FREQ || pid == INPUT_LEVEL)){
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mid = 300;
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}
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else if(mtype == PROC_DUCKER && pid == DUCKER_MIX){
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mid = mid + 320;
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}
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return mid;
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}
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