#include <string.h>
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#include "tg_config.h"
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#include "tg_adapter.h"
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//²ÎÊýlogic_channelÂ߼ͨµÀ´Ó0¿ªÊ¼.
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s32 tg_hw_adapter_t::get_physical_channel(s32 input , s32 logic_channel)
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{
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<<<<<<< HEAD
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if(input) {
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s32 input_num = ana_input_num + dante_input_num ;
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if(logic_channel < ana_input_num) {
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//analog
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return logic_channel + 1;
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}
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else if(logic_channel < input_num) {
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//dante
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return 19 + (logic_channel - ana_input_num);
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}
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else {
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//usb
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// return 17 + (logic_channel - input_num);
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return (logic_channel > input_num) ? 17 : 18;
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}
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}
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else { //output
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s32 output_num = ana_output_num + dante_output_num ;
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//analog
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if(logic_channel < ana_output_num) {
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return logic_channel + 1;
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}
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else if(logic_channel < output_num) {
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//dante
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return 19 + (logic_channel - ana_output_num);
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}
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else {
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//usb
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// return 17 + (logic_channel - output_num);
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return (logic_channel > output_num) ? 17 : 18;
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}
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}
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=======
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//s32 phy_channel[] = {1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,18,19};
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if(input) {
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s32 input_num = ana_input_num + dante_input_num ;
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// s32 local_ch = ana_input_num + usb_input_num; // C H G 18
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if(logic_channel < ana_input_num) {
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//analog
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return logic_channel+1;
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}
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else if(logic_channel < input_num) {
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//dante
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return 19 + (logic_channel - ana_input_num);
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}
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else {
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//usb
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return 17 + (logic_channel - input_num);
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}
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}
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else { //output
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s32 output_num = ana_output_num + dante_output_num ;
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// s32 local_ch = ana_output_num + usb_output_num; // C H G 18
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//analog
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if(logic_channel < ana_output_num) {
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return logic_channel;
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}
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else if(logic_channel < output_num) {
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//dante
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return 19 + (logic_channel - ana_output_num);
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}
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else {
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//usb
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return 17 + (logic_channel - output_num);
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}
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}
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>>>>>>> 0d5b7df96a2ee186b7b085dca9cf9a33f791c430
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}
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//ÎïÀíbuffer¶¨Òå˳ÐòÊÇ16ͨµÀÄ£Äâ+2ͨµÀUSB+32ͨµÀDante.
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uvoid tg_hw_adapter_t::config_board(struct DSPConfig * conf)
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{
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u32 i;
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s32 mclk = 24576000;
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memset(conf, 0, sizeof(struct DSPConfig));
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conf->mDualDsp = dual_dsp;
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conf->mDspIndex = dsp_index;
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conf->mSampleNum = SAMPLE_NUM;
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conf->mSampleRate = SAMPLE_RATE;
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conf->mLevelReportInt = 100;
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conf->mConvertUnit = 0;
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conf->mIntrNo = intr_sport_no(0);
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//MCLK(DAI0_02),SCLK(DAI0_19),LRCLK(DAI0_20)
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//analog input(DAI0_05,DAI0_06) + output(DAI0_11,DAI0_12)
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//sport0a<->input; sport0b<->output.
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for(i = 0 ;i < 2 ;i ++) {
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conf->sports[i].spid = i;
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conf->sports[i].clke = utrue;
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conf->sports[i].enable = utrue;
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conf->sports[i].enable_sec = utrue;
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conf->sports[i].lfs = ufalse;
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conf->sports[i].mfd = 1;
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conf->sports[i].opmode = 0 ; //tdm
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conf->sports[i].rx = ufalse;
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conf->sports[i].slots = 8;
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conf->sports[i].vld = 8;
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conf->sports[i].follow_intr_no = intr_sport_no(0);
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}
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conf->sports[0].interrupt = utrue;
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conf->sports[0].rx = utrue;
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//pcg ²úÉúʱÖÓ
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conf->pcgs[0].enable = utrue;
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conf->pcgs[0].opmode = 1;
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conf->pcgs[0].width = 2;
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conf->pcgs[0].fs_div = mclk / conf->mSampleRate ;
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conf->pcgs[0].sclk_div = mclk / (conf->mSampleRate * 8 * 32);
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AddRoute(SourceSignal::DAI0_PB02_O , DestSignal::PCG_EXTA_I);
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AddRoute(SourceSignal::LOGIC_HIGH, DestSignal::DAI0_PBEN20_I);//fs
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AddRoute(SourceSignal::LOGIC_HIGH, DestSignal::DAI0_PBEN19_I);//sclk
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AddRoute(SourceSignal::PCG_FSA_O, DestSignal::DAI0_PB20_I);
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AddRoute(SourceSignal::PCG_CLKA_O, DestSignal::DAI0_PB19_I);
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AddRoute(SourceSignal::LOGIC_HIGH, DestSignal::INV_DAI0_PB19_I); //·×ª¼«ÐÔ
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AddRoute(SourceSignal::DAI0_PB19_O, DestSignal::SPT0_ACLK_I);
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AddRoute(SourceSignal::DAI0_PB19_O, DestSignal::SPT0_BCLK_I);
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AddRoute(SourceSignal::DAI0_PB20_O, DestSignal::SPT0_AFS_I);
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AddRoute(SourceSignal::DAI0_PB20_O, DestSignal::SPT0_BFS_I);
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AddRoute(SourceSignal::DAI0_PB05_O, DestSignal::SPT0_AD0_I);
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AddRoute(SourceSignal::DAI0_PB06_O, DestSignal::SPT0_AD1_I);
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AddRoute(SourceSignal::LOGIC_HIGH, DestSignal::DAI0_PBEN11_I);
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AddRoute(SourceSignal::SPT0_BD0_O, DestSignal::DAI0_PB11_I);
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AddRoute(SourceSignal::LOGIC_HIGH, DestSignal::DAI0_PBEN12_I);
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AddRoute(SourceSignal::SPT0_BD1_O, DestSignal::DAI0_PB12_I);
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//USB Slave. SCLK(DAI0_8),LRCLK(DAI0_9), RX(DAI0_7),TX(DAI0_10)
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//sport2A<->input; sport2B<->output
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for(i =4 ;i < 6; i++) {
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conf->sports[i].spid = i;
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conf->sports[i].clke = utrue;
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conf->sports[i].enable = utrue;
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conf->sports[i].enable_sec = ufalse;
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<<<<<<< HEAD
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conf->sports[i].lfs = ufalse; // The USB left and right channels can be swapped.
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conf->sports[i].mfd = 0;
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=======
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conf->sports[i].lfs = ufalse;
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conf->sports[i].mfd = 1;
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>>>>>>> 0d5b7df96a2ee186b7b085dca9cf9a33f791c430
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conf->sports[i].opmode = 1 ; //i2s
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conf->sports[i].rx = ufalse;
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conf->sports[i].slots = 2;
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conf->sports[i].vld = 2;
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conf->sports[i].follow_intr_no = intr_sport_no(4);
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}
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conf->sports[4].interrupt = utrue;
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conf->sports[4].rx = utrue;
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//USB pcg.
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<<<<<<< HEAD
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conf->pcgs[1].enable = utrue;
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conf->pcgs[1].opmode = 0;
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conf->pcgs[1].fs_div = mclk / conf->mSampleRate ;
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conf->pcgs[1].sclk_div = mclk / (conf->mSampleRate * 2 * 32);
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AddRoute(SourceSignal::DAI0_PB02_O, DestSignal::PCG_EXTB_I);
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// route
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AddRoute(SourceSignal::PCG_FSB_O, DestSignal::SPT2_AFS_I);
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AddRoute(SourceSignal::PCG_FSB_O, DestSignal::SPT2_BFS_I);
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AddRoute(SourceSignal::PCG_CLKB_O, DestSignal::SPT2_ACLK_I);
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AddRoute(SourceSignal::PCG_CLKB_O, DestSignal::SPT2_BCLK_I);
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=======
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// conf->pcgs[1].enable = utrue;
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// conf->pcgs[1].opmode = 0;
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// conf->pcgs[1].fs_div = mclk / conf->mSampleRate ;
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// conf->pcgs[1].sclk_div = mclk / (conf->mSampleRate * 2 * 32);
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// AddRoute(SourceSignal::DAI0_PB02_O, DestSignal::PCG_EXTB_I);
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>>>>>>> 0d5b7df96a2ee186b7b085dca9cf9a33f791c430
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// AddRoute(SourceSignal::LOGIC_HIGH, DestSignal::DAI0_PBEN09_I);//fs
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// AddRoute(SourceSignal::LOGIC_HIGH, DestSignal::DAI0_PBEN08_I);//sclk
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// AddRoute(SourceSignal::PCG_FSB_O, DestSignal::DAI0_PB09_I);
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// AddRoute(SourceSignal::PCG_CLKB_O, DestSignal::DAI0_PB08_I);
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// AddRoute(SourceSignal::DAI0_PB08_O, DestSignal::SPT2_ACLK_I);
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// AddRoute(SourceSignal::DAI0_PB09_O, DestSignal::SPT2_AFS_I);
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// AddRoute(SourceSignal::DAI0_PB08_O, DestSignal::SPT2_BCLK_I);
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// AddRoute(SourceSignal::DAI0_PB09_O, DestSignal::SPT2_BFS_I);
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// AddRoute(SourceSignal::DAI0_PB07_O, DestSignal::SPT2_AD0_I); // usb output
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// AddRoute(SourceSignal::LOGIC_HIGH, DestSignal::DAI0_PBEN10_I);
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// AddRoute(SourceSignal::SPT2_BD0_O, DestSignal::DAI0_PB10_I); // usb input
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// usb asrc
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conf->srcs[0].enable = utrue;
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conf->srcs[0].format = 1;
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conf->srcs[0].wordLen = 0;
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conf->srcs[0].ratio = 1; // usb input
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conf->srcs[1].enable = utrue;
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conf->srcs[1].format = 1;
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conf->srcs[1].wordLen = 0;
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conf->srcs[1].ratio = 0; // usb output
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// usb input / asrc input
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AddRoute(SourceSignal::DAI0_PB09_O, DestSignal::SRC0_FS_IP_I);
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AddRoute(SourceSignal::DAI0_PB08_O, DestSignal::SRC0_CLK_IP_I);
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AddRoute(SourceSignal::DAI0_PB07_O, DestSignal::SRC0_DAT_IP_I);
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// usb input / asrc output
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AddRoute(SourceSignal::PCG_FSB_O, DestSignal::SRC0_FS_OP_I);
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AddRoute(SourceSignal::PCG_CLKB_O, DestSignal::SRC0_CLK_OP_I);
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AddRoute(SourceSignal::SRC0_DAT_OP_O, DestSignal::SPT2_AD0_I);
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// usb output / asrc input
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AddRoute(SourceSignal::PCG_FSB_O, DestSignal::SRC1_FS_IP_I);
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AddRoute(SourceSignal::PCG_CLKB_O, DestSignal::SRC1_CLK_IP_I);
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AddRoute(SourceSignal::SPT2_BD0_O, DestSignal::SRC1_DAT_IP_I);
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// usb output / asrc output
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AddRoute(SourceSignal::DAI0_PB09_O, DestSignal::SRC1_FS_OP_I);
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AddRoute(SourceSignal::DAI0_PB08_O, DestSignal::SRC1_CLK_OP_I);
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AddRoute(SourceSignal::LOGIC_HIGH, DestSignal::DAI0_PBEN10_I);
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AddRoute(SourceSignal::SRC1_DAT_OP_O, DestSignal::DAI0_PB10_I);
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//Dante Slave
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//MCLK(DAI1_2),LRCLK(DAI1_20),SCLK(DAI1_19)
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//TX0(DAI1_12),TX1(DAI1_10),TX2(DAI1_8),TX3(DAI1_6)
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//RX0(DAI1_11),RX1(DAI1_9),RX2(DAI1_7),RX3(DAI1_5)
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//sport4a,4b<->RX;sport5a,5b<->TX
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for(i = 8 ;i < 12 ;i ++) {
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conf->sports[i].spid = i;
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conf->sports[i].clke = utrue;
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conf->sports[i].enable = utrue;
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conf->sports[i].enable_sec = ufalse;
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conf->sports[i].lfs = ufalse;
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conf->sports[i].mfd = 1;
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conf->sports[i].opmode = 0 ; //tdm
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conf->sports[i].rx = ufalse;
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<<<<<<< HEAD
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conf->sports[i].slots = 8;
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conf->sports[i].vld = 8;
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=======
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conf->sports[i].slots = 16;
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conf->sports[i].vld = 16;
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>>>>>>> 0d5b7df96a2ee186b7b085dca9cf9a33f791c430
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conf->sports[i].follow_intr_no = intr_sport_no(8);
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}
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conf->sports[8].interrupt = utrue;
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conf->sports[8].rx = conf->sports[9].rx = utrue;
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AddRoute(SourceSignal::DAI1_PB19_O, DestSignal::SPT4_ACLK_I);
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AddRoute(SourceSignal::DAI1_PB19_O, DestSignal::SPT4_BCLK_I);
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AddRoute(SourceSignal::DAI1_PB19_O, DestSignal::SPT5_ACLK_I);
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AddRoute(SourceSignal::DAI1_PB19_O, DestSignal::SPT5_BCLK_I);
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AddRoute(SourceSignal::DAI1_PB20_O, DestSignal::SPT4_AFS_I);
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AddRoute(SourceSignal::DAI1_PB20_O, DestSignal::SPT4_BFS_I);
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AddRoute(SourceSignal::DAI1_PB20_O, DestSignal::SPT5_AFS_I);
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AddRoute(SourceSignal::DAI1_PB20_O, DestSignal::SPT5_BFS_I);
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AddRoute(SourceSignal::DAI1_PB11_O, DestSignal::SPT4_AD0_I);
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AddRoute(SourceSignal::DAI1_PB09_O, DestSignal::SPT4_BD0_I);
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// AddRoute(SourceSignal::DAI1_PB07_O, DestSignal::SPT4_AD0_I);
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// AddRoute(SourceSignal::DAI1_PB05_O, DestSignal::SPT4_BD0_I);
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AddRoute(SourceSignal::LOGIC_HIGH, DestSignal::DAI1_PBEN12_I);
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AddRoute(SourceSignal::SPT5_AD0_O, DestSignal::DAI1_PB12_I);
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AddRoute(SourceSignal::LOGIC_HIGH, DestSignal::DAI1_PBEN10_I);
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AddRoute(SourceSignal::SPT5_BD0_O, DestSignal::DAI1_PB10_I);
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// AddRoute(SourceSignal::LOGIC_HIGH, DestSignal::DAI1_PBEN08_I);
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// AddRoute(SourceSignal::SPT5_AD0_O, DestSignal::DAI1_PB08_I);
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// AddRoute(SourceSignal::LOGIC_HIGH, DestSignal::DAI1_PBEN06_I);
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// AddRoute(SourceSignal::SPT5_BD0_O, DestSignal::DAI1_PB06_I);
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/* TDM8
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for(i = 8 ;i < 12 ;i ++) {
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conf->sports[i].spid = i;
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conf->sports[i].clke = utrue;
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conf->sports[i].enable = utrue;
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conf->sports[i].enable_sec = utrue;
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conf->sports[i].lfs = ufalse;
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conf->sports[i].mfd = 1;
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conf->sports[i].opmode = 0 ; //tdm
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conf->sports[i].rx = ufalse;
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conf->sports[i].slots = 8;
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conf->sports[i].vld = 8;
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conf->sports[i].follow_intr_no = intr_sport_no(8);
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}
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conf->sports[8].interrupt = utrue;
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conf->sports[8].rx = conf->sports[9].rx = utrue;
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AddRoute(SourceSignal::DAI1_PB19_O, DestSignal::SPT4_ACLK_I);
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AddRoute(SourceSignal::DAI1_PB19_O, DestSignal::SPT4_BCLK_I);
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AddRoute(SourceSignal::DAI1_PB19_O, DestSignal::SPT5_ACLK_I);
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AddRoute(SourceSignal::DAI1_PB19_O, DestSignal::SPT5_BCLK_I);
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AddRoute(SourceSignal::DAI1_PB20_O, DestSignal::SPT4_AFS_I);
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AddRoute(SourceSignal::DAI1_PB20_O, DestSignal::SPT4_BFS_I);
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AddRoute(SourceSignal::DAI1_PB20_O, DestSignal::SPT5_AFS_I);
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AddRoute(SourceSignal::DAI1_PB20_O, DestSignal::SPT5_BFS_I);
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AddRoute(SourceSignal::DAI1_PB11_O, DestSignal::SPT4_AD0_I);
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AddRoute(SourceSignal::DAI1_PB09_O, DestSignal::SPT4_AD1_I);
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AddRoute(SourceSignal::DAI1_PB07_O, DestSignal::SPT4_BD0_I);
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AddRoute(SourceSignal::DAI1_PB05_O, DestSignal::SPT4_BD1_I);
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AddRoute(SourceSignal::LOGIC_HIGH, DestSignal::DAI1_PBEN12_I);
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AddRoute(SourceSignal::SPT5_AD0_O, DestSignal::DAI1_PB12_I);
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AddRoute(SourceSignal::LOGIC_HIGH, DestSignal::DAI1_PBEN10_I);
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AddRoute(SourceSignal::SPT5_AD1_O, DestSignal::DAI1_PB10_I);
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AddRoute(SourceSignal::LOGIC_HIGH, DestSignal::DAI1_PBEN08_I);
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AddRoute(SourceSignal::SPT5_BD0_O, DestSignal::DAI1_PB08_I);
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AddRoute(SourceSignal::LOGIC_HIGH, DestSignal::DAI1_PBEN06_I);
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AddRoute(SourceSignal::SPT5_BD1_O, DestSignal::DAI1_PB06_I);*/
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}
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