#ifndef _SANECORE_ADSP_DRV_AD_H__
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#define _SANECORE_ADSP_DRV_AD_H__
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#ifdef _LANGUAGE_C
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typedef struct{
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unsigned char rwaddr;
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unsigned char regaddr;
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unsigned char regdata;
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} ad1939_reg;
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#endif
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//-------------------------------------------------------------------------------
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// AD1939 Register address definitions
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#define CLKCTRL0 (0) // PLL and Clock Control register 0
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#define CLKCTRL1 (1) // PLL and Clock Control register 1
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#define DACCTRL0 (2) // DAC control register 0 (R/W)
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#define DACCTRL1 (3) // DAC control register 1 (R/W)
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#define DACCTRL2 (4) // DAC control register 2 (R/W)
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#define DACMUTE (5) // DAC Individual Channel Mutes
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#define DACVOL_L1 (6) // DAC volume - left 1 (R/W)
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#define DACVOL_R1 (7) // DAC volume - right 1 (R/W)
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#define DACVOL_L2 (8) // DAC volume - left 2 (R/W)
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#define DACVOL_R2 (9) // DAC volume - right 2 (R/W)
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#define DACVOL_L3 (10) // DAC volume - left 3 (R/W)
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#define DACVOL_R3 (11) // DAC volume - right 3 (R/W)
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#define DACVOL_L4 (12) // DAC volume - left 4 (R/W)
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#define DACVOL_R4 (13) // DAC volume - right 4 (R/W)
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#define ADCCTRL0 (14) // ADC control 0 (R/W)
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#define ADCCTRL1 (15) // ADC control 1 (R/W)
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#define ADCCTRL2 (16) // ADC control 2 (R/W)
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//-------------------------------------------------------------------------------
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// Global register bit definitions
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#define RD(address) ((address<<1)|1)
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#define WR(address) (address<<1) // Write to register
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#define AD1939_ADDR (4) // Global Address of any ad1939
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//-------------------------------------------------------------------------------
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// PLL and Clock Control 0 Register
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#define DIS_ADC_DAC (0x00)
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#define ENA_ADC_DAC (0x80)
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#define PLL_IN_MCLK (0x00)
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#define PLL_IN_DLRCLK (0x20)
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#define PLL_IN_ALRCLK (0x40)
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#define MCLK_OUT_XTAL (0x00)
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#define MCLK_OUT_256FS (0x08)
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#define MCLK_OUT_512FS (0x10)
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#define MCLK_OUT_OFF (0x18)
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#define INPUT256 (0x00)
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#define INPUT384 (0x02)
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#define INPUT512 (0x04)
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#define INPUT768 (0x06)
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#define PLL_PWR_UP (0x00)
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#define PLL_PWR_DWN (0x01)
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//-------------------------------------------------------------------------------
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// PLL and Clock Control 1 Register
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#define AD1938_PLL_LOCK (0x08)
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#define DIS_VREF (0x00)
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#define ENA_VREF (0x40)
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#define ADC_CLK_PLL (0x00)
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#define ADC_CLK_MCLK (0x20)
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#define DAC_CLK_PLL (0x00)
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#define DAC_CLK_MCLK (0x01)
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//-------------------------------------------------------------------------------
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// DAC Control Register 0
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#define DAC_FMT_I2S (0x00)
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#define DAC_FMT_TDM (0x40)
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#define DAC_FMT_AUX (0x80)
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#define DAC_FMT_DUALTDM (0xc0)
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#define DAC_BCLK_DLY_1 (0x00)
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#define DAC_BCLK_DLY_0 (0x08)
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#define DAC_BCLK_DLY_8 (0x01)
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#define DAC_BCLK_DLY_12 (0x18)
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#define DAC_BCLK_DLY_16 (0x20)
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#define DAC_SR_48K (0x00)
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#define DAC_SR_96K (0x02)
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#define DAC_SR_192K (0x04)
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#define DAC_PWR_UP (0x00)
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#define DAC_PWR_DWN (0x01)
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//-------------------------------------------------------------------------------
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// DAC Control Register 1
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#define DAC_BCLK_POL_NORM (0x00)
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#define DAC_BCLK_POL_INV (0x80)
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#define DAC_BCLK_SRC_PIN (0x00)
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#define DAC_BCLK_SRC_INTERNAL (0x40)
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#define DAC_BCLK_SLAVE (0x00)
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#define DAC_BCLK_MASTER (0x20)
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#define DAC_LRCLK_SLAVE (0x00)
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#define DAC_LRCLK_MASTER (0x10)
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#define DAC_LRCLK_POL_NORM (0x00)
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#define DAC_LRCLK_POL_INV (0x08)
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#define DAC_CHANNELS_2 (0x00)
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#define DAC_CHANNELS_4 (0x02)
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#define DAC_CHANNELS_8 (0x04)
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#define DAC_CHANNELS_16 (0x06)
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#define DAC_LATCH_MID (0x00)
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#define DAC_LATCH_END (0x01)
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//-------------------------------------------------------------------------------
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// DAC Control Register 2
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#define DAC_OUT_POL_NORM (0x00)
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#define DAC_OUT_POL_INV (0x20)
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#define DAC_WIDTH_24 (0x00)
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#define DAC_WIDTH_20 (0x08)
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#define DAC_WIDTH_16 (0x18)
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#define DAC_DEEMPH_FLAT (0x00)
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#define DAC_DEEMPH_48K (0x02)
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#define DAC_DEEMPH_44_1K (0x04)
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#define DAC_DEEMPH_32K (0x06)
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#define DAC_UNMUTE_ALL (0x00)
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#define DAC_MUTE_ALL (0x01)
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//-------------------------------------------------------------------------------
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// DAC Individual Channel Mute Register
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#define DACMUTE_R4 (0x80)
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#define DACMUTE_L4 (0x40)
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#define DACMUTE_R3 (0x20)
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#define DACMUTE_L3 (0x10)
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#define DACMUTE_R2 (0x08)
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#define DACMUTE_L2 (0x04)
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#define DACMUTE_R1 (0x02)
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#define DACMUTE_L1 (0x01)
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//-------------------------------------------------------------------------------
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//DAC Volume Control Register - 8-bit granularity (256 levels)
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#define DACVOL_MIN (0xFF)
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#define DACVOL_LOW (0xC0)
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#define DACVOL_MED (0x80)
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#define DACVOL_HI (0x40)
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#define DACVOL_MAX (0x00)
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#define DACVOL_MASK (0xFF) // Volume in dB
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//-------------------------------------------------------------------------------
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// ADC Control 0 Register
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#define ADC_SR_48K (0x00)
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#define ADC_SR_96K (0x40)
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#define ADC_SR_192K (0x80)
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#define ADC_R2_UNMUTE (0x00)
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#define ADC_R2_MUTE (0x20)
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#define ADC_L2_UNMUTE (0x00)
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#define ADC_L2_MUTE (0x10)
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#define ADC_R1_UNMUTE (0x00)
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#define ADC_R1_MUTE (0x08)
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#define ADC_L1_UNMUTE (0x00)
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#define ADC_L1_MUTE (0x04)
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#define ADC_HP_FILT_OFF (0x00)
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#define ADC_HP_FILT_ON (0x02)
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#define ADC_PWR_UP (0x00)
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#define ADC_PWN_DWN (0x01)
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//-------------------------------------------------------------------------------
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// ADC Control 1 Register
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#define ADC_LATCH_MID (0x00)
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#define ADC_LATCH_END (0x80)
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#define ADC_FMT_I2S (0x00)
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#define ADC_FMT_TDM (0x20)
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#define ADC_FMT_AUX (0x40)
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#define ADC_BCLK_DLY_1 (0x00)
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#define ADC_BCLK_DLY_0 (0x04)
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#define ADC_BCLK_DLY_8 (0x08)
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#define ADC_BCLK_DLY_12 (0x0c)
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#define ADC_BCLK_DLY_16 (0x10)
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#define ADC_WIDTH_24 (0x00)
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#define ADC_WIDTH_20 (0x01)
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#define ADC_WIDTH_16 (0x03)
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//-------------------------------------------------------------------------------
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// ADC Control 2 Register
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#define ADC_BCLK_SRC_PIN (0x00)
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#define ADC_BCLK_SRC_INTERNAL (0x80)
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#define ADC_BCLK_SLAVE (0x00)
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#define ADC_BCLK_MASTER (0x40)
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#define ADC_CHANNELS_2 (0x00)
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#define ADC_CHANNELS_4 (0x10)
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#define ADC_CHANNELS_8 (0x20)
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#define ADC_CHANNELS_16 (0x30)
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#define ADC_LRCLK_SLAVE (0x00)
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#define ADC_LRCLK_MASTER (0x08)
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#define ADC_LRCLK_POL_NORM (0x00)
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#define ADC_LRCLK_POL_INV (0x04)
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#define ADC_BCLK_POL_NORM (0x00)
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#define ADC_BCLK_POL_INV (0x02)
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#define ADC_LRCLK_FMT_50_50 (0x00)
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#define ADC_LRCLK_FMT_PULSE (0x01)
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#define AD1939_CS DS0EN
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void Init1939viaSPI1(void);
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void Init1939viaSPI(void);
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#endif
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